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-rw-r--r--arch/arm/mach-s5pc100/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h21
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-clock.h3
-rw-r--r--arch/arm/mach-s5pc100/include/mach/system.h9
4 files changed, 27 insertions, 10 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 28aa551dc3a8..06513e647242 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -29,7 +29,7 @@
29#define IRQ_GPIOINT S5P_IRQ_VIC0(30) 29#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
30 30
31/* VIC1: ARM, power, memory, connectivity */ 31/* VIC1: ARM, power, memory, connectivity */
32#define IRQ_CORTEX0 S5P_IRQ_VIC1(0) 32#define IRQ_PMU S5P_IRQ_VIC1(0)
33#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) 33#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
34#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) 34#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
35#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) 35#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
@@ -38,7 +38,7 @@
38#define IRQ_IEMIEC S5P_IRQ_VIC1(6) 38#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
39#define IRQ_ONENAND S5P_IRQ_VIC1(7) 39#define IRQ_ONENAND S5P_IRQ_VIC1(7)
40#define IRQ_NFC S5P_IRQ_VIC1(8) 40#define IRQ_NFC S5P_IRQ_VIC1(8)
41#define IRQ_CFC S5P_IRQ_VIC1(9) 41#define IRQ_CFCON S5P_IRQ_VIC1(9)
42#define IRQ_UART0 S5P_IRQ_VIC1(10) 42#define IRQ_UART0 S5P_IRQ_VIC1(10)
43#define IRQ_UART1 S5P_IRQ_VIC1(11) 43#define IRQ_UART1 S5P_IRQ_VIC1(11)
44#define IRQ_UART2 S5P_IRQ_VIC1(12) 44#define IRQ_UART2 S5P_IRQ_VIC1(12)
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index cadae4305688..01b9134feff0 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -61,6 +61,8 @@
61 61
62#define S5PC100_PA_ONENAND (0xE7100000) 62#define S5PC100_PA_ONENAND (0xE7100000)
63 63
64#define S5PC100_PA_CFCON (0xE7800000)
65
64/* DMA */ 66/* DMA */
65#define S5PC100_PA_MDMA (0xE8100000) 67#define S5PC100_PA_MDMA (0xE8100000)
66#define S5PC100_PA_PDMA0 (0xE9000000) 68#define S5PC100_PA_PDMA0 (0xE9000000)
@@ -72,6 +74,9 @@
72 74
73#define S5PC100_PA_SYSTIMER (0xEA100000) 75#define S5PC100_PA_SYSTIMER (0xEA100000)
74 76
77#define S5PC100_PA_WATCHDOG (0xEA200000)
78#define S5PC100_PA_RTC (0xEA300000)
79
75#define S5PC100_PA_UART (0xEC000000) 80#define S5PC100_PA_UART (0xEC000000)
76 81
77#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) 82#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0)
@@ -94,6 +99,10 @@
94 99
95#define S5PC100_PA_FB (0xEE000000) 100#define S5PC100_PA_FB (0xEE000000)
96 101
102#define S5PC100_PA_FIMC0 (0xEE200000)
103#define S5PC100_PA_FIMC1 (0xEE300000)
104#define S5PC100_PA_FIMC2 (0xEE400000)
105
97#define S5PC100_PA_I2S0 (0xF2000000) 106#define S5PC100_PA_I2S0 (0xF2000000)
98#define S5PC100_PA_I2S1 (0xF2100000) 107#define S5PC100_PA_I2S1 (0xF2100000)
99#define S5PC100_PA_I2S2 (0xF2200000) 108#define S5PC100_PA_I2S2 (0xF2200000)
@@ -104,6 +113,8 @@
104#define S5PC100_PA_PCM0 0xF2400000 113#define S5PC100_PA_PCM0 0xF2400000
105#define S5PC100_PA_PCM1 0xF2500000 114#define S5PC100_PA_PCM1 0xF2500000
106 115
116#define S5PC100_PA_TSADC (0xF3000000)
117
107/* KEYPAD */ 118/* KEYPAD */
108#define S5PC100_PA_KEYPAD (0xF3100000) 119#define S5PC100_PA_KEYPAD (0xF3100000)
109 120
@@ -130,9 +141,19 @@
130#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) 141#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
131#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) 142#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
132#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD 143#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
144#define S3C_PA_WDT S5PC100_PA_WATCHDOG
133#define S3C_PA_TSADC S5PC100_PA_TSADC 145#define S3C_PA_TSADC S5PC100_PA_TSADC
134#define S3C_PA_ONENAND S5PC100_PA_ONENAND 146#define S3C_PA_ONENAND S5PC100_PA_ONENAND
135#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF 147#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
136#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF 148#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
149#define S3C_PA_RTC S5PC100_PA_RTC
150
151#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
152#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
153#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
154
155#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
156#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
157#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
137 158
138#endif /* __ASM_ARCH_C100_MAP_H */ 159#endif /* __ASM_ARCH_C100_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
index 5d27d286d504..bc92da2e0ba2 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
@@ -71,7 +71,10 @@
71#define S5P_CLKDIV1_PCLKD1_SHIFT (16) 71#define S5P_CLKDIV1_PCLKD1_SHIFT (16)
72 72
73#define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) 73#define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000)
74#define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200)
74 75
75#define S5PC100_SWRESET_RESETVAL 0xc100 76#define S5PC100_SWRESET_RESETVAL 0xc100
76 77
78#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
79
77#endif /* __ASM_ARCH_REGS_CLOCK_H */ 80#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index 681f626a9ae1..a9ea57c06600 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,18 +11,11 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <linux/io.h> 14#include <plat/system-reset.h>
15#include <mach/map.h>
16#include <mach/regs-clock.h>
17 15
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
21} 19}
22 20
23static void arch_reset(char mode, const char *cmd)
24{
25 __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET);
26 return;
27}
28#endif /* __ASM_ARCH_IRQ_H */ 21#endif /* __ASM_ARCH_IRQ_H */