1 files changed, 83 insertions, 110 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 328467b346aa..ccbe6b767f7d 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -1,5 +1,8 @@
 /* linux/arch/arm/mach-s5pc100/include/mach/map.h
 *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
 * Copyright 2009 Samsung Electronics Co.
 *      Byungho Min <bhmin@samsung.com>
 *
@@ -16,145 +19,115 @@
 #include <plat/map-base.h>
 #include <plat/map-s5p.h>
-/*
+#define S5PC100_PA_SDRAM                0x20000000
- * map-base.h has already defined virtual memory address
- * S3C_VA_IRQ           S3C_ADDR(0x00000000)    irq controller(s)
+#define S5PC100_PA_ONENAND              0xE7100000
- * S3C_VA_SYS           S3C_ADDR(0x00100000)    system control
+#define S5PC100_PA_ONENAND_BUF          0xB0000000
- * S3C_VA_MEM           S3C_ADDR(0x00200000)    system control (not used)
- * S3C_VA_TIMER         S3C_ADDR(0x00300000)    timer block
+#define S5PC100_PA_CHIPID               0xE0000000
- * S3C_VA_WATCHDOG      S3C_ADDR(0x00400000)    watchdog
- * S3C_VA_UART          S3C_ADDR(0x01000000)    UART
- *
- * S5PC100 specific virtual memory address can be defined here
- * S5PC1XX_VA_GPIO      S3C_ADDR(0x00500000)    GPIO
- *
- */
-#define S5PC100_PA_ONENAND_BUF  (0xB0000000)
+#define S5PC100_PA_SYSCON               0xE0100000
-#define S5PC100_SZ_ONENAND_BUF  (SZ_256M - SZ_32M)
-/* Chip ID */
+#define S5PC100_PA_OTHERS               0xE0200000
-#define S5PC100_PA_CHIPID       (0xE0000000)
+#define S5PC100_PA_GPIO                 0xE0300000
-#define S5P_PA_CHIPID           S5PC100_PA_CHIPID
-#define S5PC100_PA_SYSCON       (0xE0100000)
+#define S5PC100_PA_VIC0                 0xE4000000
-#define S5P_PA_SYSCON           S5PC100_PA_SYSCON
+#define S5PC100_PA_VIC1                 0xE4100000
+#define S5PC100_PA_VIC2                 0xE4200000
-#define S5PC100_PA_OTHERS       (0xE0200000)
+#define S5PC100_PA_SROMC                0xE7000000
-#define S5PC100_VA_OTHERS       (S3C_VA_SYS + 0x10000)
-#define S5PC100_PA_GPIO         (0xE0300000)
+#define S5PC100_PA_CFCON                0xE7800000
-#define S5PC1XX_VA_GPIO         S3C_ADDR(0x00500000)
-/* Interrupt */
+#define S5PC100_PA_MDMA                 0xE8100000
-#define S5PC100_PA_VIC0         (0xE4000000)
+#define S5PC100_PA_PDMA0                0xE9000000
-#define S5PC100_PA_VIC1         (0xE4100000)
+#define S5PC100_PA_PDMA1                0xE9200000
-#define S5PC100_PA_VIC2         (0xE4200000)
-#define S5PC100_VA_VIC          S3C_VA_IRQ
-#define S5PC100_VA_VIC_OFFSET   0x10000
-#define S5PC1XX_VA_VIC(x)       (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
-#define S5PC100_PA_SROMC        (0xE7000000)
+#define S5PC100_PA_TIMER                0xEA000000
-#define S5P_PA_SROMC            S5PC100_PA_SROMC
+#define S5PC100_PA_SYSTIMER             0xEA100000
+#define S5PC100_PA_WATCHDOG             0xEA200000
+#define S5PC100_PA_RTC                  0xEA300000
-#define S5PC100_PA_ONENAND      (0xE7100000)
+#define S5PC100_PA_UART                 0xEC000000
-#define S5PC100_PA_CFCON        (0xE7800000)
+#define S5PC100_PA_IIC0                 0xEC100000
+#define S5PC100_PA_IIC1                 0xEC200000
-/* DMA */
+#define S5PC100_PA_SPI0                 0xEC300000
-#define S5PC100_PA_MDMA         (0xE8100000)
+#define S5PC100_PA_SPI1                 0xEC400000
-#define S5PC100_PA_PDMA0        (0xE9000000)
+#define S5PC100_PA_SPI2                 0xEC500000
-#define S5PC100_PA_PDMA1        (0xE9200000)
-/* Timer */
+#define S5PC100_PA_USB_HSOTG            0xED200000
-#define S5PC100_PA_TIMER        (0xEA000000)
+#define S5PC100_PA_USB_HSPHY            0xED300000
-#define S5P_PA_TIMER            S5PC100_PA_TIMER
-#define S5PC100_PA_SYSTIMER     (0xEA100000)
+#define S5PC100_PA_HSMMC(x)             (0xED800000 + ((x) * 0x100000))
-#define S5PC100_PA_WATCHDOG     (0xEA200000)
+#define S5PC100_PA_FB                   0xEE000000
-#define S5PC100_PA_RTC          (0xEA300000)
-#define S5PC100_PA_UART         (0xEC000000)
+#define S5PC100_PA_FIMC0                0xEE200000
+#define S5PC100_PA_FIMC1                0xEE300000
+#define S5PC100_PA_FIMC2                0xEE400000
-#define S5P_PA_UART0            (S5PC100_PA_UART + 0x0)
+#define S5PC100_PA_I2S0                 0xF2000000
-#define S5P_PA_UART1            (S5PC100_PA_UART + 0x400)
+#define S5PC100_PA_I2S1                 0xF2100000
-#define S5P_PA_UART2            (S5PC100_PA_UART + 0x800)
+#define S5PC100_PA_I2S2                 0xF2200000
-#define S5P_PA_UART3            (S5PC100_PA_UART + 0xC00)
-#define S5P_SZ_UART             SZ_256
-#define S5PC100_PA_IIC0         (0xEC100000)
+#define S5PC100_PA_AC97                 0xF2300000
-#define S5PC100_PA_IIC1         (0xEC200000)
-/* SPI */
+#define S5PC100_PA_PCM0                 0xF2400000
-#define S5PC100_PA_SPI0         0xEC300000
+#define S5PC100_PA_PCM1                 0xF2500000
-#define S5PC100_PA_SPI1         0xEC400000
-#define S5PC100_PA_SPI2         0xEC500000
-/* USB HS OTG */
+#define S5PC100_PA_SPDIF                0xF2600000
-#define S5PC100_PA_USB_HSOTG    (0xED200000)
-#define S5PC100_PA_USB_HSPHY    (0xED300000)
-#define S5PC100_PA_FB           (0xEE000000)
+#define S5PC100_PA_TSADC                0xF3000000
-#define S5PC100_PA_FIMC0        (0xEE200000)
+#define S5PC100_PA_KEYPAD               0xF3100000
-#define S5PC100_PA_FIMC1        (0xEE300000)
-#define S5PC100_PA_FIMC2        (0xEE400000)
-#define S5PC100_PA_I2S0         (0xF2000000)
+/* Compatibiltiy Defines */
-#define S5PC100_PA_I2S1         (0xF2100000)
-#define S5PC100_PA_I2S2         (0xF2200000)
-#define S5PC100_PA_AC97         0xF2300000
+#define S3C_PA_FB                       S5PC100_PA_FB
+#define S3C_PA_HSMMC0                   S5PC100_PA_HSMMC(0)
+#define S3C_PA_HSMMC1                   S5PC100_PA_HSMMC(1)
+#define S3C_PA_HSMMC2                   S5PC100_PA_HSMMC(2)
+#define S3C_PA_IIC                      S5PC100_PA_IIC0
+#define S3C_PA_IIC1                     S5PC100_PA_IIC1
+#define S3C_PA_KEYPAD                   S5PC100_PA_KEYPAD
+#define S3C_PA_ONENAND                  S5PC100_PA_ONENAND
+#define S3C_PA_ONENAND_BUF              S5PC100_PA_ONENAND_BUF
+#define S3C_PA_RTC                      S5PC100_PA_RTC
+#define S3C_PA_TSADC                    S5PC100_PA_TSADC
+#define S3C_PA_USB_HSOTG                S5PC100_PA_USB_HSOTG
+#define S3C_PA_USB_HSPHY                S5PC100_PA_USB_HSPHY
+#define S3C_PA_WDT                      S5PC100_PA_WATCHDOG
-/* PCM */
+#define S5P_PA_CHIPID                   S5PC100_PA_CHIPID
-#define S5PC100_PA_PCM0         0xF2400000
+#define S5P_PA_FIMC0                    S5PC100_PA_FIMC0
-#define S5PC100_PA_PCM1         0xF2500000
+#define S5P_PA_FIMC1                    S5PC100_PA_FIMC1
+#define S5P_PA_FIMC2                    S5PC100_PA_FIMC2
+#define S5P_PA_SDRAM                    S5PC100_PA_SDRAM
+#define S5P_PA_SROMC                    S5PC100_PA_SROMC
+#define S5P_PA_SYSCON                   S5PC100_PA_SYSCON
+#define S5P_PA_TIMER                    S5PC100_PA_TIMER
-#define S5PC100_PA_SPDIF        0xF2600000
+#define SAMSUNG_PA_ADC                  S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON                S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD               S5PC100_PA_KEYPAD
-#define S5PC100_PA_TSADC        (0xF3000000)
+#define S5PC100_VA_OTHERS               (S3C_VA_SYS + 0x10000)
-/* KEYPAD */
+#define S3C_SZ_ONENAND_BUF              (SZ_256M - SZ_32M)
-#define S5PC100_PA_KEYPAD       (0xF3100000)
-#define S5PC100_PA_HSMMC(x)     (0xED800000 + ((x) * 0x100000))
+/* UART */
-#define S5PC100_PA_SDRAM        (0x20000000)
+#define S3C_PA_UART                     S5PC100_PA_UART
-#define S5P_PA_SDRAM            S5PC100_PA_SDRAM
-/* compatibiltiy defines. */
+#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S3C_PA_UART             S5PC100_PA_UART
+#define S5P_PA_UART0                    S5P_PA_UART(0)
-#define S3C_PA_IIC              S5PC100_PA_IIC0
+#define S5P_PA_UART1                    S5P_PA_UART(1)
-#define S3C_PA_IIC1             S5PC100_PA_IIC1
+#define S5P_PA_UART2                    S5P_PA_UART(2)
-#define S3C_PA_FB               S5PC100_PA_FB
+#define S5P_PA_UART3                    S5P_PA_UART(3)
-#define S3C_PA_G2D              S5PC100_PA_G2D
-#define S3C_PA_G3D              S5PC100_PA_G3D
-#define S3C_PA_JPEG             S5PC100_PA_JPEG
-#define S3C_PA_ROTATOR          S5PC100_PA_ROTATOR
-#define S5P_VA_VIC0             S5PC1XX_VA_VIC(0)
-#define S5P_VA_VIC1             S5PC1XX_VA_VIC(1)
-#define S5P_VA_VIC2             S5PC1XX_VA_VIC(2)
-#define S3C_PA_USB_HSOTG        S5PC100_PA_USB_HSOTG
-#define S3C_PA_USB_HSPHY        S5PC100_PA_USB_HSPHY
-#define S3C_PA_HSMMC0           S5PC100_PA_HSMMC(0)
-#define S3C_PA_HSMMC1           S5PC100_PA_HSMMC(1)
-#define S3C_PA_HSMMC2           S5PC100_PA_HSMMC(2)
-#define S3C_PA_KEYPAD           S5PC100_PA_KEYPAD
-#define S3C_PA_WDT              S5PC100_PA_WATCHDOG
-#define S3C_PA_TSADC            S5PC100_PA_TSADC
-#define S3C_PA_ONENAND          S5PC100_PA_ONENAND
-#define S3C_PA_ONENAND_BUF      S5PC100_PA_ONENAND_BUF
-#define S3C_SZ_ONENAND_BUF      S5PC100_SZ_ONENAND_BUF
-#define S3C_PA_RTC              S5PC100_PA_RTC
-#define SAMSUNG_PA_ADC          S5PC100_PA_TSADC
-#define SAMSUNG_PA_CFCON        S5PC100_PA_CFCON
-#define SAMSUNG_PA_KEYPAD       S5PC100_PA_KEYPAD
-#define S5P_PA_FIMC0            S5PC100_PA_FIMC0
+#define S5P_SZ_UART                     SZ_256
-#define S5P_PA_FIMC1            S5PC100_PA_FIMC1
-#define S5P_PA_FIMC2            S5PC100_PA_FIMC2
-#endif /* __ASM_ARCH_C100_MAP_H */
+#endif /* __ASM_ARCH_MAP_H */

diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 328467b346aa..ccbe6b767f7d 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -1,5 +1,8 @@
1	/* linux/arch/arm/mach-s5pc100/include/mach/map.h	1	/* linux/arch/arm/mach-s5pc100/include/mach/map.h
2	*	2	*
		3	* Copyright (c) 2011 Samsung Electronics Co., Ltd.
		4	* http://www.samsung.com/
		5	*
3	* Copyright 2009 Samsung Electronics Co.	6	* Copyright 2009 Samsung Electronics Co.
4	* Byungho Min <bhmin@samsung.com>	7	* Byungho Min <bhmin@samsung.com>
5	*	8	*
@@ -16,145 +19,115 @@
16	#include <plat/map-base.h>	19	#include <plat/map-base.h>
17	#include <plat/map-s5p.h>	20	#include <plat/map-s5p.h>
18		21
19	/*	22	#define S5PC100_PA_SDRAM 0x20000000
20	* map-base.h has already defined virtual memory address	23
21	* S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s)	24	#define S5PC100_PA_ONENAND 0xE7100000
22	* S3C_VA_SYS S3C_ADDR(0x00100000) system control	25	#define S5PC100_PA_ONENAND_BUF 0xB0000000
23	* S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used)	26
24	* S3C_VA_TIMER S3C_ADDR(0x00300000) timer block	27	#define S5PC100_PA_CHIPID 0xE0000000
25	* S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog
26	* S3C_VA_UART S3C_ADDR(0x01000000) UART
27	*
28	* S5PC100 specific virtual memory address can be defined here
29	* S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO
30	*
31	*/
32		28
33	#define S5PC100_PA_ONENAND_BUF (0xB0000000)	29	#define S5PC100_PA_SYSCON 0xE0100000
34	#define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
35		30
36	/* Chip ID */	31	#define S5PC100_PA_OTHERS 0xE0200000
37		32
38	#define S5PC100_PA_CHIPID (0xE0000000)	33	#define S5PC100_PA_GPIO 0xE0300000
39	#define S5P_PA_CHIPID S5PC100_PA_CHIPID
40		34
41	#define S5PC100_PA_SYSCON (0xE0100000)	35	#define S5PC100_PA_VIC0 0xE4000000
42	#define S5P_PA_SYSCON S5PC100_PA_SYSCON	36	#define S5PC100_PA_VIC1 0xE4100000
		37	#define S5PC100_PA_VIC2 0xE4200000
43		38
44	#define S5PC100_PA_OTHERS (0xE0200000)	39	#define S5PC100_PA_SROMC 0xE7000000
45	#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
46		40
47	#define S5PC100_PA_GPIO (0xE0300000)	41	#define S5PC100_PA_CFCON 0xE7800000
48	#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
49		42
50	/* Interrupt */	43	#define S5PC100_PA_MDMA 0xE8100000
51	#define S5PC100_PA_VIC0 (0xE4000000)	44	#define S5PC100_PA_PDMA0 0xE9000000
52	#define S5PC100_PA_VIC1 (0xE4100000)	45	#define S5PC100_PA_PDMA1 0xE9200000
53	#define S5PC100_PA_VIC2 (0xE4200000)
54	#define S5PC100_VA_VIC S3C_VA_IRQ
55	#define S5PC100_VA_VIC_OFFSET 0x10000
56	#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
57		46
58	#define S5PC100_PA_SROMC (0xE7000000)	47	#define S5PC100_PA_TIMER 0xEA000000
59	#define S5P_PA_SROMC S5PC100_PA_SROMC	48	#define S5PC100_PA_SYSTIMER 0xEA100000
		49	#define S5PC100_PA_WATCHDOG 0xEA200000
		50	#define S5PC100_PA_RTC 0xEA300000
60		51
61	#define S5PC100_PA_ONENAND (0xE7100000)	52	#define S5PC100_PA_UART 0xEC000000
62		53
63	#define S5PC100_PA_CFCON (0xE7800000)	54	#define S5PC100_PA_IIC0 0xEC100000
		55	#define S5PC100_PA_IIC1 0xEC200000
64		56
65	/* DMA */	57	#define S5PC100_PA_SPI0 0xEC300000
66	#define S5PC100_PA_MDMA (0xE8100000)	58	#define S5PC100_PA_SPI1 0xEC400000
67	#define S5PC100_PA_PDMA0 (0xE9000000)	59	#define S5PC100_PA_SPI2 0xEC500000
68	#define S5PC100_PA_PDMA1 (0xE9200000)
69		60
70	/* Timer */	61	#define S5PC100_PA_USB_HSOTG 0xED200000
71	#define S5PC100_PA_TIMER (0xEA000000)	62	#define S5PC100_PA_USB_HSPHY 0xED300000
72	#define S5P_PA_TIMER S5PC100_PA_TIMER
73		63
74	#define S5PC100_PA_SYSTIMER (0xEA100000)	64	#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
75		65
76	#define S5PC100_PA_WATCHDOG (0xEA200000)	66	#define S5PC100_PA_FB 0xEE000000
77	#define S5PC100_PA_RTC (0xEA300000)
78		67
79	#define S5PC100_PA_UART (0xEC000000)	68	#define S5PC100_PA_FIMC0 0xEE200000
		69	#define S5PC100_PA_FIMC1 0xEE300000
		70	#define S5PC100_PA_FIMC2 0xEE400000
80		71
81	#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0)	72	#define S5PC100_PA_I2S0 0xF2000000
82	#define S5P_PA_UART1 (S5PC100_PA_UART + 0x400)	73	#define S5PC100_PA_I2S1 0xF2100000
83	#define S5P_PA_UART2 (S5PC100_PA_UART + 0x800)	74	#define S5PC100_PA_I2S2 0xF2200000
84	#define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00)
85	#define S5P_SZ_UART SZ_256
86		75
87	#define S5PC100_PA_IIC0 (0xEC100000)	76	#define S5PC100_PA_AC97 0xF2300000
88	#define S5PC100_PA_IIC1 (0xEC200000)
89		77
90	/* SPI */	78	#define S5PC100_PA_PCM0 0xF2400000
91	#define S5PC100_PA_SPI0 0xEC300000	79	#define S5PC100_PA_PCM1 0xF2500000
92	#define S5PC100_PA_SPI1 0xEC400000
93	#define S5PC100_PA_SPI2 0xEC500000
94		80
95	/* USB HS OTG */	81	#define S5PC100_PA_SPDIF 0xF2600000
96	#define S5PC100_PA_USB_HSOTG (0xED200000)
97	#define S5PC100_PA_USB_HSPHY (0xED300000)
98		82
99	#define S5PC100_PA_FB (0xEE000000)	83	#define S5PC100_PA_TSADC 0xF3000000
100		84
101	#define S5PC100_PA_FIMC0 (0xEE200000)	85	#define S5PC100_PA_KEYPAD 0xF3100000
102	#define S5PC100_PA_FIMC1 (0xEE300000)
103	#define S5PC100_PA_FIMC2 (0xEE400000)
104		86
105	#define S5PC100_PA_I2S0 (0xF2000000)	87	/* Compatibiltiy Defines */
106	#define S5PC100_PA_I2S1 (0xF2100000)
107	#define S5PC100_PA_I2S2 (0xF2200000)
108		88
109	#define S5PC100_PA_AC97 0xF2300000	89	#define S3C_PA_FB S5PC100_PA_FB
		90	#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
		91	#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
		92	#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
		93	#define S3C_PA_IIC S5PC100_PA_IIC0
		94	#define S3C_PA_IIC1 S5PC100_PA_IIC1
		95	#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
		96	#define S3C_PA_ONENAND S5PC100_PA_ONENAND
		97	#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
		98	#define S3C_PA_RTC S5PC100_PA_RTC
		99	#define S3C_PA_TSADC S5PC100_PA_TSADC
		100	#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
		101	#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
		102	#define S3C_PA_WDT S5PC100_PA_WATCHDOG
110		103
111	/* PCM */	104	#define S5P_PA_CHIPID S5PC100_PA_CHIPID
112	#define S5PC100_PA_PCM0 0xF2400000	105	#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
113	#define S5PC100_PA_PCM1 0xF2500000	106	#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
		107	#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
		108	#define S5P_PA_SDRAM S5PC100_PA_SDRAM
		109	#define S5P_PA_SROMC S5PC100_PA_SROMC
		110	#define S5P_PA_SYSCON S5PC100_PA_SYSCON
		111	#define S5P_PA_TIMER S5PC100_PA_TIMER
114		112
115	#define S5PC100_PA_SPDIF 0xF2600000	113	#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
		114	#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
		115	#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
116		116
117	#define S5PC100_PA_TSADC (0xF3000000)	117	#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
118		118
119	/* KEYPAD */	119	#define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
120	#define S5PC100_PA_KEYPAD (0xF3100000)
121		120
122	#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))	121	/* UART */
123		122
124	#define S5PC100_PA_SDRAM (0x20000000)	123	#define S3C_PA_UART S5PC100_PA_UART
125	#define S5P_PA_SDRAM S5PC100_PA_SDRAM
126		124
127	/* compatibiltiy defines. */	125	#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
128	#define S3C_PA_UART S5PC100_PA_UART	126	#define S5P_PA_UART0 S5P_PA_UART(0)
129	#define S3C_PA_IIC S5PC100_PA_IIC0	127	#define S5P_PA_UART1 S5P_PA_UART(1)
130	#define S3C_PA_IIC1 S5PC100_PA_IIC1	128	#define S5P_PA_UART2 S5P_PA_UART(2)
131	#define S3C_PA_FB S5PC100_PA_FB	129	#define S5P_PA_UART3 S5P_PA_UART(3)
132	#define S3C_PA_G2D S5PC100_PA_G2D
133	#define S3C_PA_G3D S5PC100_PA_G3D
134	#define S3C_PA_JPEG S5PC100_PA_JPEG
135	#define S3C_PA_ROTATOR S5PC100_PA_ROTATOR
136	#define S5P_VA_VIC0 S5PC1XX_VA_VIC(0)
137	#define S5P_VA_VIC1 S5PC1XX_VA_VIC(1)
138	#define S5P_VA_VIC2 S5PC1XX_VA_VIC(2)
139	#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
140	#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
141	#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
142	#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
143	#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
144	#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
145	#define S3C_PA_WDT S5PC100_PA_WATCHDOG
146	#define S3C_PA_TSADC S5PC100_PA_TSADC
147	#define S3C_PA_ONENAND S5PC100_PA_ONENAND
148	#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
149	#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
150	#define S3C_PA_RTC S5PC100_PA_RTC
151
152	#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
153	#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
154	#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
155		130
156	#define S5P_PA_FIMC0 S5PC100_PA_FIMC0	131	#define S5P_SZ_UART SZ_256
157	#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
158	#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
159		132
160	#endif /* __ASM_ARCH_C100_MAP_H */	133	#endif /* __ASM_ARCH_MAP_H */