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Diffstat (limited to 'arch/arm/mach-s5pc100/include/mach/gpio.h')
-rw-r--r--arch/arm/mach-s5pc100/include/mach/gpio.h230
1 files changed, 123 insertions, 107 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index c74fc93d7d15..2c4cbe8ee6b7 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -18,40 +18,45 @@
18#define gpio_to_irq __gpio_to_irq 18#define gpio_to_irq __gpio_to_irq
19 19
20/* GPIO bank sizes */ 20/* GPIO bank sizes */
21#define S5PC1XX_GPIO_A0_NR (8) 21#define S5PC100_GPIO_A0_NR (8)
22#define S5PC1XX_GPIO_A1_NR (5) 22#define S5PC100_GPIO_A1_NR (5)
23#define S5PC1XX_GPIO_B_NR (8) 23#define S5PC100_GPIO_B_NR (8)
24#define S5PC1XX_GPIO_C_NR (5) 24#define S5PC100_GPIO_C_NR (5)
25#define S5PC1XX_GPIO_D_NR (7) 25#define S5PC100_GPIO_D_NR (7)
26#define S5PC1XX_GPIO_E0_NR (8) 26#define S5PC100_GPIO_E0_NR (8)
27#define S5PC1XX_GPIO_E1_NR (6) 27#define S5PC100_GPIO_E1_NR (6)
28#define S5PC1XX_GPIO_F0_NR (8) 28#define S5PC100_GPIO_F0_NR (8)
29#define S5PC1XX_GPIO_F1_NR (8) 29#define S5PC100_GPIO_F1_NR (8)
30#define S5PC1XX_GPIO_F2_NR (8) 30#define S5PC100_GPIO_F2_NR (8)
31#define S5PC1XX_GPIO_F3_NR (4) 31#define S5PC100_GPIO_F3_NR (4)
32#define S5PC1XX_GPIO_G0_NR (8) 32#define S5PC100_GPIO_G0_NR (8)
33#define S5PC1XX_GPIO_G1_NR (3) 33#define S5PC100_GPIO_G1_NR (3)
34#define S5PC1XX_GPIO_G2_NR (7) 34#define S5PC100_GPIO_G2_NR (7)
35#define S5PC1XX_GPIO_G3_NR (7) 35#define S5PC100_GPIO_G3_NR (7)
36#define S5PC1XX_GPIO_H0_NR (8) 36#define S5PC100_GPIO_H0_NR (8)
37#define S5PC1XX_GPIO_H1_NR (8) 37#define S5PC100_GPIO_H1_NR (8)
38#define S5PC1XX_GPIO_H2_NR (8) 38#define S5PC100_GPIO_H2_NR (8)
39#define S5PC1XX_GPIO_H3_NR (8) 39#define S5PC100_GPIO_H3_NR (8)
40#define S5PC1XX_GPIO_I_NR (8) 40#define S5PC100_GPIO_I_NR (8)
41#define S5PC1XX_GPIO_J0_NR (8) 41#define S5PC100_GPIO_J0_NR (8)
42#define S5PC1XX_GPIO_J1_NR (5) 42#define S5PC100_GPIO_J1_NR (5)
43#define S5PC1XX_GPIO_J2_NR (8) 43#define S5PC100_GPIO_J2_NR (8)
44#define S5PC1XX_GPIO_J3_NR (8) 44#define S5PC100_GPIO_J3_NR (8)
45#define S5PC1XX_GPIO_J4_NR (4) 45#define S5PC100_GPIO_J4_NR (4)
46#define S5PC1XX_GPIO_K0_NR (8) 46#define S5PC100_GPIO_K0_NR (8)
47#define S5PC1XX_GPIO_K1_NR (6) 47#define S5PC100_GPIO_K1_NR (6)
48#define S5PC1XX_GPIO_K2_NR (8) 48#define S5PC100_GPIO_K2_NR (8)
49#define S5PC1XX_GPIO_K3_NR (8) 49#define S5PC100_GPIO_K3_NR (8)
50#define S5PC1XX_GPIO_MP00_NR (8) 50#define S5PC100_GPIO_L0_NR (8)
51#define S5PC1XX_GPIO_MP01_NR (8) 51#define S5PC100_GPIO_L1_NR (8)
52#define S5PC1XX_GPIO_MP02_NR (8) 52#define S5PC100_GPIO_L2_NR (8)
53#define S5PC1XX_GPIO_MP03_NR (8) 53#define S5PC100_GPIO_L3_NR (8)
54#define S5PC1XX_GPIO_MP04_NR (5) 54#define S5PC100_GPIO_L4_NR (8)
55#define S5PC100_GPIO_MP00_NR (8)
56#define S5PC100_GPIO_MP01_NR (8)
57#define S5PC100_GPIO_MP02_NR (8)
58#define S5PC100_GPIO_MP03_NR (8)
59#define S5PC100_GPIO_MP04_NR (5)
55 60
56/* GPIO bank numbes */ 61/* GPIO bank numbes */
57 62
@@ -64,83 +69,94 @@
64 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) 69 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
65 70
66enum s3c_gpio_number { 71enum s3c_gpio_number {
67 S5PC1XX_GPIO_A0_START = 0, 72 S5PC100_GPIO_A0_START = 0,
68 S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0), 73 S5PC100_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0),
69 S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1), 74 S5PC100_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1),
70 S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B), 75 S5PC100_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B),
71 S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C), 76 S5PC100_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C),
72 S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D), 77 S5PC100_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D),
73 S5PC1XX_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0), 78 S5PC100_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0),
74 S5PC1XX_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1), 79 S5PC100_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1),
75 S5PC1XX_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0), 80 S5PC100_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0),
76 S5PC1XX_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1), 81 S5PC100_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1),
77 S5PC1XX_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2), 82 S5PC100_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2),
78 S5PC1XX_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3), 83 S5PC100_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3),
79 S5PC1XX_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0), 84 S5PC100_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0),
80 S5PC1XX_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1), 85 S5PC100_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1),
81 S5PC1XX_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2), 86 S5PC100_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2),
82 S5PC1XX_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3), 87 S5PC100_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3),
83 S5PC1XX_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0), 88 S5PC100_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0),
84 S5PC1XX_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1), 89 S5PC100_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1),
85 S5PC1XX_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2), 90 S5PC100_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2),
86 S5PC1XX_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3), 91 S5PC100_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3),
87 S5PC1XX_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I), 92 S5PC100_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I),
88 S5PC1XX_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0), 93 S5PC100_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0),
89 S5PC1XX_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1), 94 S5PC100_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1),
90 S5PC1XX_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2), 95 S5PC100_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2),
91 S5PC1XX_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3), 96 S5PC100_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3),
92 S5PC1XX_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4), 97 S5PC100_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4),
93 S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0), 98 S5PC100_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0),
94 S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1), 99 S5PC100_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1),
95 S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2), 100 S5PC100_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2),
96 S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3), 101 S5PC100_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3),
97 S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00), 102 S5PC100_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0),
98 S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01), 103 S5PC100_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1),
99 S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02), 104 S5PC100_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2),
100 S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03), 105 S5PC100_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3),
106 S5PC100_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4),
107 S5PC100_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
108 S5PC100_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
109 S5PC100_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
110 S5PC100_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
111 S5PC100_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
101}; 112};
102 113
103/* S5PC1XX GPIO number definitions. */ 114/* S5PC100 GPIO number definitions. */
104#define S5PC1XX_GPA0(_nr) (S5PC1XX_GPIO_A0_START + (_nr)) 115#define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr))
105#define S5PC1XX_GPA1(_nr) (S5PC1XX_GPIO_A1_START + (_nr)) 116#define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr))
106#define S5PC1XX_GPB(_nr) (S5PC1XX_GPIO_B_START + (_nr)) 117#define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr))
107#define S5PC1XX_GPC(_nr) (S5PC1XX_GPIO_C_START + (_nr)) 118#define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr))
108#define S5PC1XX_GPD(_nr) (S5PC1XX_GPIO_D_START + (_nr)) 119#define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr))
109#define S5PC1XX_GPE0(_nr) (S5PC1XX_GPIO_E0_START + (_nr)) 120#define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr))
110#define S5PC1XX_GPE1(_nr) (S5PC1XX_GPIO_E1_START + (_nr)) 121#define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr))
111#define S5PC1XX_GPF0(_nr) (S5PC1XX_GPIO_F0_START + (_nr)) 122#define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr))
112#define S5PC1XX_GPF1(_nr) (S5PC1XX_GPIO_F1_START + (_nr)) 123#define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr))
113#define S5PC1XX_GPF2(_nr) (S5PC1XX_GPIO_F2_START + (_nr)) 124#define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr))
114#define S5PC1XX_GPF3(_nr) (S5PC1XX_GPIO_F3_START + (_nr)) 125#define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr))
115#define S5PC1XX_GPG0(_nr) (S5PC1XX_GPIO_G0_START + (_nr)) 126#define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr))
116#define S5PC1XX_GPG1(_nr) (S5PC1XX_GPIO_G1_START + (_nr)) 127#define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr))
117#define S5PC1XX_GPG2(_nr) (S5PC1XX_GPIO_G2_START + (_nr)) 128#define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr))
118#define S5PC1XX_GPG3(_nr) (S5PC1XX_GPIO_G3_START + (_nr)) 129#define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr))
119#define S5PC1XX_GPH0(_nr) (S5PC1XX_GPIO_H0_START + (_nr)) 130#define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr))
120#define S5PC1XX_GPH1(_nr) (S5PC1XX_GPIO_H1_START + (_nr)) 131#define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr))
121#define S5PC1XX_GPH2(_nr) (S5PC1XX_GPIO_H2_START + (_nr)) 132#define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr))
122#define S5PC1XX_GPH3(_nr) (S5PC1XX_GPIO_H3_START + (_nr)) 133#define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr))
123#define S5PC1XX_GPI(_nr) (S5PC1XX_GPIO_I_START + (_nr)) 134#define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr))
124#define S5PC1XX_GPJ0(_nr) (S5PC1XX_GPIO_J0_START + (_nr)) 135#define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr))
125#define S5PC1XX_GPJ1(_nr) (S5PC1XX_GPIO_J1_START + (_nr)) 136#define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr))
126#define S5PC1XX_GPJ2(_nr) (S5PC1XX_GPIO_J2_START + (_nr)) 137#define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr))
127#define S5PC1XX_GPJ3(_nr) (S5PC1XX_GPIO_J3_START + (_nr)) 138#define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr))
128#define S5PC1XX_GPJ4(_nr) (S5PC1XX_GPIO_J4_START + (_nr)) 139#define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr))
129#define S5PC1XX_GPK0(_nr) (S5PC1XX_GPIO_K0_START + (_nr)) 140#define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr))
130#define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr)) 141#define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr))
131#define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr)) 142#define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr))
132#define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr)) 143#define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr))
133#define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr)) 144#define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr))
134#define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr)) 145#define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr))
135#define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr)) 146#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr))
136#define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr)) 147#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr))
137#define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr)) 148#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr))
149#define S5PC100_MP00(_nr) (S5PC100_GPIO_MP00_START + (_nr))
150#define S5PC100_MP01(_nr) (S5PC100_GPIO_MP01_START + (_nr))
151#define S5PC100_MP02(_nr) (S5PC100_GPIO_MP02_START + (_nr))
152#define S5PC100_MP03(_nr) (S5PC100_GPIO_MP03_START + (_nr))
153#define S5PC100_MP04(_nr) (S5PC100_GPIO_MP04_START + (_nr))
154#define S5PC100_MP05(_nr) (S5PC100_GPIO_MP05_START + (_nr))
138 155
139/* the end of the S5PC1XX specific gpios */ 156/* It used the end of the S5PC1XX gpios */
140#define S5PC1XX_GPIO_END (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) 157#define S3C_GPIO_END S5PC100_GPIO_END
141#define S3C_GPIO_END S5PC1XX_GPIO_END
142 158
143/* define the number of gpios we need to the one after the MP04() range */ 159/* define the number of gpios we need to the one after the MP04() range */
144#define ARCH_NR_GPIOS (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) 160#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
145 161
146#include <asm-generic/gpio.h> 162#include <asm-generic/gpio.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 16:42:28 -0500