aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5p64x0/irq-eint.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s5p64x0/irq-eint.c')
-rw-r--r--arch/arm/mach-s5p64x0/irq-eint.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
index 494e1a8f6f6d..275dc74f4a7b 100644
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -20,6 +20,7 @@
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/regs-irqtype.h> 21#include <plat/regs-irqtype.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23#include <plat/pm.h>
23 24
24#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
25#include <mach/regs-clock.h> 26#include <mach/regs-clock.h>
@@ -134,6 +135,7 @@ static int s5p64x0_alloc_gc(void)
134 ct->chip.irq_mask = irq_gc_mask_set_bit; 135 ct->chip.irq_mask = irq_gc_mask_set_bit;
135 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 136 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
136 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; 137 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
138 ct->chip.irq_set_wake = s3c_irqext_wake;
137 ct->regs.ack = EINT0PEND_OFFSET; 139 ct->regs.ack = EINT0PEND_OFFSET;
138 ct->regs.mask = EINT0MASK_OFFSET; 140 ct->regs.mask = EINT0MASK_OFFSET;
139 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, 141 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,