diff options
Diffstat (limited to 'arch/arm/mach-s5p64x0/include')
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/clkdev.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 |
3 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h b/arch/arm/mach-s5p64x0/include/mach/clkdev.h new file mode 100644 index 000000000000..7dffa83d23ff --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/clkdev.h | |||
@@ -0,0 +1,7 @@ | |||
1 | #ifndef __MACH_CLKDEV_H__ | ||
2 | #define __MACH_CLKDEV_H__ | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do {} while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 513abffc7604..5837a36ece8d 100644 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h | |||
@@ -85,6 +85,8 @@ | |||
85 | #define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 | 85 | #define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 |
86 | #define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 | 86 | #define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 |
87 | 87 | ||
88 | #define IRQ_I2S0 IRQ_I2SV40 | ||
89 | |||
88 | /* S5P6450 EINT feature will be added */ | 90 | /* S5P6450 EINT feature will be added */ |
89 | 91 | ||
90 | /* | 92 | /* |
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 0953ef6b1c77..6ce254729f3b 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | |||
@@ -34,4 +34,14 @@ | |||
34 | #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) | 34 | #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) |
35 | #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) | 35 | #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) |
36 | 36 | ||
37 | /* External interrupt control registers for group0 */ | ||
38 | |||
39 | #define EINT0CON0_OFFSET (0x900) | ||
40 | #define EINT0MASK_OFFSET (0x920) | ||
41 | #define EINT0PEND_OFFSET (0x924) | ||
42 | |||
43 | #define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) | ||
44 | #define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) | ||
45 | #define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) | ||
46 | |||
37 | #endif /* __ASM_ARCH_REGS_GPIO_H */ | 47 | #endif /* __ASM_ARCH_REGS_GPIO_H */ |