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-rw-r--r--arch/arm/mach-s5p6442/Kconfig1
-rw-r--r--arch/arm/mach-s5p6442/Makefile7
-rw-r--r--arch/arm/mach-s5p6442/clock.c2
-rw-r--r--arch/arm/mach-s5p6442/cpu.c2
-rw-r--r--arch/arm/mach-s5p6442/dev-audio.c197
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c123
-rw-r--r--arch/arm/mach-s5p6442/dma.c105
-rw-r--r--arch/arm/mach-s5p6442/include/mach/dma.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h13
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h21
-rw-r--r--arch/arm/mach-s5p6442/include/mach/spi-clocks.h17
-rw-r--r--arch/arm/mach-s5p6442/mach-smdk6442.c1
-rw-r--r--arch/arm/mach-s5p6442/setup-i2c0.c25
14 files changed, 530 insertions, 15 deletions
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
index 4f3f6de6a013..0fd41b447915 100644
--- a/arch/arm/mach-s5p6442/Kconfig
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -12,6 +12,7 @@ if ARCH_S5P6442
12config CPU_S5P6442 12config CPU_S5P6442
13 bool 13 bool
14 select PLAT_S5P 14 select PLAT_S5P
15 select S3C_PL330_DMA
15 help 16 help
16 Enable S5P6442 CPU support 17 Enable S5P6442 CPU support
17 18
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
index dde39a6ce6bc..90a3d8373416 100644
--- a/arch/arm/mach-s5p6442/Makefile
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -12,8 +12,13 @@ obj- :=
12 12
13# Core support for S5P6442 system 13# Core support for S5P6442 system
14 14
15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o 15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5P6442) += setup-i2c0.o
16 17
17# machine support 18# machine support
18 19
19obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o 20obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
21
22# device support
23obj-y += dev-audio.o
24obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index 3aadbf42c112..087e57f20ad5 100644
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -294,7 +294,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); 294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); 295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
296 296
297 printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld", 297 printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld",
298 apll, mpll, epll); 298 apll, mpll, epll);
299 299
300 clk_fout_apll.rate = apll; 300 clk_fout_apll.rate = apll;
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index bc2524df89b3..a48fb553fd01 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -95,7 +95,7 @@ void __init s5p6442_init_irq(void)
95 s5p_init_irq(vic, ARRAY_SIZE(vic)); 95 s5p_init_irq(vic, ARRAY_SIZE(vic));
96} 96}
97 97
98static struct sysdev_class s5p6442_sysclass = { 98struct sysdev_class s5p6442_sysclass = {
99 .name = "s5p6442-core", 99 .name = "s5p6442-core",
100}; 100};
101 101
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
new file mode 100644
index 000000000000..cb801e1f5e23
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dev-audio.c
@@ -0,0 +1,197 @@
1/* linux/arch/arm/mach-s5p6442/dev-audio.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co. Ltd
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/audio.h>
16
17#include <mach/gpio.h>
18#include <mach/map.h>
19#include <mach/dma.h>
20#include <mach/irqs.h>
21
22static int s5p6442_cfg_i2s(struct platform_device *pdev)
23{
24 /* configure GPIO for i2s port */
25 switch (pdev->id) {
26 case 1:
27 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2));
32 break;
33
34 case -1:
35 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2));
36 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2));
37 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2));
38 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2));
39 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2));
40 break;
41
42 default:
43 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
44 return -EINVAL;
45 }
46
47 return 0;
48}
49
50static struct s3c_audio_pdata s3c_i2s_pdata = {
51 .cfg_gpio = s5p6442_cfg_i2s,
52};
53
54static struct resource s5p6442_iis0_resource[] = {
55 [0] = {
56 .start = S5P6442_PA_I2S0,
57 .end = S5P6442_PA_I2S0 + 0x100 - 1,
58 .flags = IORESOURCE_MEM,
59 },
60 [1] = {
61 .start = DMACH_I2S0_TX,
62 .end = DMACH_I2S0_TX,
63 .flags = IORESOURCE_DMA,
64 },
65 [2] = {
66 .start = DMACH_I2S0_RX,
67 .end = DMACH_I2S0_RX,
68 .flags = IORESOURCE_DMA,
69 },
70};
71
72struct platform_device s5p6442_device_iis0 = {
73 .name = "s3c64xx-iis-v4",
74 .id = -1,
75 .num_resources = ARRAY_SIZE(s5p6442_iis0_resource),
76 .resource = s5p6442_iis0_resource,
77 .dev = {
78 .platform_data = &s3c_i2s_pdata,
79 },
80};
81
82static struct resource s5p6442_iis1_resource[] = {
83 [0] = {
84 .start = S5P6442_PA_I2S1,
85 .end = S5P6442_PA_I2S1 + 0x100 - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = DMACH_I2S1_TX,
90 .end = DMACH_I2S1_TX,
91 .flags = IORESOURCE_DMA,
92 },
93 [2] = {
94 .start = DMACH_I2S1_RX,
95 .end = DMACH_I2S1_RX,
96 .flags = IORESOURCE_DMA,
97 },
98};
99
100struct platform_device s5p6442_device_iis1 = {
101 .name = "s3c64xx-iis",
102 .id = 1,
103 .num_resources = ARRAY_SIZE(s5p6442_iis1_resource),
104 .resource = s5p6442_iis1_resource,
105 .dev = {
106 .platform_data = &s3c_i2s_pdata,
107 },
108};
109
110/* PCM Controller platform_devices */
111
112static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
113{
114 switch (pdev->id) {
115 case 0:
116 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3));
117 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3));
118 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3));
119 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3));
120 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3));
121 break;
122
123 case 1:
124 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3));
125 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3));
126 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3));
127 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3));
128 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3));
129 break;
130
131 default:
132 printk(KERN_DEBUG "Invalid PCM Controller number!");
133 return -EINVAL;
134 }
135
136 return 0;
137}
138
139static struct s3c_audio_pdata s3c_pcm_pdata = {
140 .cfg_gpio = s5p6442_pcm_cfg_gpio,
141};
142
143static struct resource s5p6442_pcm0_resource[] = {
144 [0] = {
145 .start = S5P6442_PA_PCM0,
146 .end = S5P6442_PA_PCM0 + 0x100 - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = DMACH_PCM0_TX,
151 .end = DMACH_PCM0_TX,
152 .flags = IORESOURCE_DMA,
153 },
154 [2] = {
155 .start = DMACH_PCM0_RX,
156 .end = DMACH_PCM0_RX,
157 .flags = IORESOURCE_DMA,
158 },
159};
160
161struct platform_device s5p6442_device_pcm0 = {
162 .name = "samsung-pcm",
163 .id = 0,
164 .num_resources = ARRAY_SIZE(s5p6442_pcm0_resource),
165 .resource = s5p6442_pcm0_resource,
166 .dev = {
167 .platform_data = &s3c_pcm_pdata,
168 },
169};
170
171static struct resource s5p6442_pcm1_resource[] = {
172 [0] = {
173 .start = S5P6442_PA_PCM1,
174 .end = S5P6442_PA_PCM1 + 0x100 - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .start = DMACH_PCM1_TX,
179 .end = DMACH_PCM1_TX,
180 .flags = IORESOURCE_DMA,
181 },
182 [2] = {
183 .start = DMACH_PCM1_RX,
184 .end = DMACH_PCM1_RX,
185 .flags = IORESOURCE_DMA,
186 },
187};
188
189struct platform_device s5p6442_device_pcm1 = {
190 .name = "samsung-pcm",
191 .id = 1,
192 .num_resources = ARRAY_SIZE(s5p6442_pcm1_resource),
193 .resource = s5p6442_pcm1_resource,
194 .dev = {
195 .platform_data = &s3c_pcm_pdata,
196 },
197};
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
new file mode 100644
index 000000000000..30199525daca
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -0,0 +1,123 @@
1/* linux/arch/arm/mach-s5p6442/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5P6442_SPI_SRCCLK_PCLK] = "pclk",
25 [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
37{
38 switch (pdev->id) {
39 case 0:
40 s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
46 break;
47
48 default:
49 dev_err(&pdev->dev, "Invalid SPI Controller number!");
50 return -EINVAL;
51 }
52
53 return 0;
54}
55
56static struct resource s5p6442_spi0_resource[] = {
57 [0] = {
58 .start = S5P6442_PA_SPI,
59 .end = S5P6442_PA_SPI + 0x100 - 1,
60 .flags = IORESOURCE_MEM,
61 },
62 [1] = {
63 .start = DMACH_SPI0_TX,
64 .end = DMACH_SPI0_TX,
65 .flags = IORESOURCE_DMA,
66 },
67 [2] = {
68 .start = DMACH_SPI0_RX,
69 .end = DMACH_SPI0_RX,
70 .flags = IORESOURCE_DMA,
71 },
72 [3] = {
73 .start = IRQ_SPI0,
74 .end = IRQ_SPI0,
75 .flags = IORESOURCE_IRQ,
76 },
77};
78
79static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
80 .cfg_gpio = s5p6442_spi_cfg_gpio,
81 .fifo_lvl_mask = 0x1ff,
82 .rx_lvl_offset = 15,
83};
84
85static u64 spi_dmamask = DMA_BIT_MASK(32);
86
87struct platform_device s5p6442_device_spi = {
88 .name = "s3c64xx-spi",
89 .id = 0,
90 .num_resources = ARRAY_SIZE(s5p6442_spi0_resource),
91 .resource = s5p6442_spi0_resource,
92 .dev = {
93 .dma_mask = &spi_dmamask,
94 .coherent_dma_mask = DMA_BIT_MASK(32),
95 .platform_data = &s5p6442_spi0_pdata,
96 },
97};
98
99void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
100{
101 struct s3c64xx_spi_info *pd;
102
103 /* Reject invalid configuration */
104 if (!num_cs || src_clk_nr < 0
105 || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
106 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
107 return;
108 }
109
110 switch (cntrlr) {
111 case 0:
112 pd = &s5p6442_spi0_pdata;
113 break;
114 default:
115 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
116 __func__, cntrlr);
117 return;
118 }
119
120 pd->num_cs = num_cs;
121 pd->src_clk_nr = src_clk_nr;
122 pd->src_clk_name = spi_src_clks[src_clk_nr];
123}
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c
new file mode 100644
index 000000000000..ad4f8704b93d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dma.c
@@ -0,0 +1,105 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22
23#include <plat/devs.h>
24#include <plat/irqs.h>
25
26#include <mach/map.h>
27#include <mach/irqs.h>
28
29#include <plat/s3c-pl330-pdata.h>
30
31static u64 dma_dmamask = DMA_BIT_MASK(32);
32
33static struct resource s5p6442_pdma_resource[] = {
34 [0] = {
35 .start = S5P6442_PA_PDMA,
36 .end = S5P6442_PA_PDMA + SZ_4K,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_PDMA,
41 .end = IRQ_PDMA,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static struct s3c_pl330_platdata s5p6442_pdma_pdata = {
47 .peri = {
48 [0] = DMACH_UART0_RX,
49 [1] = DMACH_UART0_TX,
50 [2] = DMACH_UART1_RX,
51 [3] = DMACH_UART1_TX,
52 [4] = DMACH_UART2_RX,
53 [5] = DMACH_UART2_TX,
54 [6] = DMACH_MAX,
55 [7] = DMACH_MAX,
56 [8] = DMACH_MAX,
57 [9] = DMACH_I2S0_RX,
58 [10] = DMACH_I2S0_TX,
59 [11] = DMACH_I2S0S_TX,
60 [12] = DMACH_I2S1_RX,
61 [13] = DMACH_I2S1_TX,
62 [14] = DMACH_MAX,
63 [15] = DMACH_MAX,
64 [16] = DMACH_SPI0_RX,
65 [17] = DMACH_SPI0_TX,
66 [18] = DMACH_MAX,
67 [19] = DMACH_MAX,
68 [20] = DMACH_PCM0_RX,
69 [21] = DMACH_PCM0_TX,
70 [22] = DMACH_PCM1_RX,
71 [23] = DMACH_PCM1_TX,
72 [24] = DMACH_MAX,
73 [25] = DMACH_MAX,
74 [26] = DMACH_MAX,
75 [27] = DMACH_MSM_REQ0,
76 [28] = DMACH_MSM_REQ1,
77 [29] = DMACH_MSM_REQ2,
78 [30] = DMACH_MSM_REQ3,
79 [31] = DMACH_MAX,
80 },
81};
82
83static struct platform_device s5p6442_device_pdma = {
84 .name = "s3c-pl330",
85 .id = 1,
86 .num_resources = ARRAY_SIZE(s5p6442_pdma_resource),
87 .resource = s5p6442_pdma_resource,
88 .dev = {
89 .dma_mask = &dma_dmamask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 .platform_data = &s5p6442_pdma_pdata,
92 },
93};
94
95static struct platform_device *s5p6442_dmacs[] __initdata = {
96 &s5p6442_device_pdma,
97};
98
99static int __init s5p6442_dma_init(void)
100{
101 platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs));
102
103 return 0;
104}
105arch_initcall(s5p6442_dma_init);
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h
new file mode 100644
index 000000000000..81209eb1409b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
index da665809f6e4..02c23749c023 100644
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -77,8 +77,9 @@
77 77
78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) 78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
79 79
80#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ 80#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
81 (S5P_IRQ_EINT_BASE + (x)-16)) 81#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE)
82
82/* Set the default NR_IRQS */ 83/* Set the default NR_IRQS */
83 84
84#define NR_IRQS (IRQ_EINT(31) + 1) 85#define NR_IRQS (IRQ_EINT(31) + 1)
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 685277d792fb..32ca424ef7f9 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -34,6 +34,9 @@
34#define S5P6442_PA_VIC2 (0xE4200000) 34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2 35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36 36
37#define S5P6442_PA_MDMA 0xE8000000
38#define S5P6442_PA_PDMA 0xE9000000
39
37#define S5P6442_PA_TIMER (0xEA000000) 40#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER 41#define S5P_PA_TIMER S5P6442_PA_TIMER
39 42
@@ -51,6 +54,16 @@
51#define S5P6442_PA_SDRAM (0x20000000) 54#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM 55#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53 56
57#define S5P6442_PA_SPI 0xEC300000
58
59/* I2S */
60#define S5P6442_PA_I2S0 0xC0B00000
61#define S5P6442_PA_I2S1 0xF2200000
62
63/* PCM */
64#define S5P6442_PA_PCM0 0xF2400000
65#define S5P6442_PA_PCM1 0xF2500000
66
54/* compatibiltiy defines. */ 67/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART 68#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0 69#define S3C_PA_IIC S5P6442_PA_IIC0
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
index 15e8525da0f1..2724b37def31 100644
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2010 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5P6442 - pwm clock and timer support 13 * S5P6442 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..7fd88205a97c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5P6442_PLAT_SPI_CLKS_H
12#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
13
14#define S5P6442_SPI_SRCCLK_PCLK 0
15#define S5P6442_SPI_SRCCLK_SCLK 1
16
17#endif /* __S5P6442_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index 0d63371ce07c..ebcf99777259 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -65,6 +65,7 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
65}; 65};
66 66
67static struct platform_device *smdk6442_devices[] __initdata = { 67static struct platform_device *smdk6442_devices[] __initdata = {
68 &s5p6442_device_iis0,
68}; 69};
69 70
70static void __init smdk6442_map_io(void) 71static void __init smdk6442_map_io(void)
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c
new file mode 100644
index 000000000000..662695dd7761
--- /dev/null
+++ b/arch/arm/mach-s5p6442/setup-i2c0.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C0 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <plat/iic.h>
21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{
24 /* Will be populated later */
25}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 08:37:44 -0500