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-rw-r--r--arch/arm/mach-s5p6442/include/mach/debug-macro.S36
-rw-r--r--arch/arm/mach-s5p6442/include/mach/entry-macro.S48
-rw-r--r--arch/arm/mach-s5p6442/include/mach/gpio.h123
-rw-r--r--arch/arm/mach-s5p6442/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5p6442/include/mach/io.h17
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h58
-rw-r--r--arch/arm/mach-s5p6442/include/mach/memory.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h69
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-clock.h103
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/vmalloc.h17
16 files changed, 713 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
new file mode 100644
index 000000000000..1aae691e58ef
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 .macro addruart, rx
19 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1
21 ldreq \rx, = S3C_PA_UART
22 ldrne \rx, = S3C_VA_UART
23#if CONFIG_DEBUG_S3C_UART != 0
24 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
25#endif
26 .endm
27
28#define fifo_full fifo_full_s5pv210
29#define fifo_level fifo_level_s5pv210
30
31/* include the reset of the code which will do the work, we're only
32 * compiling for a single cpu processor type so the default of s3c2440
33 * will be fine with us.
34 */
35
36#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
new file mode 100644
index 000000000000..6d574edbf1ae
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
@@ -0,0 +1,48 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5P6442
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 clzne \irqstat, \irqstat
47 subne \irqnr, \irqnr, \irqstat
48 .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
new file mode 100644
index 000000000000..b8715df2fdab
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/gpio.h
@@ -0,0 +1,123 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5P6442_GPIO_A0_NR (8)
23#define S5P6442_GPIO_A1_NR (2)
24#define S5P6442_GPIO_B_NR (4)
25#define S5P6442_GPIO_C0_NR (5)
26#define S5P6442_GPIO_C1_NR (5)
27#define S5P6442_GPIO_D0_NR (2)
28#define S5P6442_GPIO_D1_NR (6)
29#define S5P6442_GPIO_E0_NR (8)
30#define S5P6442_GPIO_E1_NR (5)
31#define S5P6442_GPIO_F0_NR (8)
32#define S5P6442_GPIO_F1_NR (8)
33#define S5P6442_GPIO_F2_NR (8)
34#define S5P6442_GPIO_F3_NR (6)
35#define S5P6442_GPIO_G0_NR (7)
36#define S5P6442_GPIO_G1_NR (7)
37#define S5P6442_GPIO_G2_NR (7)
38#define S5P6442_GPIO_H0_NR (8)
39#define S5P6442_GPIO_H1_NR (8)
40#define S5P6442_GPIO_H2_NR (8)
41#define S5P6442_GPIO_H3_NR (8)
42#define S5P6442_GPIO_J0_NR (8)
43#define S5P6442_GPIO_J1_NR (6)
44#define S5P6442_GPIO_J2_NR (8)
45#define S5P6442_GPIO_J3_NR (8)
46#define S5P6442_GPIO_J4_NR (5)
47
48/* GPIO bank numbers */
49
50/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
51 * space for debugging purposes so that any accidental
52 * change from one gpio bank to another can be caught.
53*/
54
55#define S5P6442_GPIO_NEXT(__gpio) \
56 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
57
58enum s5p_gpio_number {
59 S5P6442_GPIO_A0_START = 0,
60 S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
61 S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
62 S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
63 S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
64 S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
65 S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
66 S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
67 S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
68 S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
69 S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
70 S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
71 S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
72 S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
73 S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
74 S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
75 S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
76 S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
77 S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
78 S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
79 S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
80 S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
81 S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
82 S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
83 S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
84};
85
86/* S5P6442 GPIO number definitions. */
87#define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr))
88#define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr))
89#define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr))
90#define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr))
91#define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr))
92#define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr))
93#define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr))
94#define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr))
95#define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr))
96#define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr))
97#define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr))
98#define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr))
99#define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr))
100#define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr))
101#define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr))
102#define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr))
103#define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr))
104#define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr))
105#define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr))
106#define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr))
107#define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr))
108#define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr))
109#define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr))
110#define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr))
111#define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr))
112
113/* the end of the S5P6442 specific gpios */
114#define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
115#define S3C_GPIO_END S5P6442_GPIO_END
116
117/* define the number of gpios we need to the one after the GPJ4() range */
118#define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \
119 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
120
121#include <asm-generic/gpio.h>
122
123#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
new file mode 100644
index 000000000000..8cd7b67b49d4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
new file mode 100644
index 000000000000..5d2195ad0b67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/io.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Default IO routines for S5P6442
6 */
7
8#ifndef __ASM_ARM_ARCH_IO_H
9#define __ASM_ARM_ARCH_IO_H
10
11/* No current ISA/PCI bus support. */
12#define __io(a) __typesafe_io(a)
13#define __mem_pci(a) (a)
14
15#define IO_SPACE_LIMIT (0xFFFFFFFF)
16
17#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
new file mode 100644
index 000000000000..da665809f6e4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -0,0 +1,86 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0 */
19#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
20#define IRQ_BATF S5P_IRQ_VIC0(17)
21#define IRQ_MDMA S5P_IRQ_VIC0(18)
22#define IRQ_PDMA S5P_IRQ_VIC0(19)
23#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
24#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
25#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
26#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
27#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
28#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
29#define IRQ_WDT S5P_IRQ_VIC0(27)
30#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
31#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
32#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
33
34/* VIC1 */
35#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0)
36#define IRQ_ONENAND S5P_IRQ_VIC1(7)
37#define IRQ_UART0 S5P_IRQ_VIC1(10)
38#define IRQ_UART1 S5P_IRQ_VIC1(11)
39#define IRQ_UART2 S5P_IRQ_VIC1(12)
40#define IRQ_SPI0 S5P_IRQ_VIC1(15)
41#define IRQ_IIC S5P_IRQ_VIC1(19)
42#define IRQ_IIC1 S5P_IRQ_VIC1(20)
43#define IRQ_IIC2 S5P_IRQ_VIC1(21)
44#define IRQ_OTG S5P_IRQ_VIC1(24)
45#define IRQ_MSM S5P_IRQ_VIC1(25)
46#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
47#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
48#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
49#define IRQ_COMMRX S5P_IRQ_VIC1(29)
50#define IRQ_COMMTX S5P_IRQ_VIC1(30)
51
52/* VIC2 */
53#define IRQ_LCD0 S5P_IRQ_VIC2(0)
54#define IRQ_LCD1 S5P_IRQ_VIC2(1)
55#define IRQ_LCD2 S5P_IRQ_VIC2(2)
56#define IRQ_LCD3 S5P_IRQ_VIC2(3)
57#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
58#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
59#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
60#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
61#define IRQ_JPEG S5P_IRQ_VIC2(8)
62#define IRQ_3D S5P_IRQ_VIC2(10)
63#define IRQ_Mixer S5P_IRQ_VIC2(11)
64#define IRQ_MFC S5P_IRQ_VIC2(14)
65#define IRQ_TVENC S5P_IRQ_VIC2(15)
66#define IRQ_I2S0 S5P_IRQ_VIC2(16)
67#define IRQ_I2S1 S5P_IRQ_VIC2(17)
68#define IRQ_RP S5P_IRQ_VIC2(19)
69#define IRQ_PCM0 S5P_IRQ_VIC2(20)
70#define IRQ_PCM1 S5P_IRQ_VIC2(21)
71#define IRQ_ADC S5P_IRQ_VIC2(23)
72#define IRQ_PENDN S5P_IRQ_VIC2(24)
73#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
74#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
75#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
76#define IRQ_VIC_END S5P_IRQ_VIC2(31)
77
78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
79
80#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
81 (S5P_IRQ_EINT_BASE + (x)-16))
82/* Set the default NR_IRQS */
83
84#define NR_IRQS (IRQ_EINT(31) + 1)
85
86#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
new file mode 100644
index 000000000000..685277d792fb
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -0,0 +1,58 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/map.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5P6442_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6442_PA_CHIPID
21
22#define S5P6442_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5P6442_PA_SYSCON
24
25#define S5P6442_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5P6442_PA_GPIO
27
28#define S5P6442_PA_VIC0 (0xE4000000)
29#define S5P_PA_VIC0 S5P6442_PA_VIC0
30
31#define S5P6442_PA_VIC1 (0xE4100000)
32#define S5P_PA_VIC1 S5P6442_PA_VIC1
33
34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36
37#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER
39
40#define S5P6442_PA_SYSTIMER (0xEA100000)
41
42#define S5P6442_PA_UART (0xEC000000)
43
44#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
45#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400)
46#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800)
47#define S5P_SZ_UART SZ_256
48
49#define S5P6442_PA_IIC0 (0xEC100000)
50
51#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53
54/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0
57
58#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
new file mode 100644
index 000000000000..9ddd877ba2ea
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/memory.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE SZ_8M
18
19#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..15e8525da0f1
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright 2010 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 *
12 * S5P6442 - pwm clock and timer support
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19#ifndef __ASM_ARCH_PWMCLK_H
20#define __ASM_ARCH_PWMCLK_H __FILE__
21
22/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0.
25 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks.
28 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32}
33
34/**
35 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
36 * @tcfg1: The tcfg1 setting, shifted down.
37 *
38 * Get the divisor value for the given tcfg1 setting. We assume the
39 * caller has already checked to see if this is not a TCLK source.
40 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{
43 return 1 << (1 + tcfg1);
44}
45
46/**
47 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
48 *
49 * Return true if we have a /1 in the tdiv setting.
50 */
51static inline unsigned int pwm_tdiv_has_div1(void)
52{
53 return 0;
54}
55
56/**
57 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
58 * @div: The divisor to calculate the bit information for.
59 *
60 * Turn a divisor into the necessary bit field for TCFG1.
61 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{
64 return ilog2(div) - 1;
65}
66
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
68
69#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
new file mode 100644
index 000000000000..d8360b5d4ece
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -0,0 +1,103 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23#define S5P_VPLL_LOCK S5P_CLKREG(0x20)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x108)
27#define S5P_EPLL_CON S5P_CLKREG(0x110)
28#define S5P_VPLL_CON S5P_CLKREG(0x120)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34#define S5P_CLK_SRC4 S5P_CLKREG(0x210)
35#define S5P_CLK_SRC5 S5P_CLKREG(0x214)
36#define S5P_CLK_SRC6 S5P_CLKREG(0x218)
37
38#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280)
39#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284)
40
41#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
42#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
43#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
44#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
45#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
46#define S5P_CLK_DIV5 S5P_CLKREG(0x314)
47#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
48
49#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C)
50
51/* CLK_OUT */
52#define S5P_CLK_OUT_SHIFT (12)
53#define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT)
54#define S5P_CLK_OUT S5P_CLKREG(0x500)
55
56#define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000)
57#define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004)
58
59#define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100)
60#define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104)
61
62#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
63
64/* Register Bit definition */
65#define S5P_EPLL_EN (1<<31)
66#define S5P_EPLL_MASK 0xffffffff
67#define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s)))
68
69/* CLKDIV0 */
70#define S5P_CLKDIV0_APLL_SHIFT (0)
71#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT)
72#define S5P_CLKDIV0_A2M_SHIFT (4)
73#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT)
74#define S5P_CLKDIV0_D0CLK_SHIFT (16)
75#define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
76#define S5P_CLKDIV0_P0CLK_SHIFT (20)
77#define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
78#define S5P_CLKDIV0_D1CLK_SHIFT (24)
79#define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
80#define S5P_CLKDIV0_P1CLK_SHIFT (28)
81#define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
82
83/* Clock MUX status Registers */
84#define S5P_CLK_MUX_STAT0_APLL_SHIFT (0)
85#define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
86#define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4)
87#define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
88#define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8)
89#define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
90#define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12)
91#define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
92#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16)
93#define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
94#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20)
95#define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
96#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24)
97#define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
98#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24)
99#define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
100#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28)
101#define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
102
103#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
new file mode 100644
index 000000000000..73782b52a83b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
new file mode 100644
index 000000000000..8bcd8ed0c3c3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
new file mode 100644
index 000000000000..e1d4cabf8297
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/tick.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5P6442 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
new file mode 100644
index 000000000000..ff8f2fcadeb7
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s5p6442/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S5P6442 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
new file mode 100644
index 000000000000..5ac7cbeeb987
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be3333688c20
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S5P6442 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 13:20:40 -0400