diff options
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r-- | arch/arm/mach-s3c64xx/clock.c | 126 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/dev-audio.c | 11 |
2 files changed, 77 insertions, 60 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 1a6f85777449..803711e283b2 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -149,25 +149,6 @@ static struct clk init_clocks_off[] = { | |||
149 | .enable = s3c64xx_pclk_ctrl, | 149 | .enable = s3c64xx_pclk_ctrl, |
150 | .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, | 150 | .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, |
151 | }, { | 151 | }, { |
152 | .name = "iis", | ||
153 | .devname = "samsung-i2s.0", | ||
154 | .parent = &clk_p, | ||
155 | .enable = s3c64xx_pclk_ctrl, | ||
156 | .ctrlbit = S3C_CLKCON_PCLK_IIS0, | ||
157 | }, { | ||
158 | .name = "iis", | ||
159 | .devname = "samsung-i2s.1", | ||
160 | .parent = &clk_p, | ||
161 | .enable = s3c64xx_pclk_ctrl, | ||
162 | .ctrlbit = S3C_CLKCON_PCLK_IIS1, | ||
163 | }, { | ||
164 | #ifdef CONFIG_CPU_S3C6410 | ||
165 | .name = "iis", | ||
166 | .parent = &clk_p, | ||
167 | .enable = s3c64xx_pclk_ctrl, | ||
168 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, | ||
169 | }, { | ||
170 | #endif | ||
171 | .name = "keypad", | 152 | .name = "keypad", |
172 | .parent = &clk_p, | 153 | .parent = &clk_p, |
173 | .enable = s3c64xx_pclk_ctrl, | 154 | .enable = s3c64xx_pclk_ctrl, |
@@ -337,6 +318,32 @@ static struct clk clk_48m_spi1 = { | |||
337 | .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, | 318 | .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, |
338 | }; | 319 | }; |
339 | 320 | ||
321 | static struct clk clk_i2s0 = { | ||
322 | .name = "iis", | ||
323 | .devname = "samsung-i2s.0", | ||
324 | .parent = &clk_p, | ||
325 | .enable = s3c64xx_pclk_ctrl, | ||
326 | .ctrlbit = S3C_CLKCON_PCLK_IIS0, | ||
327 | }; | ||
328 | |||
329 | static struct clk clk_i2s1 = { | ||
330 | .name = "iis", | ||
331 | .devname = "samsung-i2s.1", | ||
332 | .parent = &clk_p, | ||
333 | .enable = s3c64xx_pclk_ctrl, | ||
334 | .ctrlbit = S3C_CLKCON_PCLK_IIS1, | ||
335 | }; | ||
336 | |||
337 | #ifdef CONFIG_CPU_S3C6410 | ||
338 | static struct clk clk_i2s2 = { | ||
339 | .name = "iis", | ||
340 | .devname = "samsung-i2s.2", | ||
341 | .parent = &clk_p, | ||
342 | .enable = s3c64xx_pclk_ctrl, | ||
343 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, | ||
344 | }; | ||
345 | #endif | ||
346 | |||
340 | static struct clk init_clocks[] = { | 347 | static struct clk init_clocks[] = { |
341 | { | 348 | { |
342 | .name = "lcd", | 349 | .name = "lcd", |
@@ -660,6 +667,7 @@ static struct clksrc_sources clkset_audio1 = { | |||
660 | .nr_sources = ARRAY_SIZE(clkset_audio1_list), | 667 | .nr_sources = ARRAY_SIZE(clkset_audio1_list), |
661 | }; | 668 | }; |
662 | 669 | ||
670 | #ifdef CONFIG_CPU_S3C6410 | ||
663 | static struct clk *clkset_audio2_list[] = { | 671 | static struct clk *clkset_audio2_list[] = { |
664 | [0] = &clk_mout_epll.clk, | 672 | [0] = &clk_mout_epll.clk, |
665 | [1] = &clk_dout_mpll, | 673 | [1] = &clk_dout_mpll, |
@@ -672,6 +680,7 @@ static struct clksrc_sources clkset_audio2 = { | |||
672 | .sources = clkset_audio2_list, | 680 | .sources = clkset_audio2_list, |
673 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), | 681 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), |
674 | }; | 682 | }; |
683 | #endif | ||
675 | 684 | ||
676 | static struct clksrc_clk clksrcs[] = { | 685 | static struct clksrc_clk clksrcs[] = { |
677 | { | 686 | { |
@@ -685,36 +694,6 @@ static struct clksrc_clk clksrcs[] = { | |||
685 | .sources = &clkset_uhost, | 694 | .sources = &clkset_uhost, |
686 | }, { | 695 | }, { |
687 | .clk = { | 696 | .clk = { |
688 | .name = "audio-bus", | ||
689 | .devname = "samsung-i2s.0", | ||
690 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, | ||
691 | .enable = s3c64xx_sclk_ctrl, | ||
692 | }, | ||
693 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, | ||
694 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, | ||
695 | .sources = &clkset_audio0, | ||
696 | }, { | ||
697 | .clk = { | ||
698 | .name = "audio-bus", | ||
699 | .devname = "samsung-i2s.1", | ||
700 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, | ||
701 | .enable = s3c64xx_sclk_ctrl, | ||
702 | }, | ||
703 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, | ||
704 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, | ||
705 | .sources = &clkset_audio1, | ||
706 | }, { | ||
707 | .clk = { | ||
708 | .name = "audio-bus", | ||
709 | .devname = "samsung-i2s.2", | ||
710 | .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2, | ||
711 | .enable = s3c64xx_sclk_ctrl, | ||
712 | }, | ||
713 | .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 }, | ||
714 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, | ||
715 | .sources = &clkset_audio2, | ||
716 | }, { | ||
717 | .clk = { | ||
718 | .name = "irda-bus", | 697 | .name = "irda-bus", |
719 | .ctrlbit = S3C_CLKCON_SCLK_IRDA, | 698 | .ctrlbit = S3C_CLKCON_SCLK_IRDA, |
720 | .enable = s3c64xx_sclk_ctrl, | 699 | .enable = s3c64xx_sclk_ctrl, |
@@ -805,6 +784,43 @@ static struct clksrc_clk clk_sclk_spi1 = { | |||
805 | .sources = &clkset_spi_mmc, | 784 | .sources = &clkset_spi_mmc, |
806 | }; | 785 | }; |
807 | 786 | ||
787 | static struct clksrc_clk clk_audio_bus0 = { | ||
788 | .clk = { | ||
789 | .name = "audio-bus", | ||
790 | .devname = "samsung-i2s.0", | ||
791 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, | ||
792 | .enable = s3c64xx_sclk_ctrl, | ||
793 | }, | ||
794 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, | ||
795 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, | ||
796 | .sources = &clkset_audio0, | ||
797 | }; | ||
798 | |||
799 | static struct clksrc_clk clk_audio_bus1 = { | ||
800 | .clk = { | ||
801 | .name = "audio-bus", | ||
802 | .devname = "samsung-i2s.1", | ||
803 | .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, | ||
804 | .enable = s3c64xx_sclk_ctrl, | ||
805 | }, | ||
806 | .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, | ||
807 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, | ||
808 | .sources = &clkset_audio1, | ||
809 | }; | ||
810 | |||
811 | #ifdef CONFIG_CPU_S3C6410 | ||
812 | static struct clksrc_clk clk_audio_bus2 = { | ||
813 | .clk = { | ||
814 | .name = "audio-bus", | ||
815 | .devname = "samsung-i2s.2", | ||
816 | .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2, | ||
817 | .enable = s3c64xx_sclk_ctrl, | ||
818 | }, | ||
819 | .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 }, | ||
820 | .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, | ||
821 | .sources = &clkset_audio2, | ||
822 | }; | ||
823 | #endif | ||
808 | /* Clock initialisation code */ | 824 | /* Clock initialisation code */ |
809 | 825 | ||
810 | static struct clksrc_clk *init_parents[] = { | 826 | static struct clksrc_clk *init_parents[] = { |
@@ -820,6 +836,8 @@ static struct clksrc_clk *clksrc_cdev[] = { | |||
820 | &clk_sclk_mmc2, | 836 | &clk_sclk_mmc2, |
821 | &clk_sclk_spi0, | 837 | &clk_sclk_spi0, |
822 | &clk_sclk_spi1, | 838 | &clk_sclk_spi1, |
839 | &clk_audio_bus0, | ||
840 | &clk_audio_bus1, | ||
823 | }; | 841 | }; |
824 | 842 | ||
825 | static struct clk *clk_cdev[] = { | 843 | static struct clk *clk_cdev[] = { |
@@ -828,6 +846,8 @@ static struct clk *clk_cdev[] = { | |||
828 | &clk_hsmmc2, | 846 | &clk_hsmmc2, |
829 | &clk_48m_spi0, | 847 | &clk_48m_spi0, |
830 | &clk_48m_spi1, | 848 | &clk_48m_spi1, |
849 | &clk_i2s0, | ||
850 | &clk_i2s1, | ||
831 | }; | 851 | }; |
832 | 852 | ||
833 | static struct clk_lookup s3c64xx_clk_lookup[] = { | 853 | static struct clk_lookup s3c64xx_clk_lookup[] = { |
@@ -844,6 +864,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = { | |||
844 | CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0), | 864 | CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0), |
845 | CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | 865 | CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), |
846 | CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1), | 866 | CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1), |
867 | CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), | ||
868 | CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk), | ||
869 | CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), | ||
870 | CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk), | ||
871 | #ifdef CONFIG_CPU_S3C6410 | ||
872 | CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), | ||
873 | CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk), | ||
874 | #endif | ||
847 | }; | 875 | }; |
848 | 876 | ||
849 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) | 877 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) |
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index 35f3e07eaccc..e367e87bbc29 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c | |||
@@ -23,11 +23,6 @@ | |||
23 | #include <linux/platform_data/asoc-s3c.h> | 23 | #include <linux/platform_data/asoc-s3c.h> |
24 | #include <plat/gpio-cfg.h> | 24 | #include <plat/gpio-cfg.h> |
25 | 25 | ||
26 | static const char *rclksrc[] = { | ||
27 | [0] = "iis", | ||
28 | [1] = "audio-bus", | ||
29 | }; | ||
30 | |||
31 | static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev) | 26 | static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev) |
32 | { | 27 | { |
33 | unsigned int base; | 28 | unsigned int base; |
@@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = { | |||
64 | 59 | ||
65 | static struct s3c_audio_pdata i2sv3_pdata = { | 60 | static struct s3c_audio_pdata i2sv3_pdata = { |
66 | .cfg_gpio = s3c64xx_i2s_cfg_gpio, | 61 | .cfg_gpio = s3c64xx_i2s_cfg_gpio, |
67 | .type = { | ||
68 | .i2s = { | ||
69 | .src_clk = rclksrc, | ||
70 | }, | ||
71 | }, | ||
72 | }; | 62 | }; |
73 | 63 | ||
74 | struct platform_device s3c64xx_device_iis0 = { | 64 | struct platform_device s3c64xx_device_iis0 = { |
@@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = { | |||
110 | .type = { | 100 | .type = { |
111 | .i2s = { | 101 | .i2s = { |
112 | .quirks = QUIRK_PRI_6CHAN, | 102 | .quirks = QUIRK_PRI_6CHAN, |
113 | .src_clk = rclksrc, | ||
114 | }, | 103 | }, |
115 | }, | 104 | }, |
116 | }; | 105 | }; |