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-rw-r--r--arch/arm/mach-s3c64xx/Makefile65
-rw-r--r--arch/arm/mach-s3c64xx/clock.c4
-rw-r--r--arch/arm/mach-s3c64xx/common.c (renamed from arch/arm/mach-s3c64xx/irq-eint.c)192
-rw-r--r--arch/arm/mach-s3c64xx/common.h57
-rw-r--r--arch/arm/mach-s3c64xx/cpu.c161
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/system.h11
-rw-r--r--arch/arm/mach-s3c64xx/irq.c47
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq5.c3
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq7.c3
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c5
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c6
20 files changed, 307 insertions, 281 deletions
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index cfc0b9941808..f37016cebbe3 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -10,54 +10,49 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core files 13# Core
14obj-y += cpu.o
15obj-y += clock.o
16 14
17# Core support for S3C6400 system 15obj-y += common.o clock.o
16
17# Core support
18 18
19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o 19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o 20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
21 21
22obj-y += irq.o 22# PM
23obj-y += irq-eint.o 23
24obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o
24 25
25# DMA support 26# DMA support
26 27
27obj-$(CONFIG_S3C64XX_DMA) += dma.o 28obj-$(CONFIG_S3C64XX_DMA) += dma.o
28 29
29# Device setup 30# Device support
30 31
31obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o 32obj-y += dev-uart.o
32obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 33obj-y += dev-audio.o
33obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o 34obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
34obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
35obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
36obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
37obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
38 35
39# PM 36# Device setup
40 37
41obj-$(CONFIG_PM) += pm.o 38obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
42obj-$(CONFIG_PM) += sleep.o 39obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
43obj-$(CONFIG_PM) += irq-pm.o 40obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
41obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
42obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
43obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
44obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
44 45
45# Machine support 46# Machine support
46 47
47obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o 48obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
48obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o 49obj-$(CONFIG_MACH_HMT) += mach-hmt.o
49obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o 50obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o
50obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o 51obj-$(CONFIG_MACH_NCP) += mach-ncp.o
51obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o 52obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o
52obj-$(CONFIG_MACH_NCP) += mach-ncp.o 53obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o
53obj-$(CONFIG_MACH_HMT) += mach-hmt.o 54obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o
54obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o 55obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o
55obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o 56obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
56obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o 57obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
57obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o 58obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
58
59# device support
60
61obj-y += dev-uart.o
62obj-y += dev-audio.o
63obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 39c238d7a3dc..625219b9cefc 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -705,7 +705,7 @@ static struct clksrc_clk *init_parents[] = {
705 705
706#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 706#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
707 707
708void __init_or_cpufreq s3c6400_setup_clocks(void) 708void __init_or_cpufreq s3c64xx_setup_clocks(void)
709{ 709{
710 struct clk *xtal_clk; 710 struct clk *xtal_clk;
711 unsigned long xtal; 711 unsigned long xtal;
@@ -804,7 +804,7 @@ static struct clk *clks[] __initdata = {
804 * as ARMCLK as well as the necessary parent clocks. 804 * as ARMCLK as well as the necessary parent clocks.
805 * 805 *
806 * This call does not setup the clocks, which is left to the 806 * This call does not setup the clocks, which is left to the
807 * s3c6400_setup_clocks() call which may be needed by the cpufreq 807 * s3c64xx_setup_clocks() call which may be needed by the cpufreq
808 * or resume code to re-set the clocks if the bootloader has changed 808 * or resume code to re-set the clocks if the bootloader has changed
809 * them. 809 * them.
810 */ 810 */
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c
index 4d203be1f4c3..35182ba049da 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -1,11 +1,13 @@
1/* arch/arm/plat-s3c64xx/irq-eint.c 1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
2 * 4 *
3 * Copyright 2008 Openmoko, Inc. 5 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 6 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 7 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 8 * http://armlinux.simtec.co.uk/
7 * 9 *
8 * S3C64XX - Interrupt handling for IRQ_EINT(x) 10 * Common Codes for S3C64XX machines
9 * 11 *
10 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
@@ -13,21 +15,183 @@
13 */ 15 */
14 16
15#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/module.h>
16#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/ioport.h>
17#include <linux/sysdev.h> 22#include <linux/sysdev.h>
18#include <linux/gpio.h> 23#include <linux/serial_core.h>
19#include <linux/irq.h> 24#include <linux/platform_device.h>
20#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/dma-mapping.h>
27#include <linux/irq.h>
28#include <linux/gpio.h>
21 29
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
22#include <asm/hardware/vic.h> 32#include <asm/hardware/vic.h>
23 33
24#include <plat/regs-irqtype.h> 34#include <mach/map.h>
35#include <mach/hardware.h>
25#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
26#include <plat/gpio-cfg.h>
27 37
28#include <mach/map.h>
29#include <plat/cpu.h> 38#include <plat/cpu.h>
39#include <plat/clock.h>
40#include <plat/devs.h>
30#include <plat/pm.h> 41#include <plat/pm.h>
42#include <plat/gpio-cfg.h>
43#include <plat/irq-uart.h>
44#include <plat/irq-vic-timer.h>
45#include <plat/regs-irqtype.h>
46#include <plat/regs-serial.h>
47#include <plat/watchdog-reset.h>
48
49#include "common.h"
50
51/* uart registration process */
52
53void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
54{
55 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
56}
57
58/* table of supported CPUs */
59
60static const char name_s3c6400[] = "S3C6400";
61static const char name_s3c6410[] = "S3C6410";
62
63static struct cpu_table cpu_ids[] __initdata = {
64 {
65 .idcode = S3C6400_CPU_ID,
66 .idmask = S3C64XX_CPU_MASK,
67 .map_io = s3c6400_map_io,
68 .init_clocks = s3c6400_init_clocks,
69 .init_uarts = s3c64xx_init_uarts,
70 .init = s3c6400_init,
71 .name = name_s3c6400,
72 }, {
73 .idcode = S3C6410_CPU_ID,
74 .idmask = S3C64XX_CPU_MASK,
75 .map_io = s3c6410_map_io,
76 .init_clocks = s3c6410_init_clocks,
77 .init_uarts = s3c64xx_init_uarts,
78 .init = s3c6410_init,
79 .name = name_s3c6410,
80 },
81};
82
83/* minimal IO mapping */
84
85/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
86#define UART_OFFS (S3C_PA_UART & 0xfffff)
87
88static struct map_desc s3c_iodesc[] __initdata = {
89 {
90 .virtual = (unsigned long)S3C_VA_SYS,
91 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C_VA_MEM,
96 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 }, {
100 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
101 .pfn = __phys_to_pfn(S3C_PA_UART),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 }, {
105 .virtual = (unsigned long)VA_VIC0,
106 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
107 .length = SZ_16K,
108 .type = MT_DEVICE,
109 }, {
110 .virtual = (unsigned long)VA_VIC1,
111 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
112 .length = SZ_16K,
113 .type = MT_DEVICE,
114 }, {
115 .virtual = (unsigned long)S3C_VA_TIMER,
116 .pfn = __phys_to_pfn(S3C_PA_TIMER),
117 .length = SZ_16K,
118 .type = MT_DEVICE,
119 }, {
120 .virtual = (unsigned long)S3C64XX_VA_GPIO,
121 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
122 .length = SZ_4K,
123 .type = MT_DEVICE,
124 }, {
125 .virtual = (unsigned long)S3C64XX_VA_MODEM,
126 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
127 .length = SZ_4K,
128 .type = MT_DEVICE,
129 }, {
130 .virtual = (unsigned long)S3C_VA_WATCHDOG,
131 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
132 .length = SZ_4K,
133 .type = MT_DEVICE,
134 }, {
135 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
136 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
137 .length = SZ_1K,
138 .type = MT_DEVICE,
139 },
140};
141
142struct sysdev_class s3c64xx_sysclass = {
143 .name = "s3c64xx-core",
144};
145
146static struct sys_device s3c64xx_sysdev = {
147 .cls = &s3c64xx_sysclass,
148};
149
150/* read cpu identification code */
151
152void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
153{
154 /* initialise the io descriptors we need for initialisation */
155 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
156 iotable_init(mach_desc, size);
157 init_consistent_dma_size(SZ_8M);
158
159 /* detect cpu id */
160 s3c64xx_init_cpu();
161
162 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
163}
164
165static __init int s3c64xx_sysdev_init(void)
166{
167 sysdev_class_register(&s3c64xx_sysclass);
168 return sysdev_register(&s3c64xx_sysdev);
169}
170core_initcall(s3c64xx_sysdev_init);
171
172/*
173 * setup the sources the vic should advertise resume
174 * for, even though it is not doing the wake
175 * (set_irq_wake needs to be valid)
176 */
177#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
178#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
179 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
180 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
181 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
182 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
183
184void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
185{
186 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
187
188 /* initialise the pair of VICs */
189 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
190 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
191
192 /* add the timer sub-irqs */
193 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
194}
31 195
32#define eint_offset(irq) ((irq) - IRQ_EINT(0)) 196#define eint_offset(irq) ((irq) - IRQ_EINT(0))
33#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) 197#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
@@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void)
209 373
210 return 0; 374 return 0;
211} 375}
212
213arch_initcall(s3c64xx_init_irq_eint); 376arch_initcall(s3c64xx_init_irq_eint);
377
378void s3c64xx_restart(char mode, const char *cmd)
379{
380 if (mode != 's')
381 arch_wdt_reset();
382
383 /* if all else fails, or mode was for soft, jump to 0 */
384 soft_restart(0);
385}
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
new file mode 100644
index 000000000000..8dc8ab6d8d6d
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * Common Header for S3C64XX machines
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
18#define __ARCH_ARM_MACH_S3C64XX_COMMON_H
19
20void s3c64xx_init_irq(u32 vic0, u32 vic1);
21void s3c64xx_init_io(struct map_desc *mach_desc, int size);
22
23void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
24void s3c64xx_setup_clocks(void);
25
26void s3c64xx_restart(char mode, const char *cmd);
27
28extern struct syscore_ops s3c64xx_irq_syscore_ops;
29extern struct sysdev_class s3c64xx_sysclass;
30
31#ifdef CONFIG_CPU_S3C6400
32
33extern int s3c6400_init(void);
34extern void s3c6400_init_irq(void);
35extern void s3c6400_map_io(void);
36extern void s3c6400_init_clocks(int xtal);
37
38#else
39#define s3c6400_init_clocks NULL
40#define s3c6400_map_io NULL
41#define s3c6400_init NULL
42#endif
43
44#ifdef CONFIG_CPU_S3C6410
45
46extern int s3c6410_init(void);
47extern void s3c6410_init_irq(void);
48extern void s3c6410_map_io(void);
49extern void s3c6410_init_clocks(int xtal);
50
51#else
52#define s3c6410_init_clocks NULL
53#define s3c6410_map_io NULL
54#define s3c6410_init NULL
55#endif
56
57#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/cpu.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX CPU Support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/dma-mapping.h>
24
25#include <mach/hardware.h>
26#include <mach/map.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30
31#include <plat/regs-serial.h>
32
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h>
36
37#include <plat/s3c6400.h>
38#include <plat/s3c6410.h>
39
40/* table of supported CPUs */
41
42static const char name_s3c6400[] = "S3C6400";
43static const char name_s3c6410[] = "S3C6410";
44
45static struct cpu_table cpu_ids[] __initdata = {
46 {
47 .idcode = S3C6400_CPU_ID,
48 .idmask = S3C64XX_CPU_MASK,
49 .map_io = s3c6400_map_io,
50 .init_clocks = s3c6400_init_clocks,
51 .init_uarts = s3c6400_init_uarts,
52 .init = s3c6400_init,
53 .name = name_s3c6400,
54 }, {
55 .idcode = S3C6410_CPU_ID,
56 .idmask = S3C64XX_CPU_MASK,
57 .map_io = s3c6410_map_io,
58 .init_clocks = s3c6410_init_clocks,
59 .init_uarts = s3c6410_init_uarts,
60 .init = s3c6410_init,
61 .name = name_s3c6410,
62 },
63};
64
65/* minimal IO mapping */
66
67/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
68#define UART_OFFS (S3C_PA_UART & 0xfffff)
69
70static struct map_desc s3c_iodesc[] __initdata = {
71 {
72 .virtual = (unsigned long)S3C_VA_SYS,
73 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)S3C_VA_MEM,
78 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
79 .length = SZ_4K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
83 .pfn = __phys_to_pfn(S3C_PA_UART),
84 .length = SZ_4K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)VA_VIC1,
93 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
94 .length = SZ_16K,
95 .type = MT_DEVICE,
96 }, {
97 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S3C_PA_TIMER),
99 .length = SZ_16K,
100 .type = MT_DEVICE,
101 }, {
102 .virtual = (unsigned long)S3C64XX_VA_GPIO,
103 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
104 .length = SZ_4K,
105 .type = MT_DEVICE,
106 }, {
107 .virtual = (unsigned long)S3C64XX_VA_MODEM,
108 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
109 .length = SZ_4K,
110 .type = MT_DEVICE,
111 }, {
112 .virtual = (unsigned long)S3C_VA_WATCHDOG,
113 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
114 .length = SZ_4K,
115 .type = MT_DEVICE,
116 }, {
117 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
118 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
119 .length = SZ_1K,
120 .type = MT_DEVICE,
121 },
122};
123
124
125struct sysdev_class s3c64xx_sysclass = {
126 .name = "s3c64xx-core",
127};
128
129static struct sys_device s3c64xx_sysdev = {
130 .cls = &s3c64xx_sysclass,
131};
132
133/* uart registration process */
134
135void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
136{
137 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
138}
139
140/* read cpu identification code */
141
142void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
143{
144 /* initialise the io descriptors we need for initialisation */
145 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
146 iotable_init(mach_desc, size);
147 init_consistent_dma_size(SZ_8M);
148
149 /* detect cpu id */
150 s3c64xx_init_cpu();
151
152 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
153}
154
155static __init int s3c64xx_sysdev_init(void)
156{
157 sysdev_class_register(&s3c64xx_sysclass);
158 return sysdev_register(&s3c64xx_sysdev);
159}
160
161core_initcall(s3c64xx_sysdev_init);
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index d8ca5786ba25..353ed4389ae7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -11,20 +11,9 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <plat/watchdog-reset.h>
15
16static void arch_idle(void) 14static void arch_idle(void)
17{ 15{
18 /* nothing here yet */ 16 /* nothing here yet */
19} 17}
20 18
21static void arch_reset(char mode, const char *cmd)
22{
23 if (mode != 's')
24 arch_wdt_reset();
25
26 /* if all else fails, or mode was for soft, jump to 0 */
27 soft_restart(0);
28}
29
30#endif /* __ASM_ARCH_IRQ_H */ 19#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
deleted file mode 100644
index b07357e94958..000000000000
--- a/arch/arm/mach-s3c64xx/irq.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/* arch/arm/plat-s3c64xx/irq.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - Interrupt handling
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/serial_core.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <asm/hardware/vic.h>
22
23#include <mach/map.h>
24#include <plat/irq-vic-timer.h>
25#include <plat/irq-uart.h>
26#include <plat/cpu.h>
27
28/* setup the sources the vic should advertise resume for, even though it
29 * is not doing the wake (set_irq_wake needs to be valid) */
30#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
31#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
32 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
33 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
34 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
35 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
36
37void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
38{
39 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
40
41 /* initialise the pair of VICs */
42 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
43 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
44
45 /* add the timer sub-irqs */
46 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
47}
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 2bbc14d93428..b86f2779e4e6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -46,13 +46,14 @@
46#include <plat/fb.h> 46#include <plat/fb.h>
47#include <plat/regs-fb-v4.h> 47#include <plat/regs-fb-v4.h>
48 48
49#include <plat/s3c6410.h>
50#include <plat/clock.h> 49#include <plat/clock.h>
51#include <plat/devs.h> 50#include <plat/devs.h>
52#include <plat/cpu.h> 51#include <plat/cpu.h>
53#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
54#include <mach/regs-modem.h> 53#include <mach/regs-modem.h>
55 54
55#include "common.h"
56
56/* DM9000 */ 57/* DM9000 */
57#define ANW6410_PA_DM9000 (0x18000000) 58#define ANW6410_PA_DM9000 (0x18000000)
58 59
@@ -241,4 +242,5 @@ MACHINE_START(ANW6410, "A&W6410")
241 .map_io = anw6410_map_io, 242 .map_io = anw6410_map_io,
242 .init_machine = anw6410_machine_init, 243 .init_machine = anw6410_machine_init,
243 .timer = &s3c24xx_timer, 244 .timer = &s3c24xx_timer,
245 .restart = s3c64xx_restart,
244MACHINE_END 246MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 988ac2e48f08..f1c848aa4a1e 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -51,7 +51,6 @@
51 51
52#include <mach/regs-gpio-memport.h> 52#include <mach/regs-gpio-memport.h>
53 53
54#include <plat/s3c6410.h>
55#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
56#include <plat/regs-fb-v4.h> 55#include <plat/regs-fb-v4.h>
57#include <plat/fb.h> 56#include <plat/fb.h>
@@ -67,6 +66,8 @@
67#include <plat/iic.h> 66#include <plat/iic.h>
68#include <plat/pm.h> 67#include <plat/pm.h>
69 68
69#include "common.h"
70
70/* serial port setup */ 71/* serial port setup */
71 72
72#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 73#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -716,4 +717,5 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
716 .map_io = crag6410_map_io, 717 .map_io = crag6410_map_io,
717 .init_machine = crag6410_machine_init, 718 .init_machine = crag6410_machine_init,
718 .timer = &s3c24xx_timer, 719 .timer = &s3c24xx_timer,
720 .restart = s3c64xx_restart,
719MACHINE_END 721MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index c5955f301709..521e07b8501b 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,12 +38,13 @@
38#include <plat/fb.h> 38#include <plat/fb.h>
39#include <plat/nand.h> 39#include <plat/nand.h>
40 40
41#include <plat/s3c6410.h>
42#include <plat/clock.h> 41#include <plat/clock.h>
43#include <plat/devs.h> 42#include <plat/devs.h>
44#include <plat/cpu.h> 43#include <plat/cpu.h>
45#include <plat/regs-fb-v4.h> 44#include <plat/regs-fb-v4.h>
46 45
46#include "common.h"
47
47#define UCON S3C2410_UCON_DEFAULT 48#define UCON S3C2410_UCON_DEFAULT
48#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
49#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -272,4 +273,5 @@ MACHINE_START(HMT, "Airgoo-HMT")
272 .map_io = hmt_map_io, 273 .map_io = hmt_map_io,
273 .init_machine = hmt_machine_init, 274 .init_machine = hmt_machine_init,
274 .timer = &s3c24xx_timer, 275 .timer = &s3c24xx_timer,
276 .restart = s3c64xx_restart,
275MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 4415c85e3f6f..c34c2ab22ead 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -34,7 +34,6 @@
34#include <mach/regs-modem.h> 34#include <mach/regs-modem.h>
35#include <mach/regs-srom.h> 35#include <mach/regs-srom.h>
36 36
37#include <plat/s3c6410.h>
38#include <plat/adc.h> 37#include <plat/adc.h>
39#include <plat/cpu.h> 38#include <plat/cpu.h>
40#include <plat/devs.h> 39#include <plat/devs.h>
@@ -46,6 +45,8 @@
46 45
47#include <video/platform_lcd.h> 46#include <video/platform_lcd.h>
48 47
48#include "common.h"
49
49#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 52#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -350,4 +351,5 @@ MACHINE_START(MINI6410, "MINI6410")
350 .map_io = mini6410_map_io, 351 .map_io = mini6410_map_io,
351 .init_machine = mini6410_machine_init, 352 .init_machine = mini6410_machine_init,
352 .timer = &s3c24xx_timer, 353 .timer = &s3c24xx_timer,
354 .restart = s3c64xx_restart,
353MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 9b2c610eac2a..0efa2ba783b2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -40,12 +40,13 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41#include <plat/fb.h> 41#include <plat/fb.h>
42 42
43#include <plat/s3c6410.h>
44#include <plat/clock.h> 43#include <plat/clock.h>
45#include <plat/devs.h> 44#include <plat/devs.h>
46#include <plat/cpu.h> 45#include <plat/cpu.h>
47#include <plat/regs-fb-v4.h> 46#include <plat/regs-fb-v4.h>
48 47
48#include "common.h"
49
49#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
50#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE 51#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
51#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 52#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -104,4 +105,5 @@ MACHINE_START(NCP, "NCP")
104 .map_io = ncp_map_io, 105 .map_io = ncp_map_io,
105 .init_machine = ncp_machine_init, 106 .init_machine = ncp_machine_init,
106 .timer = &s3c24xx_timer, 107 .timer = &s3c24xx_timer,
108 .restart = s3c64xx_restart,
107MACHINE_END 109MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index dbab49f2713e..be2a9a22ab74 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -35,7 +35,6 @@
35#include <mach/regs-modem.h> 35#include <mach/regs-modem.h>
36#include <mach/regs-srom.h> 36#include <mach/regs-srom.h>
37 37
38#include <plat/s3c6410.h>
39#include <plat/adc.h> 38#include <plat/adc.h>
40#include <plat/cpu.h> 39#include <plat/cpu.h>
41#include <plat/devs.h> 40#include <plat/devs.h>
@@ -47,6 +46,8 @@
47 46
48#include <video/platform_lcd.h> 47#include <video/platform_lcd.h>
49 48
49#include "common.h"
50
50#define UCON S3C2410_UCON_DEFAULT 51#define UCON S3C2410_UCON_DEFAULT
51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 52#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
52#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 53#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -331,4 +332,5 @@ MACHINE_START(REAL6410, "REAL6410")
331 .map_io = real6410_map_io, 332 .map_io = real6410_map_io,
332 .init_machine = real6410_machine_init, 333 .init_machine = real6410_machine_init,
333 .timer = &s3c24xx_timer, 334 .timer = &s3c24xx_timer,
335 .restart = s3c64xx_restart,
334MACHINE_END 336MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index cb1ebeb08763..ce31db136231 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -40,6 +40,8 @@
40 40
41#include <video/platform_lcd.h> 41#include <video/platform_lcd.h>
42 42
43#include "common.h"
44
43#define UCON S3C2410_UCON_DEFAULT 45#define UCON S3C2410_UCON_DEFAULT
44#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 46#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
45#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 47#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 053945282652..3f42431d4dda 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -24,13 +24,13 @@
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27#include <plat/s3c6410.h>
28#include <plat/cpu.h> 27#include <plat/cpu.h>
29#include <plat/devs.h> 28#include <plat/devs.h>
30#include <plat/fb.h> 29#include <plat/fb.h>
31#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
32#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
33 32
33#include "common.h"
34#include "mach-smartq.h" 34#include "mach-smartq.h"
35 35
36static struct gpio_led smartq5_leds[] = { 36static struct gpio_led smartq5_leds[] = {
@@ -153,4 +153,5 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
153 .map_io = smartq_map_io, 153 .map_io = smartq_map_io,
154 .init_machine = smartq5_machine_init, 154 .init_machine = smartq5_machine_init,
155 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
156 .restart = s3c64xx_restart,
156MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index a58d1ba5cba2..e5c09b6db967 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -24,13 +24,13 @@
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27#include <plat/s3c6410.h>
28#include <plat/cpu.h> 27#include <plat/cpu.h>
29#include <plat/devs.h> 28#include <plat/devs.h>
30#include <plat/fb.h> 29#include <plat/fb.h>
31#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
32#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
33 32
33#include "common.h"
34#include "mach-smartq.h" 34#include "mach-smartq.h"
35 35
36static struct gpio_led smartq7_leds[] = { 36static struct gpio_led smartq7_leds[] = {
@@ -169,4 +169,5 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
169 .map_io = smartq_map_io, 169 .map_io = smartq_map_io,
170 .init_machine = smartq7_machine_init, 170 .init_machine = smartq7_machine_init,
171 .timer = &s3c24xx_timer, 171 .timer = &s3c24xx_timer,
172 .restart = s3c64xx_restart,
172MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index be28a59e3f57..5f096534f4c4 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -32,12 +32,13 @@
32 32
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34 34
35#include <plat/s3c6400.h>
36#include <plat/clock.h> 35#include <plat/clock.h>
37#include <plat/devs.h> 36#include <plat/devs.h>
38#include <plat/cpu.h> 37#include <plat/cpu.h>
39#include <plat/iic.h> 38#include <plat/iic.h>
40 39
40#include "common.h"
41
41#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 42#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
42#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 43#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
43#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 44#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -93,4 +94,5 @@ MACHINE_START(SMDK6400, "SMDK6400")
93 .map_io = smdk6400_map_io, 94 .map_io = smdk6400_map_io,
94 .init_machine = smdk6400_machine_init, 95 .init_machine = smdk6400_machine_init,
95 .timer = &s3c24xx_timer, 96 .timer = &s3c24xx_timer,
97 .restart = s3c64xx_restart,
96MACHINE_END 98MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 08309155d087..ca6fc204f0ea 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -64,7 +64,6 @@
64#include <plat/fb.h> 64#include <plat/fb.h>
65#include <plat/gpio-cfg.h> 65#include <plat/gpio-cfg.h>
66 66
67#include <plat/s3c6410.h>
68#include <plat/clock.h> 67#include <plat/clock.h>
69#include <plat/devs.h> 68#include <plat/devs.h>
70#include <plat/cpu.h> 69#include <plat/cpu.h>
@@ -74,6 +73,8 @@
74#include <plat/backlight.h> 73#include <plat/backlight.h>
75#include <plat/regs-fb-v4.h> 74#include <plat/regs-fb-v4.h>
76 75
76#include "common.h"
77
77#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 78#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
78#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 79#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
79#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 80#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -705,4 +706,5 @@ MACHINE_START(SMDK6410, "SMDK6410")
705 .map_io = smdk6410_map_io, 706 .map_io = smdk6410_map_io,
706 .init_machine = smdk6410_machine_init, 707 .init_machine = smdk6410_machine_init,
707 .timer = &s3c24xx_timer, 708 .timer = &s3c24xx_timer,
709 .restart = s3c64xx_restart,
708MACHINE_END 710MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 51c00f2453c6..b1e1571f2f6b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -38,7 +38,8 @@
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/onenand-core.h> 40#include <plat/onenand-core.h>
41#include <plat/s3c6400.h> 41
42#include "common.h"
42 43
43void __init s3c6400_map_io(void) 44void __init s3c6400_map_io(void)
44{ 45{
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void)
60void __init s3c6400_init_clocks(int xtal) 61void __init s3c6400_init_clocks(int xtal)
61{ 62{
62 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); 63 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
63 s3c6400_setup_clocks(); 64 s3c64xx_setup_clocks();
64} 65}
65 66
66void __init s3c6400_init_irq(void) 67void __init s3c6400_init_irq(void)
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 4117003464ad..fba71bd991c7 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -41,8 +41,8 @@
41#include <plat/adc-core.h> 41#include <plat/adc-core.h>
42#include <plat/iic-core.h> 42#include <plat/iic-core.h>
43#include <plat/onenand-core.h> 43#include <plat/onenand-core.h>
44#include <plat/s3c6400.h> 44
45#include <plat/s3c6410.h> 45#include "common.h"
46 46
47void __init s3c6410_map_io(void) 47void __init s3c6410_map_io(void)
48{ 48{
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal)
66{ 66{
67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); 68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
69 s3c6400_setup_clocks(); 69 s3c64xx_setup_clocks();
70} 70}
71 71
72void __init s3c6410_init_irq(void) 72void __init s3c6410_init_irq(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 01:19:04 -0400