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Diffstat (limited to 'arch/arm/mach-s3c64xx/mach-crag6410.c')
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diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
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1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/pwm_backlight.h>
25#include <linux/dm9000.h>
26#include <linux/gpio_keys.h>
27#include <linux/basic_mmio_gpio.h>
28#include <linux/spi/spi.h>
29
30#include <linux/i2c/pca953x.h>
31
32#include <video/platform_lcd.h>
33
34#include <linux/mfd/wm831x/core.h>
35#include <linux/mfd/wm831x/pdata.h>
36#include <linux/mfd/wm831x/gpio.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach-types.h>
40
41#include <mach/hardware.h>
42#include <mach/map.h>
43
44#include <mach/s3c6410.h>
45#include <mach/regs-sys.h>
46#include <mach/regs-gpio.h>
47#include <mach/regs-modem.h>
48
49#include <mach/gpio-bank-o.h>
50#include <mach/regs-gpio-memport.h>
51
52#include <plat/regs-serial.h>
53#include <plat/regs-fb-v4.h>
54#include <plat/fb.h>
55#include <plat/sdhci.h>
56#include <plat/gpio-cfg.h>
57#include <plat/s3c64xx-spi.h>
58
59#include <plat/keypad.h>
60#include <plat/clock.h>
61#include <plat/devs.h>
62#include <plat/cpu.h>
63#include <plat/adc.h>
64#include <plat/iic.h>
65#include <plat/pm.h>
66
67#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
68
69#define PCA935X_GPIO_BASE GPIO_BOARD_START
70#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
71
72/* serial port setup */
73
74#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
75#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
76#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
77
78static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
79 [0] = {
80 .hwport = 0,
81 .flags = 0,
82 .ucon = UCON,
83 .ulcon = ULCON,
84 .ufcon = UFCON,
85 },
86 [1] = {
87 .hwport = 1,
88 .flags = 0,
89 .ucon = UCON,
90 .ulcon = ULCON,
91 .ufcon = UFCON,
92 },
93 [2] = {
94 .hwport = 2,
95 .flags = 0,
96 .ucon = UCON,
97 .ulcon = ULCON,
98 .ufcon = UFCON,
99 },
100 [3] = {
101 .hwport = 3,
102 .flags = 0,
103 .ucon = UCON,
104 .ulcon = ULCON,
105 .ufcon = UFCON,
106 },
107};
108
109static struct platform_pwm_backlight_data crag6410_backlight_data = {
110 .pwm_id = 0,
111 .max_brightness = 1000,
112 .dft_brightness = 600,
113 .pwm_period_ns = 100000, /* about 1kHz */
114};
115
116static struct platform_device crag6410_backlight_device = {
117 .name = "pwm-backlight",
118 .id = -1,
119 .dev = {
120 .parent = &s3c_device_timer[0].dev,
121 .platform_data = &crag6410_backlight_data,
122 },
123};
124
125static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
126{
127 pr_debug("%s: setting power %d\n", __func__, power);
128
129 if (power) {
130 gpio_set_value(S3C64XX_GPB(0), 1);
131 msleep(1);
132 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
133 } else {
134 gpio_direction_output(S3C64XX_GPF(14), 0);
135 gpio_set_value(S3C64XX_GPB(0), 0);
136 }
137}
138
139static struct platform_device crag6410_lcd_powerdev = {
140 .name = "platform-lcd",
141 .id = -1,
142 .dev.parent = &s3c_device_fb.dev,
143 .dev.platform_data = &(struct plat_lcd_data) {
144 .set_power = crag6410_lcd_power_set,
145 },
146};
147
148/* 640x480 URT */
149static struct s3c_fb_pd_win crag6410_fb_win0 = {
150 /* this is to ensure we use win0 */
151 .win_mode = {
152 .left_margin = 150,
153 .right_margin = 80,
154 .upper_margin = 40,
155 .lower_margin = 5,
156 .hsync_len = 40,
157 .vsync_len = 5,
158 .xres = 640,
159 .yres = 480,
160 },
161 .max_bpp = 32,
162 .default_bpp = 16,
163 .virtual_y = 480 * 2,
164 .virtual_x = 640,
165};
166
167/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
168static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
169 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
170 .win[0] = &crag6410_fb_win0,
171 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
172 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
173};
174
175/* 2x6 keypad */
176
177static uint32_t crag6410_keymap[] __initdata = {
178 /* KEY(row, col, keycode) */
179 KEY(0, 0, KEY_VOLUMEUP),
180 KEY(0, 1, KEY_HOME),
181 KEY(0, 2, KEY_VOLUMEDOWN),
182 KEY(0, 3, KEY_HELP),
183 KEY(0, 4, KEY_MENU),
184 KEY(0, 5, KEY_MEDIA),
185 KEY(1, 0, 232),
186 KEY(1, 1, KEY_DOWN),
187 KEY(1, 2, KEY_LEFT),
188 KEY(1, 3, KEY_UP),
189 KEY(1, 4, KEY_RIGHT),
190 KEY(1, 5, KEY_CAMERA),
191};
192
193static struct matrix_keymap_data crag6410_keymap_data __initdata = {
194 .keymap = crag6410_keymap,
195 .keymap_size = ARRAY_SIZE(crag6410_keymap),
196};
197
198static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
199 .keymap_data = &crag6410_keymap_data,
200 .rows = 2,
201 .cols = 6,
202};
203
204static struct gpio_keys_button crag6410_gpio_keys[] = {
205 [0] = {
206 .code = KEY_SUSPEND,
207 .gpio = S3C64XX_GPL(10), /* EINT 18 */
208 .type = EV_SW,
209 .wakeup = 1,
210 .active_low = 1,
211 },
212};
213
214static struct gpio_keys_platform_data crag6410_gpio_keydata = {
215 .buttons = crag6410_gpio_keys,
216 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
217};
218
219static struct platform_device crag6410_gpio_keydev = {
220 .name = "gpio-keys",
221 .id = 0,
222 .dev.platform_data = &crag6410_gpio_keydata,
223};
224
225static struct resource crag6410_dm9k_resource[] = {
226 [0] = {
227 .start = S3C64XX_PA_XM0CSN5,
228 .end = S3C64XX_PA_XM0CSN5 + 1,
229 .flags = IORESOURCE_MEM,
230 },
231 [1] = {
232 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
233 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
234 .flags = IORESOURCE_MEM,
235 },
236 [2] = {
237 .start = S3C_EINT(17),
238 .end = S3C_EINT(17),
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
240 },
241};
242
243static struct dm9000_plat_data mini6410_dm9k_pdata = {
244 .flags = DM9000_PLATF_16BITONLY,
245};
246
247static struct platform_device crag6410_dm9k_device = {
248 .name = "dm9000",
249 .id = -1,
250 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
251 .resource = crag6410_dm9k_resource,
252 .dev.platform_data = &mini6410_dm9k_pdata,
253};
254
255static struct resource crag6410_mmgpio_resource[] = {
256 [0] = {
257 .start = S3C64XX_PA_XM0CSN4 + 1,
258 .end = S3C64XX_PA_XM0CSN4 + 1,
259 .flags = IORESOURCE_MEM,
260 },
261};
262
263static struct platform_device crag6410_mmgpio = {
264 .name = "basic-mmio-gpio",
265 .id = -1,
266 .resource = crag6410_mmgpio_resource,
267 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
268 .dev.platform_data = &(struct bgpio_pdata) {
269 .base = -1,
270 },
271};
272
273static struct platform_device *crag6410_devices[] __initdata = {
274 &s3c_device_hsmmc0,
275 &s3c_device_hsmmc1,
276 &s3c_device_hsmmc2,
277 &s3c_device_i2c0,
278 &s3c_device_i2c1,
279 &s3c_device_fb,
280 &s3c_device_ohci,
281 &s3c_device_usb_hsotg,
282 &s3c_device_adc,
283 &s3c_device_rtc,
284 &s3c_device_ts,
285 &s3c_device_timer[0],
286 &s3c64xx_device_iis0,
287 &s3c64xx_device_iis1,
288 &samsung_asoc_dma,
289 &samsung_device_keypad,
290 &crag6410_gpio_keydev,
291 &crag6410_dm9k_device,
292 &s3c64xx_device_spi0,
293 &crag6410_mmgpio,
294 &crag6410_lcd_powerdev,
295 &crag6410_backlight_device,
296};
297
298static struct pca953x_platform_data crag6410_pca_data = {
299 .gpio_base = PCA935X_GPIO_BASE,
300 .irq_base = 0,
301};
302
303static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
304 REGULATOR_SUPPLY("vddarm", NULL),
305};
306
307static struct regulator_init_data vddarm __initdata = {
308 .constraints = {
309 .name = "VDDARM",
310 .min_uV = 1000000,
311 .max_uV = 1300000,
312 .always_on = 1,
313 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
314 },
315 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
316 .consumer_supplies = vddarm_consumers,
317};
318
319static struct regulator_init_data vddint __initdata = {
320 .constraints = {
321 .name = "VDDINT",
322 .min_uV = 1000000,
323 .max_uV = 1200000,
324 .always_on = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
326 },
327};
328
329static struct regulator_init_data vddmem __initdata = {
330 .constraints = {
331 .name = "VDDMEM",
332 .always_on = 1,
333 },
334};
335
336static struct regulator_init_data vddsys __initdata = {
337 .constraints = {
338 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
339 .always_on = 1,
340 },
341};
342
343static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
344 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
345 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
346 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
347};
348
349static struct regulator_init_data vddmmc __initdata = {
350 .constraints = {
351 .name = "VDDMMC,UH",
352 .always_on = 1,
353 },
354 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
355 .consumer_supplies = vddmmc_consumers,
356};
357
358static struct regulator_init_data vddotgi __initdata = {
359 .constraints = {
360 .name = "VDDOTGi",
361 .always_on = 1,
362 },
363};
364
365static struct regulator_init_data vddotg __initdata = {
366 .constraints = {
367 .name = "VDDOTG",
368 .always_on = 1,
369 },
370};
371
372static struct regulator_init_data vddhi __initdata = {
373 .constraints = {
374 .name = "VDDHI",
375 .always_on = 1,
376 },
377};
378
379static struct regulator_init_data vddadc __initdata = {
380 .constraints = {
381 .name = "VDDADC,VDDDAC",
382 .always_on = 1,
383 },
384};
385
386static struct regulator_init_data vddmem0 __initdata = {
387 .constraints = {
388 .name = "VDDMEM0",
389 .always_on = 1,
390 },
391};
392
393static struct regulator_init_data vddpll __initdata = {
394 .constraints = {
395 .name = "VDDPLL",
396 .always_on = 1,
397 },
398};
399
400static struct regulator_init_data vddlcd __initdata = {
401 .constraints = {
402 .name = "VDDLCD",
403 .always_on = 1,
404 },
405};
406
407static struct regulator_init_data vddalive __initdata = {
408 .constraints = {
409 .name = "VDDALIVE",
410 .always_on = 1,
411 },
412};
413
414static struct wm831x_status_pdata banff_red_led __initdata = {
415 .name = "banff:red:",
416 .default_src = WM831X_STATUS_MANUAL,
417};
418
419static struct wm831x_status_pdata banff_green_led __initdata = {
420 .name = "banff:green:",
421 .default_src = WM831X_STATUS_MANUAL,
422};
423
424static struct wm831x_touch_pdata touch_pdata __initdata = {
425 .data_irq = S3C_EINT(26),
426};
427
428static __init int crag_pmic_pre_init(struct wm831x *wm831x)
429{
430 /* Touchscreen data IRQ - CMOS, DBVDD, active high*/
431 wm831x_reg_write(wm831x, WM831X_GPIO11_CONTROL,
432 WM831X_GPN_POL | WM831X_GPN_ENA | 0x6);
433
434 /* Touchscreen pen down IRQ - CMOS, DBVDD, active high*/
435 wm831x_reg_write(wm831x, WM831X_GPIO12_CONTROL,
436 WM831X_GPN_POL | WM831X_GPN_ENA | 0x7);
437
438 return 0;
439}
440
441static struct wm831x_pdata crag_pmic_pdata __initdata = {
442 .pre_init = crag_pmic_pre_init,
443
444 .irq_base = BANFF_PMIC_IRQ_BASE,
445 .gpio_base = GPIO_BOARD_START + 8,
446
447 .dcdc = {
448 &vddarm, /* DCDC1 */
449 &vddint, /* DCDC2 */
450 &vddmem, /* DCDC3 */
451 },
452
453 .ldo = {
454 &vddsys, /* LDO1 */
455 &vddmmc, /* LDO2 */
456 NULL, /* LDO3 */
457 &vddotgi, /* LDO4 */
458 &vddotg, /* LDO5 */
459 &vddhi, /* LDO6 */
460 &vddadc, /* LDO7 */
461 &vddmem0, /* LDO8 */
462 &vddpll, /* LDO9 */
463 &vddlcd, /* LDO10 */
464 &vddalive, /* LDO11 */
465 },
466
467 .status = {
468 &banff_green_led,
469 &banff_red_led,
470 },
471
472 .touch = &touch_pdata,
473};
474
475static struct i2c_board_info i2c_devs0[] __initdata = {
476 { I2C_BOARD_INFO("24c08", 0x50), },
477 { I2C_BOARD_INFO("tca6408", 0x20),
478 .platform_data = &crag6410_pca_data,
479 },
480 { I2C_BOARD_INFO("wm8312", 0x34),
481 .platform_data = &crag_pmic_pdata,
482 .irq = S3C_EINT(23),
483 },
484};
485
486static struct s3c2410_platform_i2c i2c0_pdata = {
487 .frequency = 400000,
488};
489
490static struct i2c_board_info i2c_devs1[] __initdata = {
491 { I2C_BOARD_INFO("wm8311", 0x34),
492 .platform_data = &glenfarclas_pmic_pdata,
493 },
494};
495
496static void __init crag6410_map_io(void)
497{
498 s3c64xx_init_io(NULL, 0);
499 s3c24xx_init_clocks(12000000);
500 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
501
502 /* LCD type and Bypass set by bootloader */
503}
504
505static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
506 .max_width = 4,
507 .cd_type = S3C_SDHCI_CD_PERMANENT,
508};
509
510static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
511 .max_width = 4,
512 .cd_type = S3C_SDHCI_CD_GPIO,
513 .ext_cd_gpio = S3C64XX_GPF(11),
514};
515
516static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
517{
518 /* Set all the necessary GPG pins to special-function 2 */
519 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
520
521 /* force card-detected for prototype 0 */
522 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
523}
524
525static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
526 .max_width = 4,
527 .cd_type = S3C_SDHCI_CD_INTERNAL,
528 .cfg_gpio = crag6410_cfg_sdhci0,
529};
530
531static void __init crag6410_machine_init(void)
532{
533 /* Open drain IRQs need pullups */
534 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
535 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
536
537 gpio_request(S3C64XX_GPB(0), "LCD power");
538 gpio_direction_output(S3C64XX_GPB(0), 0);
539
540 gpio_request(S3C64XX_GPF(14), "LCD PWM");
541 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
542
543 gpio_request(S3C64XX_GPB(1), "SD power");
544 gpio_direction_output(S3C64XX_GPB(1), 0);
545
546 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
547 gpio_direction_output(S3C64XX_GPF(10), 1);
548
549 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
550 s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
551 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
552
553 s3c_i2c0_set_platdata(&i2c0_pdata);
554 s3c_i2c1_set_platdata(NULL);
555 s3c_fb_set_platdata(&crag6410_lcd_pdata);
556
557 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
558 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
559
560 samsung_keypad_set_platdata(&crag6410_keypad_data);
561
562 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
563
564 s3c_pm_init();
565}
566
567MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
568 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
569 .boot_params = S3C64XX_PA_SDRAM + 0x100,
570 .init_irq = s3c6410_init_irq,
571 .map_io = crag6410_map_io,
572 .init_machine = crag6410_machine_init,
573 .timer = &s3c24xx_timer,
574MACHINE_END
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