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Diffstat (limited to 'arch/arm/mach-s3c64xx/dma.c')
-rw-r--r--arch/arm/mach-s3c64xx/dma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 204bfafe4bfc..17d62f4f8204 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -147,14 +147,14 @@ static void s3c64xx_dma_fill_lli(struct s3c2410_dma_chan *chan,
147 u32 control0, control1; 147 u32 control0, control1;
148 148
149 switch (chan->source) { 149 switch (chan->source) {
150 case S3C2410_DMASRC_HW: 150 case DMA_FROM_DEVICE:
151 src = chan->dev_addr; 151 src = chan->dev_addr;
152 dst = data; 152 dst = data;
153 control0 = PL080_CONTROL_SRC_AHB2; 153 control0 = PL080_CONTROL_SRC_AHB2;
154 control0 |= PL080_CONTROL_DST_INCR; 154 control0 |= PL080_CONTROL_DST_INCR;
155 break; 155 break;
156 156
157 case S3C2410_DMASRC_MEM: 157 case DMA_TO_DEVICE:
158 src = data; 158 src = data;
159 dst = chan->dev_addr; 159 dst = chan->dev_addr;
160 control0 = PL080_CONTROL_DST_AHB2; 160 control0 = PL080_CONTROL_DST_AHB2;
@@ -416,7 +416,7 @@ EXPORT_SYMBOL(s3c2410_dma_enqueue);
416 416
417 417
418int s3c2410_dma_devconfig(enum dma_ch channel, 418int s3c2410_dma_devconfig(enum dma_ch channel,
419 enum s3c2410_dmasrc source, 419 enum dma_data_direction source,
420 unsigned long devaddr) 420 unsigned long devaddr)
421{ 421{
422 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); 422 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
@@ -437,11 +437,11 @@ int s3c2410_dma_devconfig(enum dma_ch channel,
437 pr_debug("%s: peripheral %d\n", __func__, peripheral); 437 pr_debug("%s: peripheral %d\n", __func__, peripheral);
438 438
439 switch (source) { 439 switch (source) {
440 case S3C2410_DMASRC_HW: 440 case DMA_FROM_DEVICE:
441 config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT; 441 config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT;
442 config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT; 442 config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT;
443 break; 443 break;
444 case S3C2410_DMASRC_MEM: 444 case DMA_TO_DEVICE:
445 config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT; 445 config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT;
446 config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT; 446 config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT;
447 break; 447 break;
@@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void)
740 } 740 }
741 741
742 /* Set all DMA configuration to be DMA, not SDMA */ 742 /* Set all DMA configuration to be DMA, not SDMA */
743 writel(0xffffff, S3C_SYSREG(0x110)); 743 writel(0xffffff, S3C64XX_SDMA_SEL);
744 744
745 /* Register standard DMA controllers */ 745 /* Register standard DMA controllers */
746 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); 746 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000);