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Diffstat (limited to 'arch/arm/mach-s3c2416/clock.c')
-rw-r--r--arch/arm/mach-s3c2416/clock.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 3b02d8506e25..21a5e81f0ab5 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -42,7 +42,7 @@ static struct clksrc_clk hsmmc_div[] = {
42 [0] = { 42 [0] = {
43 .clk = { 43 .clk = {
44 .name = "hsmmc-div", 44 .name = "hsmmc-div",
45 .id = 0, 45 .devname = "s3c-sdhci.0",
46 .parent = &clk_esysclk.clk, 46 .parent = &clk_esysclk.clk,
47 }, 47 },
48 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 }, 48 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -50,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = {
50 [1] = { 50 [1] = {
51 .clk = { 51 .clk = {
52 .name = "hsmmc-div", 52 .name = "hsmmc-div",
53 .id = 1, 53 .devname = "s3c-sdhci.1",
54 .parent = &clk_esysclk.clk, 54 .parent = &clk_esysclk.clk,
55 }, 55 },
56 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, 56 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -60,8 +60,8 @@ static struct clksrc_clk hsmmc_div[] = {
60static struct clksrc_clk hsmmc_mux[] = { 60static struct clksrc_clk hsmmc_mux[] = {
61 [0] = { 61 [0] = {
62 .clk = { 62 .clk = {
63 .id = 0,
64 .name = "hsmmc-if", 63 .name = "hsmmc-if",
64 .devname = "s3c-sdhci.0",
65 .ctrlbit = (1 << 6), 65 .ctrlbit = (1 << 6),
66 .enable = s3c2443_clkcon_enable_s, 66 .enable = s3c2443_clkcon_enable_s,
67 }, 67 },
@@ -76,8 +76,8 @@ static struct clksrc_clk hsmmc_mux[] = {
76 }, 76 },
77 [1] = { 77 [1] = {
78 .clk = { 78 .clk = {
79 .id = 1,
80 .name = "hsmmc-if", 79 .name = "hsmmc-if",
80 .devname = "s3c-sdhci.1",
81 .ctrlbit = (1 << 12), 81 .ctrlbit = (1 << 12),
82 .enable = s3c2443_clkcon_enable_s, 82 .enable = s3c2443_clkcon_enable_s,
83 }, 83 },
@@ -94,7 +94,7 @@ static struct clksrc_clk hsmmc_mux[] = {
94 94
95static struct clk hsmmc0_clk = { 95static struct clk hsmmc0_clk = {
96 .name = "hsmmc", 96 .name = "hsmmc",
97 .id = 0, 97 .devname = "s3c-sdhci.0",
98 .parent = &clk_h, 98 .parent = &clk_h,
99 .enable = s3c2443_clkcon_enable_h, 99 .enable = s3c2443_clkcon_enable_h,
100 .ctrlbit = S3C2416_HCLKCON_HSMMC0, 100 .ctrlbit = S3C2416_HCLKCON_HSMMC0,