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Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2410.c')
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 3d7ebc557a72..dad596332c5e 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/pll.h> 43#include <plat/pll.h>
44#include <plat/pm.h> 44#include <plat/pm.h>
45#include <plat/watchdog-reset.h>
45 46
46#include <plat/gpio-core.h> 47#include <plat/gpio-core.h>
47#include <plat/gpio-cfg.h> 48#include <plat/gpio-cfg.h>
@@ -123,12 +124,18 @@ static struct clk s3c2410_armclk = {
123 .id = -1, 124 .id = -1,
124}; 125};
125 126
127static struct clk_lookup s3c2410_clk_lookup[] = {
128 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
129 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
130};
131
126void __init s3c2410_init_clocks(int xtal) 132void __init s3c2410_init_clocks(int xtal)
127{ 133{
128 s3c24xx_register_baseclocks(xtal); 134 s3c24xx_register_baseclocks(xtal);
129 s3c2410_setup_clocks(); 135 s3c2410_setup_clocks();
130 s3c2410_baseclk_add(); 136 s3c2410_baseclk_add();
131 s3c24xx_register_clock(&s3c2410_armclk); 137 s3c24xx_register_clock(&s3c2410_armclk);
138 clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
132} 139}
133 140
134struct sysdev_class s3c2410_sysclass = { 141struct sysdev_class s3c2410_sysclass = {
@@ -183,3 +190,15 @@ int __init s3c2410a_init(void)
183 s3c2410_sysdev.cls = &s3c2410a_sysclass; 190 s3c2410_sysdev.cls = &s3c2410a_sysclass;
184 return s3c2410_init(); 191 return s3c2410_init();
185} 192}
193
194void s3c2410_restart(char mode, const char *cmd)
195{
196 if (mode == 's') {
197 soft_restart(0);
198 }
199
200 arch_wdt_reset();
201
202 /* we'll take a jump through zero as a poor second */
203 soft_restart(0);
204}