diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h')
| -rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | 32 |
1 files changed, 1 insertions, 31 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 6026d091a2fe..d87ebe0cb625 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | |||
| @@ -42,23 +42,14 @@ | |||
| 42 | 42 | ||
| 43 | #define S3C2443_PLLCON_OFF (1<<24) | 43 | #define S3C2443_PLLCON_OFF (1<<24) |
| 44 | 44 | ||
| 45 | #define S3C2443_CLKSRC_I2S_EXT (1<<14) | ||
| 46 | #define S3C2443_CLKSRC_I2S_EPLLDIV (0<<14) | ||
| 47 | #define S3C2443_CLKSRC_I2S_EPLLREF (2<<14) | ||
| 48 | #define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14) | ||
| 49 | #define S3C2443_CLKSRC_I2S_MASK (3<<14) | ||
| 50 | |||
| 51 | #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) | 45 | #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) |
| 52 | #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) | 46 | #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) |
| 53 | #define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) | 47 | #define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) |
| 54 | #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) | 48 | #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) |
| 55 | #define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) | 49 | #define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) |
| 56 | 50 | ||
| 57 | #define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6) | ||
| 58 | #define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4) | ||
| 59 | #define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) | 51 | #define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) |
| 60 | 52 | ||
| 61 | #define S3C2443_CLKDIV0_DVS (1<<13) | ||
| 62 | #define S3C2443_CLKDIV0_HALF_HCLK (1<<3) | 53 | #define S3C2443_CLKDIV0_HALF_HCLK (1<<3) |
| 63 | #define S3C2443_CLKDIV0_HALF_PCLK (1<<2) | 54 | #define S3C2443_CLKDIV0_HALF_PCLK (1<<2) |
| 64 | 55 | ||
| @@ -81,28 +72,7 @@ | |||
| 81 | #define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) | 72 | #define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) |
| 82 | #define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) | 73 | #define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) |
| 83 | 74 | ||
| 84 | /* S3C2443_CLKDIV1 */ | 75 | /* S3C2443_CLKDIV1 removed, only used in clock.c code */ |
| 85 | |||
| 86 | #define S3C2443_CLKDIV1_CAMDIV_MASK (15<<26) | ||
| 87 | #define S3C2443_CLKDIV1_CAMDIV_SHIFT (26) | ||
| 88 | |||
| 89 | #define S3C2443_CLKDIV1_HSSPIDIV_MASK (3<<24) | ||
| 90 | #define S3C2443_CLKDIV1_HSSPIDIV_SHIFT (24) | ||
| 91 | |||
| 92 | #define S3C2443_CLKDIV1_DISPDIV_MASK (0xff<<16) | ||
| 93 | #define S3C2443_CLKDIV1_DISPDIV_SHIFT (16) | ||
| 94 | |||
| 95 | #define S3C2443_CLKDIV1_I2SDIV_MASK (15<<12) | ||
| 96 | #define S3C2443_CLKDIV1_I2SDIV_SHIFT (12) | ||
| 97 | |||
| 98 | #define S3C2443_CLKDIV1_UARTDIV_MASK (15<<8) | ||
| 99 | #define S3C2443_CLKDIV1_UARTDIV_SHIFT (8) | ||
| 100 | |||
| 101 | #define S3C2443_CLKDIV1_HSMMCDIV_MASK (3<<6) | ||
| 102 | #define S3C2443_CLKDIV1_HSMMCDIV_SHIFT (6) | ||
| 103 | |||
| 104 | #define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4) | ||
| 105 | #define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4) | ||
| 106 | 76 | ||
| 107 | #define S3C2443_CLKCON_NAND | 77 | #define S3C2443_CLKCON_NAND |
| 108 | 78 | ||