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-rw-r--r--arch/arm/mach-realview/Kconfig17
-rw-r--r--arch/arm/mach-realview/Makefile4
-rw-r--r--arch/arm/mach-realview/core.c10
-rw-r--r--arch/arm/mach-realview/core.h3
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h105
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb1176.h80
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h101
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h77
-rw-r--r--arch/arm/mach-realview/include/mach/board-pbx.h108
-rw-r--r--arch/arm/mach-realview/include/mach/debug-macro.S3
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-eb.h129
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h99
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb11mp.h122
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pba8.h98
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pbx.h115
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h9
-rw-r--r--arch/arm/mach-realview/include/mach/scu.h13
-rw-r--r--arch/arm/mach-realview/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-realview/localtimer.c188
-rw-r--r--arch/arm/mach-realview/platsmp.c53
-rw-r--r--arch/arm/mach-realview/realview_eb.c1
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c23
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c1
-rw-r--r--arch/arm/mach-realview/realview_pbx.c335
24 files changed, 1088 insertions, 609 deletions
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index b6ec10627776..d4cfa2145386 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -24,7 +24,6 @@ config REALVIEW_EB_ARM11MP
24config REALVIEW_EB_ARM11MP_REVB 24config REALVIEW_EB_ARM11MP_REVB
25 bool "Support ARM11MPCore RevB tile" 25 bool "Support ARM11MPCore RevB tile"
26 depends on REALVIEW_EB_ARM11MP 26 depends on REALVIEW_EB_ARM11MP
27 default n
28 help 27 help
29 Enable support for the ARM11MPCore RevB tile on the Realview 28 Enable support for the ARM11MPCore RevB tile on the Realview
30 platform. Since there are device address differences, a 29 platform. Since there are device address differences, a
@@ -48,6 +47,15 @@ config MACH_REALVIEW_PB1176
48 help 47 help
49 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 48 Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
50 49
50config REALVIEW_PB1176_SECURE_FLASH
51 bool "Allow access to the secure flash memory block"
52 depends on MACH_REALVIEW_PB1176
53 default n
54 help
55 Select this option if Linux will only run in secure mode on the
56 RealView PB1176 platform and access to the secure flash memory
57 block (64MB @ 0x3c000000) is required.
58
51config MACH_REALVIEW_PBA8 59config MACH_REALVIEW_PBA8
52 bool "Support RealView/PB-A8 platform" 60 bool "Support RealView/PB-A8 platform"
53 select CPU_V7 61 select CPU_V7
@@ -58,6 +66,13 @@ config MACH_REALVIEW_PBA8
58 PB-A8 is a platform with an on-board Cortex-A8 and has support for 66 PB-A8 is a platform with an on-board Cortex-A8 and has support for
59 PCI-E and Compact Flash. 67 PCI-E and Compact Flash.
60 68
69config MACH_REALVIEW_PBX
70 bool "Support RealView/PBX platform"
71 select ARM_GIC
72 select HAVE_PATA_PLATFORM
73 help
74 Include support for the ARM(R) RealView PBX platform.
75
61config REALVIEW_HIGH_PHYS_OFFSET 76config REALVIEW_HIGH_PHYS_OFFSET
62 bool "High physical base address for the RealView platform" 77 bool "High physical base address for the RealView platform"
63 depends on !MACH_REALVIEW_PB1176 78 depends on !MACH_REALVIEW_PB1176
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index 7bea8ffc4b59..e704edb733c0 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -7,5 +7,7 @@ obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o 7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o 9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o
11obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 076acbc50706..9ea9c05093cd 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -48,6 +48,9 @@
48 48
49#include <asm/hardware/gic.h> 49#include <asm/hardware/gic.h>
50 50
51#include <mach/platform.h>
52#include <mach/irqs.h>
53
51#include "core.h" 54#include "core.h"
52#include "clock.h" 55#include "clock.h"
53 56
@@ -578,21 +581,22 @@ void realview_leds_event(led_event_t ledevt)
578{ 581{
579 unsigned long flags; 582 unsigned long flags;
580 u32 val; 583 u32 val;
584 u32 led = 1 << smp_processor_id();
581 585
582 local_irq_save(flags); 586 local_irq_save(flags);
583 val = readl(VA_LEDS_BASE); 587 val = readl(VA_LEDS_BASE);
584 588
585 switch (ledevt) { 589 switch (ledevt) {
586 case led_idle_start: 590 case led_idle_start:
587 val = val & ~REALVIEW_SYS_LED0; 591 val = val & ~led;
588 break; 592 break;
589 593
590 case led_idle_end: 594 case led_idle_end:
591 val = val | REALVIEW_SYS_LED0; 595 val = val | led;
592 break; 596 break;
593 597
594 case led_timer: 598 case led_timer:
595 val = val ^ REALVIEW_SYS_LED1; 599 val = val ^ REALVIEW_SYS_LED7;
596 break; 600 break;
597 601
598 case led_halted: 602 case led_halted:
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 21c08637683b..59a337ba4be7 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -51,9 +51,6 @@ extern struct mmc_platform_data realview_mmc0_plat_data;
51extern struct mmc_platform_data realview_mmc1_plat_data; 51extern struct mmc_platform_data realview_mmc1_plat_data;
52extern struct clcd_board clcd_plat_data; 52extern struct clcd_board clcd_plat_data;
53extern void __iomem *gic_cpu_base_addr; 53extern void __iomem *gic_cpu_base_addr;
54#ifdef CONFIG_LOCAL_TIMERS
55extern void __iomem *twd_base;
56#endif
57extern void __iomem *timer0_va_base; 54extern void __iomem *timer0_va_base;
58extern void __iomem *timer1_va_base; 55extern void __iomem *timer1_va_base;
59extern void __iomem *timer2_va_base; 56extern void __iomem *timer2_va_base;
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 268d7701fa9b..794a8d91a6a6 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -62,111 +62,6 @@
62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63#endif 63#endif
64 64
65#define IRQ_EB_GIC_START 32
66
67/*
68 * RealView EB interrupt sources
69 */
70#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
71#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
72#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
73#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
74#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
75#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
76#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
77#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
78#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
79 /* 9 reserved */
80#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
81#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
82#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
83#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
84#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
85#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
86#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
87#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
88#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
89#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
90#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
91#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
92#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
93#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
94#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
95#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
96#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
97#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
98#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
99#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
100#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
101#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
102
103/*
104 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
105 */
106#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
107#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
108#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
109#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
110#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
111#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
112#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
113#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
114#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
115#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
116#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
117#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
118#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
119#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
120#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
121#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
122
123#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
124#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
125#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
126#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
127#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
128#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
129#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
130#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
131#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
132#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
133#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
134#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
135
136#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
137#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
138#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
139
140#define IRQ_EB11MP_UART2 -1
141#define IRQ_EB11MP_UART3 -1
142#define IRQ_EB11MP_CLCD -1
143#define IRQ_EB11MP_DMA -1
144#define IRQ_EB11MP_WDOG -1
145#define IRQ_EB11MP_GPIO0 -1
146#define IRQ_EB11MP_GPIO1 -1
147#define IRQ_EB11MP_GPIO2 -1
148#define IRQ_EB11MP_SCI -1
149#define IRQ_EB11MP_SSP -1
150
151#define NR_GIC_EB11MP 2
152
153/*
154 * Only define NR_IRQS if less than NR_IRQS_EB
155 */
156#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
157
158#if defined(CONFIG_MACH_REALVIEW_EB) \
159 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
160#undef NR_IRQS
161#define NR_IRQS NR_IRQS_EB
162#endif
163
164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
166#undef MAX_GIC_NR
167#define MAX_GIC_NR NR_GIC_EB11MP
168#endif
169
170/* 65/*
171 * Core tile identification (REALVIEW_SYS_PROCID) 66 * Core tile identification (REALVIEW_SYS_PROCID)
172 */ 67 */
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h
index 858eea7b1adc..98f8e7eeacc2 100644
--- a/arch/arm/mach-realview/include/mach/board-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/board-pb1176.h
@@ -32,6 +32,8 @@
32#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ 32#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
33#define REALVIEW_PB1176_FLASH_BASE 0x30000000 33#define REALVIEW_PB1176_FLASH_BASE 0x30000000
34#define REALVIEW_PB1176_FLASH_SIZE SZ_64M 34#define REALVIEW_PB1176_FLASH_SIZE SZ_64M
35#define REALVIEW_PB1176_SEC_FLASH_BASE 0x3C000000 /* Secure flash */
36#define REALVIEW_PB1176_SEC_FLASH_SIZE SZ_64M
35 37
36#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */ 38#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */
37#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */ 39#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */
@@ -71,82 +73,4 @@
71#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ 73#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
72#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ 74#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
73 75
74/*
75 * Irqs
76 */
77#define IRQ_DC1176_GIC_START 32
78#define IRQ_PB1176_GIC_START 64
79
80/*
81 * ARM1176 DevChip interrupt sources (primary GIC)
82 */
83#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
84#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
85#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
86#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
87#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
88#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
89#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
90#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
91#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
92#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
93#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
94#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
95#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
96#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
97#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
98#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
99
100#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
101#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
102
103/*
104 * RealView PB1176 interrupt sources (secondary GIC)
105 */
106#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
107#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
108#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
109#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
110#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
111#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
112#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
113#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
114#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
115#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
116#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
117
118#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
119
120#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
121
122#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
123#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
124#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
125#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
126
127#define IRQ_PB1176_GPIO0 -1
128#define IRQ_PB1176_SSP -1
129#define IRQ_PB1176_SCTL -1
130
131#define NR_GIC_PB1176 2
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PB1176
135 */
136#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
137
138#if defined(CONFIG_MACH_REALVIEW_PB1176)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PB1176
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PB1176
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PB1176 */
151
152#endif /* __ASM_ARCH_BOARD_PB1176_H */ 76#endif /* __ASM_ARCH_BOARD_PB1176_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index 53ea0e7a1267..f0d68e0fea01 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -81,105 +81,4 @@
81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
83 83
84/*
85 * Irqs
86 */
87#define IRQ_TC11MP_GIC_START 32
88#define IRQ_PB11MP_GIC_START 64
89
90/*
91 * ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
92 */
93#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
94#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
95#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
96#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
97#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
98#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
99#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
100#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
101#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
102#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
103#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
104#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
105#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
106#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
107#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
108#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
109
110#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
111#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
112#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
113#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
114#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
115#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
116#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
117#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
118#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
119#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
120#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
121#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
122
123#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
124#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
125#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
126
127/*
128 * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
129 */
130#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
131#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
132#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
133#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
134#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
135#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
136#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
137 /* 9 reserved */
138#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
139#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
140#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
141#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
142#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
143#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
144#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
145#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
146#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
147#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
148#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
149#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
150#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
151#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
152#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
153#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
154#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
155#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
156#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
157#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
158#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
159#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
160
161#define IRQ_PB11MP_SMC -1
162#define IRQ_PB11MP_SCTL -1
163
164#define NR_GIC_PB11MP 2
165
166/*
167 * Only define NR_IRQS if less than NR_IRQS_PB11MP
168 */
169#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
170
171#if defined(CONFIG_MACH_REALVIEW_PB11MP)
172
173#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
174#undef NR_IRQS
175#define NR_IRQS NR_IRQS_PB11MP
176#endif
177
178#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
179#undef MAX_GIC_NR
180#define MAX_GIC_NR NR_GIC_PB11MP
181#endif
182
183#endif /* CONFIG_MACH_REALVIEW_PB11MP */
184
185#endif /* __ASM_ARCH_BOARD_PB11MP_H */ 84#endif /* __ASM_ARCH_BOARD_PB11MP_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
index 307f97b16e5b..4dfc67a4f45f 100644
--- a/arch/arm/mach-realview/include/mach/board-pba8.h
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -70,81 +70,4 @@
70#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */ 70#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
71#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */ 71#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
72 72
73/*
74 * Irqs
75 */
76#define IRQ_PBA8_GIC_START 32
77
78/* L220
79#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
80#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
81#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
82*/
83
84/*
85 * PB-A8 on-board gic irq sources
86 */
87#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
88#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
89#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
90#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
91#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
92#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
93#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
94#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
95#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
96 /* 9 reserved */
97#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
98#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
99#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
100#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
101#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
102#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
103#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
104#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
105#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
106#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
107#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
108#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
109#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
110#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
111#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
112#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
113#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
114#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
115#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
116#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
117#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
118#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
119
120/* ... */
121#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
122#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
123#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
124#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
125
126#define IRQ_PBA8_SMC -1
127#define IRQ_PBA8_SCTL -1
128
129#define NR_GIC_PBA8 1
130
131/*
132 * Only define NR_IRQS if less than NR_IRQS_PBA8
133 */
134#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
135
136#if defined(CONFIG_MACH_REALVIEW_PBA8)
137
138#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
139#undef NR_IRQS
140#define NR_IRQS NR_IRQS_PBA8
141#endif
142
143#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
144#undef MAX_GIC_NR
145#define MAX_GIC_NR NR_GIC_PBA8
146#endif
147
148#endif /* CONFIG_MACH_REALVIEW_PBA8 */
149
150#endif /* __ASM_ARCH_BOARD_PBA8_H */ 73#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pbx.h b/arch/arm/mach-realview/include/mach/board-pbx.h
new file mode 100644
index 000000000000..848bfff6d8f1
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pbx.h
@@ -0,0 +1,108 @@
1/*
2 * arch/arm/mach-realview/include/mach/board-pbx.h
3 *
4 * Copyright (C) 2009 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef __ASM_ARCH_BOARD_PBX_H
21#define __ASM_ARCH_BOARD_PBX_H
22
23#include <mach/platform.h>
24
25/*
26 * Peripheral addresses
27 */
28#define REALVIEW_PBX_UART0_BASE 0x10009000 /* UART 0 */
29#define REALVIEW_PBX_UART1_BASE 0x1000A000 /* UART 1 */
30#define REALVIEW_PBX_UART2_BASE 0x1000B000 /* UART 2 */
31#define REALVIEW_PBX_UART3_BASE 0x1000C000 /* UART 3 */
32#define REALVIEW_PBX_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
33#define REALVIEW_PBX_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
34#define REALVIEW_PBX_WATCHDOG_BASE 0x10010000 /* watchdog interface */
35#define REALVIEW_PBX_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
36#define REALVIEW_PBX_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
37#define REALVIEW_PBX_GPIO0_BASE 0x10013000 /* GPIO port 0 */
38#define REALVIEW_PBX_RTC_BASE 0x10017000 /* Real Time Clock */
39#define REALVIEW_PBX_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
40#define REALVIEW_PBX_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
41#define REALVIEW_PBX_SCTL_BASE 0x1001A000 /* System Controller */
42#define REALVIEW_PBX_CLCD_BASE 0x10020000 /* CLCD */
43#define REALVIEW_PBX_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
44#define REALVIEW_PBX_DMC_BASE 0x100E0000 /* DMC configuration */
45#define REALVIEW_PBX_SMC_BASE 0x100E1000 /* SMC configuration */
46#define REALVIEW_PBX_CAN_BASE 0x100E2000 /* CAN bus */
47#define REALVIEW_PBX_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
48#define REALVIEW_PBX_FLASH0_BASE 0x40000000
49#define REALVIEW_PBX_FLASH0_SIZE SZ_64M
50#define REALVIEW_PBX_FLASH1_BASE 0x44000000
51#define REALVIEW_PBX_FLASH1_SIZE SZ_64M
52#define REALVIEW_PBX_ETH_BASE 0x4E000000 /* Ethernet */
53#define REALVIEW_PBX_USB_BASE 0x4F000000 /* USB */
54#define REALVIEW_PBX_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
55#define REALVIEW_PBX_LT_BASE 0xC0000000 /* Logic Tile expansion */
56#define REALVIEW_PBX_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
57#define REALVIEW_PBX_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
58
59/*
60 * Tile-specific addresses
61 */
62#define REALVIEW_PBX_TILE_SCU_BASE 0x1F000000 /* SCU registers */
63#define REALVIEW_PBX_TILE_GIC_CPU_BASE 0x1F000100 /* Private Generic interrupt controller CPU interface */
64#define REALVIEW_PBX_TILE_TWD_BASE 0x1F000600
65#define REALVIEW_PBX_TILE_TWD_PERCPU_BASE 0x1F000700
66#define REALVIEW_PBX_TILE_TWD_SIZE 0x00000100
67#define REALVIEW_PBX_TILE_GIC_DIST_BASE 0x1F001000 /* Private Generic interrupt controller distributor */
68#define REALVIEW_PBX_TILE_L220_BASE 0x1F002000 /* L220 registers */
69
70#define REALVIEW_PBX_SYS_PLD_CTRL1 0x74
71
72/*
73 * PBX PCI regions
74 */
75#define REALVIEW_PBX_PCI_BASE 0x90040000 /* PCI-X Unit base */
76#define REALVIEW_PBX_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
77#define REALVIEW_PBX_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
78
79#define REALVIEW_PBX_PCI_BASE_SIZE 0x10000 /* 16 Kb */
80#define REALVIEW_PBX_PCI_IO_SIZE 0x1000 /* 4 Kb */
81#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */
82
83/*
84 * Core tile identification (REALVIEW_SYS_PROCID)
85 */
86#define REALVIEW_PBX_PROC_MASK 0xFF000000
87#define REALVIEW_PBX_PROC_ARM7TDMI 0x00000000
88#define REALVIEW_PBX_PROC_ARM9 0x02000000
89#define REALVIEW_PBX_PROC_ARM11 0x04000000
90#define REALVIEW_PBX_PROC_ARM11MP 0x06000000
91#define REALVIEW_PBX_PROC_A9MP 0x0C000000
92#define REALVIEW_PBX_PROC_A8 0x0E000000
93
94#define check_pbx_proc(proc_type) \
95 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_PBX_PROC_MASK) \
96 == proc_type)
97
98#ifdef CONFIG_MACH_REALVIEW_PBX
99#define core_tile_pbx11mp() check_pbx_proc(REALVIEW_PBX_PROC_ARM11MP)
100#define core_tile_pbxa9mp() check_pbx_proc(REALVIEW_PBX_PROC_A9MP)
101#define core_tile_pbxa8() check_pbx_proc(REALVIEW_PBX_PROC_A8)
102#else
103#define core_tile_pbx11mp() 0
104#define core_tile_pbxa9mp() 0
105#define core_tile_pbxa8() 0
106#endif
107
108#endif /* __ASM_ARCH_BOARD_PBX_H */
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 92dbcb9e1792..932d8af18062 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -12,7 +12,8 @@
12 12
13#if defined(CONFIG_MACH_REALVIEW_EB) || \ 13#if defined(CONFIG_MACH_REALVIEW_EB) || \
14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \ 14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \
15 defined(CONFIG_MACH_REALVIEW_PBA8) 15 defined(CONFIG_MACH_REALVIEW_PBA8) || \
16 defined(CONFIG_MACH_REALVIEW_PBX)
16#ifndef DEBUG_LL_UART_OFFSET 17#ifndef DEBUG_LL_UART_OFFSET
17#define DEBUG_LL_UART_OFFSET 0x00009000 18#define DEBUG_LL_UART_OFFSET 0x00009000
18#elif DEBUG_LL_UART_OFFSET != 0x00009000 19#elif DEBUG_LL_UART_OFFSET != 0x00009000
diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h
new file mode 100644
index 000000000000..204d5378f309
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-eb.h
@@ -0,0 +1,129 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-eb.h
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_EB_H
22#define __MACH_IRQS_EB_H
23
24#define IRQ_EB_GIC_START 32
25
26/*
27 * RealView EB interrupt sources
28 */
29#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
30#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
31#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
32#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
33#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
34#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
35#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
36#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
37#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
38 /* 9 reserved */
39#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
40#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
41#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
42#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
43#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
44#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
45#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
46#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
47#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
48#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
49#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
50#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
51#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
52#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
53#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
54#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
55#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
56#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
57#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
58#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
59#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
60#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
61
62/*
63 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
64 */
65#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
66#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
67#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
68#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
69#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
70#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
71#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
72#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
73#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
74#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
75#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
76#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
77#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
78#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
79#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
80#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
81
82#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
83#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
84#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
85#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
86#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
87#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
88#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
89#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
90#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
91#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
92#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
93#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
94
95#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
96#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
97#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
98
99#define IRQ_EB11MP_UART2 -1
100#define IRQ_EB11MP_UART3 -1
101#define IRQ_EB11MP_CLCD -1
102#define IRQ_EB11MP_DMA -1
103#define IRQ_EB11MP_WDOG -1
104#define IRQ_EB11MP_GPIO0 -1
105#define IRQ_EB11MP_GPIO1 -1
106#define IRQ_EB11MP_GPIO2 -1
107#define IRQ_EB11MP_SCI -1
108#define IRQ_EB11MP_SSP -1
109
110#define NR_GIC_EB11MP 2
111
112/*
113 * Only define NR_IRQS if less than NR_IRQS_EB
114 */
115#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
116
117#if defined(CONFIG_MACH_REALVIEW_EB) \
118 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
119#undef NR_IRQS
120#define NR_IRQS NR_IRQS_EB
121#endif
122
123#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
124 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
125#undef MAX_GIC_NR
126#define MAX_GIC_NR NR_GIC_EB11MP
127#endif
128
129#endif /* __MACH_IRQS_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
new file mode 100644
index 000000000000..2410d4f8ddd3
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -0,0 +1,99 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pb1176.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PB1176_H
22#define __MACH_IRQS_PB1176_H
23
24#define IRQ_DC1176_GIC_START 32
25#define IRQ_PB1176_GIC_START 64
26
27/*
28 * ARM1176 DevChip interrupt sources (primary GIC)
29 */
30#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
31#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
32#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
33#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
34#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
35#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
36#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
37#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
38#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
39#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
40#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
41#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
42#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
43#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
44#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
45#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
46
47#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
48#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
49
50/*
51 * RealView PB1176 interrupt sources (secondary GIC)
52 */
53#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
54#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
55#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
56#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
57#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
58#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
59#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
60#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
61#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
62#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
63#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
64
65#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
66
67#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
68
69#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
70#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
71#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
72#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
73
74#define IRQ_PB1176_GPIO0 -1
75#define IRQ_PB1176_SSP -1
76#define IRQ_PB1176_SCTL -1
77
78#define NR_GIC_PB1176 2
79
80/*
81 * Only define NR_IRQS if less than NR_IRQS_PB1176
82 */
83#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
84
85#if defined(CONFIG_MACH_REALVIEW_PB1176)
86
87#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
88#undef NR_IRQS
89#define NR_IRQS NR_IRQS_PB1176
90#endif
91
92#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
93#undef MAX_GIC_NR
94#define MAX_GIC_NR NR_GIC_PB1176
95#endif
96
97#endif /* CONFIG_MACH_REALVIEW_PB1176 */
98
99#endif /* __MACH_IRQS_PB1176_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb11mp.h b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h
new file mode 100644
index 000000000000..34e255add21e
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pb11mp.h
@@ -0,0 +1,122 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pb11mp.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PB11MP_H
22#define __MACH_IRQS_PB11MP_H
23
24#define IRQ_TC11MP_GIC_START 32
25#define IRQ_PB11MP_GIC_START 64
26
27/*
28 * ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
29 */
30#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
31#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
32#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
33#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
34#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
35#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
36#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
37#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
38#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
39#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
40#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
41#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
42#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
43#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
44#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
45#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
46
47#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
48#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
49#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
50#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
51#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
52#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
53#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
54#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
55#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
56#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
57#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
58#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
59
60#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
61#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
62#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
63
64/*
65 * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
66 */
67#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
68#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
69#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
70#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
71#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
72#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
73#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
74 /* 9 reserved */
75#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
76#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
77#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
78#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
79#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
80#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
81#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
82#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
83#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
84#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
85#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
86#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
87#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
88#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
89#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
90#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
91#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
92#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
93#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
94#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
95#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
96#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
97
98#define IRQ_PB11MP_SMC -1
99#define IRQ_PB11MP_SCTL -1
100
101#define NR_GIC_PB11MP 2
102
103/*
104 * Only define NR_IRQS if less than NR_IRQS_PB11MP
105 */
106#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
107
108#if defined(CONFIG_MACH_REALVIEW_PB11MP)
109
110#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
111#undef NR_IRQS
112#define NR_IRQS NR_IRQS_PB11MP
113#endif
114
115#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
116#undef MAX_GIC_NR
117#define MAX_GIC_NR NR_GIC_PB11MP
118#endif
119
120#endif /* CONFIG_MACH_REALVIEW_PB11MP */
121
122#endif /* __MACH_IRQS_PB11MP_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pba8.h b/arch/arm/mach-realview/include/mach/irqs-pba8.h
new file mode 100644
index 000000000000..86792a9f2ab6
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pba8.h
@@ -0,0 +1,98 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_IRQS_PBA8_H
22#define __MACH_IRQS_PBA8_H
23
24#define IRQ_PBA8_GIC_START 32
25
26/* L220
27#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
28#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
29#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
30*/
31
32/*
33 * PB-A8 on-board gic irq sources
34 */
35#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
36#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
37#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
38#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
39#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
40#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
41#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
42#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
43#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
44 /* 9 reserved */
45#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
46#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
47#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
48#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
49#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
50#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
51#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
52#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
53#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
54#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
55#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
56#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
57#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
58#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
59#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
60#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
61#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
62#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
63#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
64#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
65#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
66#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
67
68/* ... */
69#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
70#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
71#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
72#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
73
74#define IRQ_PBA8_SMC -1
75#define IRQ_PBA8_SCTL -1
76
77#define NR_GIC_PBA8 1
78
79/*
80 * Only define NR_IRQS if less than NR_IRQS_PBA8
81 */
82#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
83
84#if defined(CONFIG_MACH_REALVIEW_PBA8)
85
86#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
87#undef NR_IRQS
88#define NR_IRQS NR_IRQS_PBA8
89#endif
90
91#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
92#undef MAX_GIC_NR
93#define MAX_GIC_NR NR_GIC_PBA8
94#endif
95
96#endif /* CONFIG_MACH_REALVIEW_PBA8 */
97
98#endif /* __MACH_IRQS_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pbx.h b/arch/arm/mach-realview/include/mach/irqs-pbx.h
new file mode 100644
index 000000000000..deaad4302b17
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-pbx.h
@@ -0,0 +1,115 @@
1/*
2 * arch/arm/mach-realview/include/mach/irqs-pbx.h
3 *
4 * Copyright (C) 2009 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef __MACH_IRQS_PBX_H
21#define __MACH_IRQS_PBX_H
22
23#define IRQ_PBX_GIC_START 32
24
25/* L220
26#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
27#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
28#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
29*/
30
31/*
32 * PBX on-board gic irq sources
33 */
34#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
35#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
36#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
37#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
38#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
39#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
40#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
41#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
42#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
43 /* 9 reserved */
44#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
45#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
46#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
47#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
48#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
49#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
50#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
51#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
52#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
53#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
54#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
55#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
56#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
57#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
58#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
59#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
60#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
61#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
62#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
63#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
64#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
65#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
66
67#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
68#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
69#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
70#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
71#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
72#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
73#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
74#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
75
76#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
77#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
78#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
79/* ... */
80#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
81#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
82#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
83#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
84
85/* ... */
86#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
87#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
88#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
89#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
90
91#define IRQ_PBX_SMC -1
92#define IRQ_PBX_SCTL -1
93
94#define NR_GIC_PBX 1
95
96/*
97 * Only define NR_IRQS if less than NR_IRQS_PBX
98 */
99#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
100
101#if defined(CONFIG_MACH_REALVIEW_PBX)
102
103#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
104#undef NR_IRQS
105#define NR_IRQS NR_IRQS_PBX
106#endif
107
108#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
109#undef MAX_GIC_NR
110#define MAX_GIC_NR NR_GIC_PBX
111#endif
112
113#endif /* CONFIG_MACH_REALVIEW_PBX */
114
115#endif /* __MACH_IRQS_PBX_H */
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index fe5cb987aa21..78854f2fa323 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -22,10 +22,11 @@
22#ifndef __ASM_ARCH_IRQS_H 22#ifndef __ASM_ARCH_IRQS_H
23#define __ASM_ARCH_IRQS_H 23#define __ASM_ARCH_IRQS_H
24 24
25#include <mach/board-eb.h> 25#include <mach/irqs-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/irqs-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/irqs-pb1176.h>
28#include <mach/board-pba8.h> 28#include <mach/irqs-pba8.h>
29#include <mach/irqs-pbx.h>
29 30
30#define IRQ_LOCALTIMER 29 31#define IRQ_LOCALTIMER 29
31#define IRQ_LOCALWDOG 30 32#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/mach-realview/include/mach/scu.h b/arch/arm/mach-realview/include/mach/scu.h
deleted file mode 100644
index d55802d645af..000000000000
--- a/arch/arm/mach-realview/include/mach/scu.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASMARM_ARCH_SCU_H
2#define __ASMARM_ARCH_SCU_H
3
4/*
5 * SCU registers
6 */
7#define SCU_CTRL 0x00
8#define SCU_CONFIG 0x04
9#define SCU_CPU_STATUS 0x08
10#define SCU_INVALIDATE 0x0c
11#define SCU_FPGA_REVISION 0x10
12
13#endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 415d634d52ab..83050378ffd2 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -24,6 +24,7 @@
24#include <mach/board-pb11mp.h> 24#include <mach/board-pb11mp.h>
25#include <mach/board-pb1176.h> 25#include <mach/board-pb1176.h>
26#include <mach/board-pba8.h> 26#include <mach/board-pba8.h>
27#include <mach/board-pbx.h>
27 28
28#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 29#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
29#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 30#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
@@ -43,6 +44,8 @@ static inline unsigned long get_uart_base(void)
43 return REALVIEW_PB1176_UART0_BASE; 44 return REALVIEW_PB1176_UART0_BASE;
44 else if (machine_is_realview_pba8()) 45 else if (machine_is_realview_pba8())
45 return REALVIEW_PBA8_UART0_BASE; 46 return REALVIEW_PBA8_UART0_BASE;
47 else if (machine_is_realview_pbx())
48 return REALVIEW_PBX_UART0_BASE;
46 else 49 else
47 return 0; 50 return 0;
48} 51}
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 1c01d13460f0..60b4e111f459 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -9,196 +9,18 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/smp.h> 12#include <linux/smp.h>
16#include <linux/jiffies.h>
17#include <linux/percpu.h>
18#include <linux/clockchips.h> 13#include <linux/clockchips.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21 14
22#include <asm/hardware/arm_twd.h>
23#include <asm/hardware/gic.h>
24#include <mach/hardware.h>
25#include <asm/irq.h> 15#include <asm/irq.h>
26 16#include <asm/smp_twd.h>
27static DEFINE_PER_CPU(struct clock_event_device, local_clockevent); 17#include <asm/localtimer.h>
28
29/*
30 * Used on SMP for either the local timer or IPI_TIMER
31 */
32void local_timer_interrupt(void)
33{
34 struct clock_event_device *clk = &__get_cpu_var(local_clockevent);
35
36 clk->event_handler(clk);
37}
38
39#ifdef CONFIG_LOCAL_TIMERS
40
41/* set up by the platform code */
42void __iomem *twd_base;
43
44static unsigned long mpcore_timer_rate;
45
46static void local_timer_set_mode(enum clock_event_mode mode,
47 struct clock_event_device *clk)
48{
49 unsigned long ctrl;
50
51 switch(mode) {
52 case CLOCK_EVT_MODE_PERIODIC:
53 /* timer load already set up */
54 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
55 | TWD_TIMER_CONTROL_PERIODIC;
56 break;
57 case CLOCK_EVT_MODE_ONESHOT:
58 /* period set, and timer enabled in 'next_event' hook */
59 ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
60 break;
61 case CLOCK_EVT_MODE_UNUSED:
62 case CLOCK_EVT_MODE_SHUTDOWN:
63 default:
64 ctrl = 0;
65 }
66
67 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
68}
69
70static int local_timer_set_next_event(unsigned long evt,
71 struct clock_event_device *unused)
72{
73 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
74
75 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
76 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
77
78 return 0;
79}
80
81/*
82 * local_timer_ack: checks for a local timer interrupt.
83 *
84 * If a local timer interrupt has occurred, acknowledge and return 1.
85 * Otherwise, return 0.
86 */
87int local_timer_ack(void)
88{
89 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
90 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
91 return 1;
92 }
93
94 return 0;
95}
96
97static void __cpuinit twd_calibrate_rate(void)
98{
99 unsigned long load, count;
100 u64 waitjiffies;
101
102 /*
103 * If this is the first time round, we need to work out how fast
104 * the timer ticks
105 */
106 if (mpcore_timer_rate == 0) {
107 printk("Calibrating local timer... ");
108
109 /* Wait for a tick to start */
110 waitjiffies = get_jiffies_64() + 1;
111
112 while (get_jiffies_64() < waitjiffies)
113 udelay(10);
114
115 /* OK, now the tick has started, let's get the timer going */
116 waitjiffies += 5;
117
118 /* enable, no interrupt or reload */
119 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
120
121 /* maximum value */
122 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
123
124 while (get_jiffies_64() < waitjiffies)
125 udelay(10);
126
127 count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
128
129 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
130
131 printk("%lu.%02luMHz.\n", mpcore_timer_rate / 1000000,
132 (mpcore_timer_rate / 100000) % 100);
133 }
134
135 load = mpcore_timer_rate / HZ;
136
137 __raw_writel(load, twd_base + TWD_TIMER_LOAD);
138}
139 18
140/* 19/*
141 * Setup the local clock events for a CPU. 20 * Setup the local clock events for a CPU.
142 */ 21 */
143void __cpuinit local_timer_setup(void) 22void __cpuinit local_timer_setup(struct clock_event_device *evt)
144{
145 unsigned int cpu = smp_processor_id();
146 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
147 unsigned long flags;
148
149 twd_calibrate_rate();
150
151 clk->name = "local_timer";
152 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
153 clk->rating = 350;
154 clk->set_mode = local_timer_set_mode;
155 clk->set_next_event = local_timer_set_next_event;
156 clk->irq = IRQ_LOCALTIMER;
157 clk->cpumask = cpumask_of(cpu);
158 clk->shift = 20;
159 clk->mult = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift);
160 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
161 clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
162
163 /* Make sure our local interrupt controller has this enabled */
164 local_irq_save(flags);
165 get_irq_chip(IRQ_LOCALTIMER)->unmask(IRQ_LOCALTIMER);
166 local_irq_restore(flags);
167
168 clockevents_register_device(clk);
169}
170
171/*
172 * take a local timer down
173 */
174void __cpuexit local_timer_stop(void)
175{ 23{
176 __raw_writel(0, twd_base + TWD_TIMER_CONTROL); 24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt);
177} 26}
178
179#else /* CONFIG_LOCAL_TIMERS */
180
181static void dummy_timer_set_mode(enum clock_event_mode mode,
182 struct clock_event_device *clk)
183{
184}
185
186void __cpuinit local_timer_setup(void)
187{
188 unsigned int cpu = smp_processor_id();
189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
190
191 clk->name = "dummy_timer";
192 clk->features = CLOCK_EVT_FEAT_ONESHOT |
193 CLOCK_EVT_FEAT_PERIODIC |
194 CLOCK_EVT_FEAT_DUMMY;
195 clk->rating = 400;
196 clk->mult = 1;
197 clk->set_mode = dummy_timer_set_mode;
198 clk->broadcast = smp_timer_broadcast;
199 clk->cpumask = cpumask_of(cpu);
200
201 clockevents_register_device(clk);
202}
203
204#endif /* !CONFIG_LOCAL_TIMERS */
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 30a9c68591f6..ac0e83f1cc3a 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -19,10 +19,12 @@
19#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/localtimer.h>
22 23
23#include <mach/board-eb.h> 24#include <mach/board-eb.h>
24#include <mach/board-pb11mp.h> 25#include <mach/board-pb11mp.h>
25#include <mach/scu.h> 26#include <mach/board-pbx.h>
27#include <asm/smp_scu.h>
26 28
27#include "core.h" 29#include "core.h"
28 30
@@ -40,35 +42,19 @@ static void __iomem *scu_base_addr(void)
40 return __io_address(REALVIEW_EB11MP_SCU_BASE); 42 return __io_address(REALVIEW_EB11MP_SCU_BASE);
41 else if (machine_is_realview_pb11mp()) 43 else if (machine_is_realview_pb11mp())
42 return __io_address(REALVIEW_TC11MP_SCU_BASE); 44 return __io_address(REALVIEW_TC11MP_SCU_BASE);
45 else if (machine_is_realview_pbx() &&
46 (core_tile_pbx11mp() || core_tile_pbxa9mp()))
47 return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
43 else 48 else
44 return (void __iomem *)0; 49 return (void __iomem *)0;
45} 50}
46 51
47static unsigned int __init get_core_count(void) 52static inline unsigned int get_core_count(void)
48{ 53{
49 unsigned int ncores;
50 void __iomem *scu_base = scu_base_addr(); 54 void __iomem *scu_base = scu_base_addr();
51 55 if (scu_base)
52 if (scu_base) { 56 return scu_get_core_count(scu_base);
53 ncores = __raw_readl(scu_base + SCU_CONFIG); 57 return 1;
54 ncores = (ncores & 0x03) + 1;
55 } else
56 ncores = 1;
57
58 return ncores;
59}
60
61/*
62 * Setup the SCU
63 */
64static void scu_enable(void)
65{
66 u32 scu_ctrl;
67 void __iomem *scu_base = scu_base_addr();
68
69 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
70 scu_ctrl |= 1;
71 __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
72} 58}
73 59
74static DEFINE_SPINLOCK(boot_lock); 60static DEFINE_SPINLOCK(boot_lock);
@@ -184,7 +170,7 @@ void __init smp_init_cpus(void)
184 unsigned int i, ncores = get_core_count(); 170 unsigned int i, ncores = get_core_count();
185 171
186 for (i = 0; i < ncores; i++) 172 for (i = 0; i < ncores; i++)
187 cpu_set(i, cpu_possible_map); 173 set_cpu_possible(i, true);
188} 174}
189 175
190void __init smp_prepare_cpus(unsigned int max_cpus) 176void __init smp_prepare_cpus(unsigned int max_cpus)
@@ -217,19 +203,12 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
217 if (max_cpus > ncores) 203 if (max_cpus > ncores)
218 max_cpus = ncores; 204 max_cpus = ncores;
219 205
220#if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
221 /*
222 * Enable the local timer or broadcast device for the boot CPU.
223 */
224 local_timer_setup();
225#endif
226
227 /* 206 /*
228 * Initialise the present map, which describes the set of CPUs 207 * Initialise the present map, which describes the set of CPUs
229 * actually populated at the present time. 208 * actually populated at the present time.
230 */ 209 */
231 for (i = 0; i < max_cpus; i++) 210 for (i = 0; i < max_cpus; i++)
232 cpu_set(i, cpu_present_map); 211 set_cpu_present(i, true);
233 212
234 /* 213 /*
235 * Initialise the SCU if there are more than one CPU and let 214 * Initialise the SCU if there are more than one CPU and let
@@ -239,7 +218,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
239 * WFI 218 * WFI
240 */ 219 */
241 if (max_cpus > 1) { 220 if (max_cpus > 1) {
242 scu_enable(); 221 /*
222 * Enable the local timer or broadcast device for the
223 * boot CPU, but only if we have more than one CPU.
224 */
225 percpu_timer_setup();
226
227 scu_enable(scu_base_addr());
243 poke_milo(); 228 poke_milo();
244 } 229 }
245} 230}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index c20fbef122b3..8dfa44e08a94 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -32,6 +32,7 @@
32#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
33#include <asm/hardware/icst307.h> 33#include <asm/hardware/icst307.h>
34#include <asm/hardware/cache-l2x0.h> 34#include <asm/hardware/cache-l2x0.h>
35#include <asm/localtimer.h>
35 36
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
37#include <asm/mach/map.h> 38#include <asm/mach/map.h>
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index a64b84a7a3df..25efe71a67c7 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -203,11 +203,23 @@ static struct amba_device *amba_devs[] __initdata = {
203/* 203/*
204 * RealView PB1176 platform devices 204 * RealView PB1176 platform devices
205 */ 205 */
206static struct resource realview_pb1176_flash_resource = { 206static struct resource realview_pb1176_flash_resources[] = {
207 .start = REALVIEW_PB1176_FLASH_BASE, 207 [0] = {
208 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1, 208 .start = REALVIEW_PB1176_FLASH_BASE,
209 .flags = IORESOURCE_MEM, 209 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
210 .flags = IORESOURCE_MEM,
211 },
212 [1] = {
213 .start = REALVIEW_PB1176_SEC_FLASH_BASE,
214 .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
215 .flags = IORESOURCE_MEM,
216 },
210}; 217};
218#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
219#define PB1176_FLASH_BLOCKS 2
220#else
221#define PB1176_FLASH_BLOCKS 1
222#endif
211 223
212static struct resource realview_pb1176_smsc911x_resources[] = { 224static struct resource realview_pb1176_smsc911x_resources[] = {
213 [0] = { 225 [0] = {
@@ -271,7 +283,8 @@ static void __init realview_pb1176_init(void)
271 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff); 283 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
272#endif 284#endif
273 285
274 realview_flash_register(&realview_pb1176_flash_resource, 1); 286 realview_flash_register(realview_pb1176_flash_resources,
287 PB1176_FLASH_BLOCKS);
275 realview_eth_register(NULL, realview_pb1176_smsc911x_resources); 288 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
276 platform_device_register(&realview_i2c_device); 289 platform_device_register(&realview_i2c_device);
277 realview_usb_register(realview_pb1176_isp1761_resources); 290 realview_usb_register(realview_pb1176_isp1761_resources);
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index ea1e60eca359..dc4b16943907 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -32,6 +32,7 @@
32#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
33#include <asm/hardware/icst307.h> 33#include <asm/hardware/icst307.h>
34#include <asm/hardware/cache-l2x0.h> 34#include <asm/hardware/cache-l2x0.h>
35#include <asm/localtimer.h>
35 36
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
37#include <asm/mach/flash.h> 38#include <asm/mach/flash.h>
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
new file mode 100644
index 000000000000..1fe294d0bf9d
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -0,0 +1,335 @@
1/*
2 * arch/arm/mach-realview/realview_pbx.c
3 *
4 * Copyright (C) 2009 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/sysdev.h>
24#include <linux/amba/bus.h>
25#include <linux/io.h>
26
27#include <asm/irq.h>
28#include <asm/leds.h>
29#include <asm/mach-types.h>
30#include <asm/hardware/gic.h>
31#include <asm/hardware/cache-l2x0.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/mmc.h>
36#include <asm/mach/time.h>
37
38#include <mach/hardware.h>
39#include <mach/board-pbx.h>
40#include <mach/irqs.h>
41
42#include "core.h"
43
44static struct map_desc realview_pbx_io_desc[] __initdata = {
45 {
46 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
47 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
48 .length = SZ_4K,
49 .type = MT_DEVICE,
50 }, {
51 .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_CPU_BASE),
52 .pfn = __phys_to_pfn(REALVIEW_PBX_GIC_CPU_BASE),
53 .length = SZ_4K,
54 .type = MT_DEVICE,
55 }, {
56 .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_DIST_BASE),
57 .pfn = __phys_to_pfn(REALVIEW_PBX_GIC_DIST_BASE),
58 .length = SZ_4K,
59 .type = MT_DEVICE,
60 }, {
61 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
62 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
63 .length = SZ_4K,
64 .type = MT_DEVICE,
65 }, {
66 .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER0_1_BASE),
67 .pfn = __phys_to_pfn(REALVIEW_PBX_TIMER0_1_BASE),
68 .length = SZ_4K,
69 .type = MT_DEVICE,
70 }, {
71 .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER2_3_BASE),
72 .pfn = __phys_to_pfn(REALVIEW_PBX_TIMER2_3_BASE),
73 .length = SZ_4K,
74 .type = MT_DEVICE,
75 },
76#ifdef CONFIG_PCI
77 {
78 .virtual = PCIX_UNIT_BASE,
79 .pfn = __phys_to_pfn(REALVIEW_PBX_PCI_BASE),
80 .length = REALVIEW_PBX_PCI_BASE_SIZE,
81 .type = MT_DEVICE,
82 },
83#endif
84#ifdef CONFIG_DEBUG_LL
85 {
86 .virtual = IO_ADDRESS(REALVIEW_PBX_UART0_BASE),
87 .pfn = __phys_to_pfn(REALVIEW_PBX_UART0_BASE),
88 .length = SZ_4K,
89 .type = MT_DEVICE,
90 },
91#endif
92};
93
94static struct map_desc realview_local_io_desc[] __initdata = {
95 {
96 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE),
98 .length = SZ_4K,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_DIST_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_DIST_BASE),
103 .length = SZ_4K,
104 .type = MT_DEVICE,
105 }, {
106 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_L220_BASE),
107 .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_L220_BASE),
108 .length = SZ_8K,
109 .type = MT_DEVICE,
110 }
111};
112
113static void __init realview_pbx_map_io(void)
114{
115 iotable_init(realview_pbx_io_desc, ARRAY_SIZE(realview_pbx_io_desc));
116 if (core_tile_pbx11mp() || core_tile_pbxa9mp())
117 iotable_init(realview_local_io_desc, ARRAY_SIZE(realview_local_io_desc));
118}
119
120/*
121 * RealView PBXCore AMBA devices
122 */
123
124#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ }
125#define GPIO2_DMA { 0, 0 }
126#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ }
127#define GPIO3_DMA { 0, 0 }
128#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ }
129#define AACI_DMA { 0x80, 0x81 }
130#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
131#define MMCI0_DMA { 0x84, 0 }
132#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ }
133#define KMI0_DMA { 0, 0 }
134#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ }
135#define KMI1_DMA { 0, 0 }
136#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ }
137#define PBX_SMC_DMA { 0, 0 }
138#define MPMC_IRQ { NO_IRQ, NO_IRQ }
139#define MPMC_DMA { 0, 0 }
140#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ }
141#define PBX_CLCD_DMA { 0, 0 }
142#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ }
143#define DMAC_DMA { 0, 0 }
144#define SCTL_IRQ { NO_IRQ, NO_IRQ }
145#define SCTL_DMA { 0, 0 }
146#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ }
147#define PBX_WATCHDOG_DMA { 0, 0 }
148#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ }
149#define PBX_GPIO0_DMA { 0, 0 }
150#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ }
151#define GPIO1_DMA { 0, 0 }
152#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ }
153#define PBX_RTC_DMA { 0, 0 }
154#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ }
155#define SCI_DMA { 7, 6 }
156#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ }
157#define PBX_UART0_DMA { 15, 14 }
158#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ }
159#define PBX_UART1_DMA { 13, 12 }
160#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ }
161#define PBX_UART2_DMA { 11, 10 }
162#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ }
163#define PBX_UART3_DMA { 0x86, 0x87 }
164#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ }
165#define PBX_SSP_DMA { 9, 8 }
166
167/* FPGA Primecells */
168AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
169AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
170AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
171AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
172AMBA_DEVICE(uart3, "fpga:09", PBX_UART3, NULL);
173
174/* DevChip Primecells */
175AMBA_DEVICE(smc, "dev:00", PBX_SMC, NULL);
176AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
177AMBA_DEVICE(wdog, "dev:e1", PBX_WATCHDOG, NULL);
178AMBA_DEVICE(gpio0, "dev:e4", PBX_GPIO0, NULL);
179AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
180AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
181AMBA_DEVICE(rtc, "dev:e8", PBX_RTC, NULL);
182AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
183AMBA_DEVICE(uart0, "dev:f1", PBX_UART0, NULL);
184AMBA_DEVICE(uart1, "dev:f2", PBX_UART1, NULL);
185AMBA_DEVICE(uart2, "dev:f3", PBX_UART2, NULL);
186AMBA_DEVICE(ssp0, "dev:f4", PBX_SSP, NULL);
187
188/* Primecells on the NEC ISSP chip */
189AMBA_DEVICE(clcd, "issp:20", PBX_CLCD, &clcd_plat_data);
190AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
191
192static struct amba_device *amba_devs[] __initdata = {
193 &dmac_device,
194 &uart0_device,
195 &uart1_device,
196 &uart2_device,
197 &uart3_device,
198 &smc_device,
199 &clcd_device,
200 &sctl_device,
201 &wdog_device,
202 &gpio0_device,
203 &gpio1_device,
204 &gpio2_device,
205 &rtc_device,
206 &sci0_device,
207 &ssp0_device,
208 &aaci_device,
209 &mmc0_device,
210 &kmi0_device,
211 &kmi1_device,
212};
213
214/*
215 * RealView PB-X platform devices
216 */
217static struct resource realview_pbx_flash_resources[] = {
218 [0] = {
219 .start = REALVIEW_PBX_FLASH0_BASE,
220 .end = REALVIEW_PBX_FLASH0_BASE + REALVIEW_PBX_FLASH0_SIZE - 1,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = REALVIEW_PBX_FLASH1_BASE,
225 .end = REALVIEW_PBX_FLASH1_BASE + REALVIEW_PBX_FLASH1_SIZE - 1,
226 .flags = IORESOURCE_MEM,
227 },
228};
229
230static struct resource realview_pbx_smsc911x_resources[] = {
231 [0] = {
232 .start = REALVIEW_PBX_ETH_BASE,
233 .end = REALVIEW_PBX_ETH_BASE + SZ_64K - 1,
234 .flags = IORESOURCE_MEM,
235 },
236 [1] = {
237 .start = IRQ_PBX_ETH,
238 .end = IRQ_PBX_ETH,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243static struct resource realview_pbx_isp1761_resources[] = {
244 [0] = {
245 .start = REALVIEW_PBX_USB_BASE,
246 .end = REALVIEW_PBX_USB_BASE + SZ_128K - 1,
247 .flags = IORESOURCE_MEM,
248 },
249 [1] = {
250 .start = IRQ_PBX_USB,
251 .end = IRQ_PBX_USB,
252 .flags = IORESOURCE_IRQ,
253 },
254};
255
256static void __init gic_init_irq(void)
257{
258 /* ARM PBX on-board GIC */
259 if (core_tile_pbx11mp() || core_tile_pbxa9mp()) {
260 gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE);
261 gic_dist_init(0, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE),
262 29);
263 gic_cpu_init(0, __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE));
264 } else {
265 gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE);
266 gic_dist_init(0, __io_address(REALVIEW_PBX_GIC_DIST_BASE),
267 IRQ_PBX_GIC_START);
268 gic_cpu_init(0, __io_address(REALVIEW_PBX_GIC_CPU_BASE));
269 }
270}
271
272static void __init realview_pbx_timer_init(void)
273{
274 timer0_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE);
275 timer1_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE) + 0x20;
276 timer2_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE);
277 timer3_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE) + 0x20;
278
279#ifdef CONFIG_LOCAL_TIMERS
280 if (core_tile_pbx11mp() || core_tile_pbxa9mp())
281 twd_base = __io_address(REALVIEW_PBX_TILE_TWD_BASE);
282#endif
283 realview_timer_init(IRQ_PBX_TIMER0_1);
284}
285
286static struct sys_timer realview_pbx_timer = {
287 .init = realview_pbx_timer_init,
288};
289
290static void __init realview_pbx_init(void)
291{
292 int i;
293
294#ifdef CONFIG_CACHE_L2X0
295 if (core_tile_pbxa9mp()) {
296 void __iomem *l2x0_base =
297 __io_address(REALVIEW_PBX_TILE_L220_BASE);
298
299 /* set RAM latencies to 1 cycle for eASIC */
300 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
301 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
302
303 /* 16KB way size, 8-way associativity, parity disabled
304 * Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */
305 l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);
306 }
307#endif
308
309 realview_flash_register(realview_pbx_flash_resources,
310 ARRAY_SIZE(realview_pbx_flash_resources));
311 realview_eth_register(NULL, realview_pbx_smsc911x_resources);
312 platform_device_register(&realview_i2c_device);
313 platform_device_register(&realview_cf_device);
314 realview_usb_register(realview_pbx_isp1761_resources);
315
316 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
317 struct amba_device *d = amba_devs[i];
318 amba_device_register(d, &iomem_resource);
319 }
320
321#ifdef CONFIG_LEDS
322 leds_event = realview_leds_event;
323#endif
324}
325
326MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
327 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
328 .phys_io = REALVIEW_PBX_UART0_BASE,
329 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc,
330 .boot_params = PHYS_OFFSET + 0x00000100,
331 .map_io = realview_pbx_map_io,
332 .init_irq = gic_init_irq,
333 .timer = &realview_pbx_timer,
334 .init_machine = realview_pbx_init,
335MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-30 20:37:15 -0400