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-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h18
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h3
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h152
-rw-r--r--arch/arm/mach-realview/include/mach/debug-macro.S29
-rw-r--r--arch/arm/mach-realview/include/mach/hardware.h9
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-realview/include/mach/memory.h4
-rw-r--r--arch/arm/mach-realview/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-realview/include/mach/vmalloc.h2
9 files changed, 208 insertions, 13 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..268d7701fa9b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700 52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else 56#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ 58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ 60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
@@ -163,7 +161,7 @@
163#define NR_IRQS NR_IRQS_EB 161#define NR_IRQS NR_IRQS_EB
164#endif 162#endif
165 163
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ 164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR 166#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP 167#define MAX_GIC_NR NR_GIC_EB11MP
@@ -177,6 +175,7 @@
177#define REALVIEW_EB_PROC_ARM9 0x02000000 175#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000 176#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000 177#define REALVIEW_EB_PROC_ARM11MP 0x06000000
178#define REALVIEW_EB_PROC_A9MP 0x0C000000
180 179
181#define check_eb_proc(proc_type) \ 180#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 181 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
@@ -188,4 +187,13 @@
188#define core_tile_eb11mp() 0 187#define core_tile_eb11mp() 0
189#endif 188#endif
190 189
190#ifdef CONFIG_REALVIEW_EB_A9MP
191#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
192#else
193#define core_tile_a9mp() 0
194#endif
195
196#define machine_is_realview_eb_mp() \
197 (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
198
191#endif /* __ASM_ARCH_BOARD_EB_H */ 199#endif /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
77 */ 77 */
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
81#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
82#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
83#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
84 83
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
1/*
2 * include/asm-arm/arch-realview/board-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PBA8_H
22#define __ASM_ARCH_BOARD_PBA8_H
23
24#include <mach/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
35#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
36#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
37#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
38#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
39#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
40#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
41#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
42#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
43#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
44#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
45#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
46#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
47#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
48#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
49#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
50#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
51#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
52#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
53#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
54#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
55#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
56#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
57#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
58#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
59#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
60#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
61
62#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
63
64/*
65 * PBA8 PCI regions
66 */
67#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
68#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
69#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
70
71#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
72#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
73#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
74
75/*
76 * Irqs
77 */
78#define IRQ_PBA8_GIC_START 32
79
80/* L220
81#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
82#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
83#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
84*/
85
86/*
87 * PB-A8 on-board gic irq sources
88 */
89#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
90#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
91#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
92#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
93#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
94#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
95#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
96#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
97#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
98 /* 9 reserved */
99#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
100#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
101#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
102#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
103#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
104#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
105#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
106#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
107#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
108#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
109#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
110#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
111#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
112#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
113#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
114#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
115#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
116#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
117#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
118#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
119#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
120#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
121
122/* ... */
123#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
124#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
125#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
126#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
127
128#define IRQ_PBA8_SMC -1
129#define IRQ_PBA8_SCTL -1
130
131#define NR_GIC_PBA8 1
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PBA8
135 */
136#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
137
138#if defined(CONFIG_MACH_REALVIEW_PBA8)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PBA8
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PBA8
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PBA8 */
151
152#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 7196bcadff0c..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -8,15 +8,36 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 */
12*/ 12
13#if defined(CONFIG_MACH_REALVIEW_EB) || \
14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \
15 defined(CONFIG_MACH_REALVIEW_PBA8)
16#ifndef DEBUG_LL_UART_OFFSET
17#define DEBUG_LL_UART_OFFSET 0x00009000
18#elif DEBUG_LL_UART_OFFSET != 0x00009000
19#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
20#endif
21#endif
22
23#ifdef CONFIG_MACH_REALVIEW_PB1176
24#ifndef DEBUG_LL_UART_OFFSET
25#define DEBUG_LL_UART_OFFSET 0x0010c000
26#elif DEBUG_LL_UART_OFFSET != 0x0010c000
27#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
28#endif
29#endif
30
31#ifndef DEBUG_LL_UART_OFFSET
32#error "Unknown RealView platform"
33#endif
13 34
14 .macro addruart,rx 35 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 36 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 37 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0x10000000 38 moveq \rx, #0x10000000
18 movne \rx, #0xf0000000 @ virtual base 39 movne \rx, #0xfb000000 @ virtual base
19 orr \rx, \rx, #0x00009000 40 orr \rx, \rx, #DEBUG_LL_UART_OFFSET
20 .endm 41 .endm
21 42
22#include <asm/hardware/debug-pl01x.S> 43#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 79a93b3dfca9..b42c14f89acb 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -25,7 +25,14 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27/* macro to get at IO space when running virtually */ 27/* macro to get at IO space when running virtually */
28#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000) 28/*
29 * Statically mapped addresses:
30 *
31 * 10xx xxxx -> fbxx xxxx
32 * 1exx xxxx -> fdxx xxxx
33 * 1fxx xxxx -> fexx xxxx
34 */
35#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000)
29#define __io_address(n) __io(IO_ADDRESS(n)) 36#define __io_address(n) __io(IO_ADDRESS(n))
30 37
31#endif 38#endif
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
25#include <mach/board-eb.h> 25#include <mach/board-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/board-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/board-pb1176.h>
28#include <mach/board-pba8.h>
28 29
29#define IRQ_LOCALTIMER 29 30#define IRQ_LOCALTIMER 29
30#define IRQ_LOCALWDOG 30 31#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 65a0742094f7..293c30025e7e 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -23,6 +23,10 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
27#define PHYS_OFFSET UL(0x70000000)
28#else
26#define PHYS_OFFSET UL(0x00000000) 29#define PHYS_OFFSET UL(0x00000000)
30#endif
27 31
28#endif 32#endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
23#include <mach/board-eb.h> 23#include <mach/board-eb.h>
24#include <mach/board-pb11mp.h> 24#include <mach/board-pb11mp.h>
25#include <mach/board-pb1176.h> 25#include <mach/board-pb1176.h>
26#include <mach/board-pba8.h>
26 27
27#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 28#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
28#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 29#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
40 return REALVIEW_PB11MP_UART0_BASE; 41 return REALVIEW_PB11MP_UART0_BASE;
41 else if (machine_is_realview_pb1176()) 42 else if (machine_is_realview_pb1176())
42 return REALVIEW_PB1176_UART0_BASE; 43 return REALVIEW_PB1176_UART0_BASE;
44 else if (machine_is_realview_pba8())
45 return REALVIEW_PBA8_UART0_BASE;
43 else 46 else
44 return 0; 47 return 0;
45} 48}
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
index 48cbcc873db2..fe0de1b507ac 100644
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ b/arch/arm/mach-realview/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000) 21#define VMALLOC_END 0xf8000000