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-rw-r--r--arch/arm/mach-realview/core.c106
1 files changed, 0 insertions, 106 deletions
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 45868bb43cbd..ff007d15e0ec 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -30,7 +30,6 @@
30#include <linux/ata_platform.h> 30#include <linux/ata_platform.h>
31#include <linux/amba/mmci.h> 31#include <linux/amba/mmci.h>
32#include <linux/gfp.h> 32#include <linux/gfp.h>
33#include <linux/clkdev.h>
34#include <linux/mtd/physmap.h> 33#include <linux/mtd/physmap.h>
35 34
36#include <mach/hardware.h> 35#include <mach/hardware.h>
@@ -226,115 +225,10 @@ struct mmci_platform_data realview_mmc1_plat_data = {
226 .cd_invert = true, 225 .cd_invert = true,
227}; 226};
228 227
229/*
230 * Clock handling
231 */
232static const struct icst_params realview_oscvco_params = {
233 .ref = 24000000,
234 .vco_max = ICST307_VCO_MAX,
235 .vco_min = ICST307_VCO_MIN,
236 .vd_min = 4 + 8,
237 .vd_max = 511 + 8,
238 .rd_min = 1 + 2,
239 .rd_max = 127 + 2,
240 .s2div = icst307_s2div,
241 .idx2s = icst307_idx2s,
242};
243
244static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
245{
246 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
247 u32 val;
248
249 val = readl(clk->vcoreg) & ~0x7ffff;
250 val |= vco.v | (vco.r << 9) | (vco.s << 16);
251
252 writel(0xa05f, sys_lock);
253 writel(val, clk->vcoreg);
254 writel(0, sys_lock);
255}
256
257static const struct clk_ops oscvco_clk_ops = {
258 .round = icst_clk_round,
259 .set = icst_clk_set,
260 .setvco = realview_oscvco_set,
261};
262
263static struct clk oscvco_clk = {
264 .ops = &oscvco_clk_ops,
265 .params = &realview_oscvco_params,
266};
267
268/*
269 * These are fixed clocks.
270 */
271static struct clk ref24_clk = {
272 .rate = 24000000,
273};
274
275static struct clk sp804_clk = {
276 .rate = 1000000,
277};
278
279static struct clk dummy_apb_pclk;
280
281static struct clk_lookup lookups[] = {
282 { /* Bus clock */
283 .con_id = "apb_pclk",
284 .clk = &dummy_apb_pclk,
285 }, { /* UART0 */
286 .dev_id = "dev:uart0",
287 .clk = &ref24_clk,
288 }, { /* UART1 */
289 .dev_id = "dev:uart1",
290 .clk = &ref24_clk,
291 }, { /* UART2 */
292 .dev_id = "dev:uart2",
293 .clk = &ref24_clk,
294 }, { /* UART3 */
295 .dev_id = "fpga:uart3",
296 .clk = &ref24_clk,
297 }, { /* UART3 is on the dev chip in PB1176 */
298 .dev_id = "dev:uart3",
299 .clk = &ref24_clk,
300 }, { /* UART4 only exists in PB1176 */
301 .dev_id = "fpga:uart4",
302 .clk = &ref24_clk,
303 }, { /* KMI0 */
304 .dev_id = "fpga:kmi0",
305 .clk = &ref24_clk,
306 }, { /* KMI1 */
307 .dev_id = "fpga:kmi1",
308 .clk = &ref24_clk,
309 }, { /* MMC0 */
310 .dev_id = "fpga:mmc0",
311 .clk = &ref24_clk,
312 }, { /* CLCD is in the PB1176 and EB DevChip */
313 .dev_id = "dev:clcd",
314 .clk = &oscvco_clk,
315 }, { /* PB:CLCD */
316 .dev_id = "issp:clcd",
317 .clk = &oscvco_clk,
318 }, { /* SSP */
319 .dev_id = "dev:ssp0",
320 .clk = &ref24_clk,
321 }, { /* SP804 timers */
322 .dev_id = "sp804",
323 .clk = &sp804_clk,
324 },
325};
326
327void __init realview_init_early(void) 228void __init realview_init_early(void)
328{ 229{
329 void __iomem *sys = __io_address(REALVIEW_SYS_BASE); 230 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
330 231
331 if (machine_is_realview_pb1176())
332 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET;
333 else
334 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET;
335
336 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
337
338 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); 232 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
339} 233}
340 234