diff options
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/clkdev.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/corgi.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/irqs.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/magician.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/memory.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pm.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa25x.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa27x-udc.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa27x.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa300.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa320.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa3xx.h | 14 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa930.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-intc.h | 30 |
15 files changed, 50 insertions, 56 deletions
diff --git a/arch/arm/mach-pxa/include/mach/clkdev.h b/arch/arm/mach-pxa/include/mach/clkdev.h deleted file mode 100644 index 04b37a89801c..000000000000 --- a/arch/arm/mach-pxa/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_CLKDEV_H | ||
2 | #define __ASM_MACH_CLKDEV_H | ||
3 | |||
4 | #define __clk_get(clk) ({ 1; }) | ||
5 | #define __clk_put(clk) do { } while (0) | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index 0011055bc3f9..5dfd1195a5a7 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ | 34 | #define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ |
35 | #define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ | 35 | #define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ |
36 | #define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ | 36 | #define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ |
37 | #define CORGI_GPIO_IR_ON (22) /* Enable IR Transciever */ | 37 | #define CORGI_GPIO_IR_ON (22) /* Enable IR Transceiver */ |
38 | #define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ | 38 | #define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ |
39 | #define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ | 39 | #define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ |
40 | #define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ | 40 | #define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 6957ba56025b..de63ca3016b4 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -337,9 +337,6 @@ extern unsigned long get_clock_tick_rate(void); | |||
337 | #endif | 337 | #endif |
338 | 338 | ||
339 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | 339 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) |
340 | #define PCIBIOS_MIN_IO 0 | ||
341 | #define PCIBIOS_MIN_MEM 0 | ||
342 | #define pcibios_assign_all_busses() 1 | ||
343 | #define ARCH_HAS_DMA_SET_COHERENT_MASK | 340 | #define ARCH_HAS_DMA_SET_COHERENT_MASK |
344 | #endif | 341 | #endif |
345 | 342 | ||
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 038402404e39..7cc5a781e99e 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -104,4 +104,16 @@ | |||
104 | 104 | ||
105 | #define NR_IRQS (IRQ_BOARD_START) | 105 | #define NR_IRQS (IRQ_BOARD_START) |
106 | 106 | ||
107 | #ifndef __ASSEMBLY__ | ||
108 | struct irq_data; | ||
109 | struct pt_regs; | ||
110 | |||
111 | void pxa_mask_irq(struct irq_data *); | ||
112 | void pxa_unmask_irq(struct irq_data *); | ||
113 | void icip_handle_irq(struct pt_regs *); | ||
114 | void ichp_handle_irq(struct pt_regs *); | ||
115 | |||
116 | void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int)); | ||
117 | #endif | ||
118 | |||
107 | #endif /* __ASM_MACH_IRQS_H */ | 119 | #endif /* __ASM_MACH_IRQS_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h index 0a2efcf7947c..7cbfc5d3f9df 100644 --- a/arch/arm/mach-pxa/include/mach/magician.h +++ b/arch/arm/mach-pxa/include/mach/magician.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #ifndef _MAGICIAN_H_ | 12 | #ifndef _MAGICIAN_H_ |
13 | #define _MAGICIAN_H_ | 13 | #define _MAGICIAN_H_ |
14 | 14 | ||
15 | #include <linux/gpio.h> | ||
15 | #include <mach/irqs.h> | 16 | #include <mach/irqs.h> |
16 | 17 | ||
17 | /* | 18 | /* |
@@ -77,7 +78,7 @@ | |||
77 | * CPLD EGPIOs | 78 | * CPLD EGPIOs |
78 | */ | 79 | */ |
79 | 80 | ||
80 | #define MAGICIAN_EGPIO_BASE 0x80 /* GPIO_BOARD_START */ | 81 | #define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO |
81 | #define MAGICIAN_EGPIO(reg,bit) \ | 82 | #define MAGICIAN_EGPIO(reg,bit) \ |
82 | (MAGICIAN_EGPIO_BASE + 8*reg + bit) | 83 | (MAGICIAN_EGPIO_BASE + 8*reg + bit) |
83 | 84 | ||
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h index 07734f37f8fd..d05a59727d66 100644 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ b/arch/arm/mach-pxa/include/mach/memory.h | |||
@@ -17,8 +17,4 @@ | |||
17 | */ | 17 | */ |
18 | #define PLAT_PHYS_OFFSET UL(0xa0000000) | 18 | #define PLAT_PHYS_OFFSET UL(0xa0000000) |
19 | 19 | ||
20 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | ||
21 | #define ARM_DMA_ZONE_SIZE SZ_64M | ||
22 | #endif | ||
23 | |||
24 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h index f15afe012995..51558bcee999 100644 --- a/arch/arm/mach-pxa/include/mach/pm.h +++ b/arch/arm/mach-pxa/include/mach/pm.h | |||
@@ -22,8 +22,8 @@ struct pxa_cpu_pm_fns { | |||
22 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; | 22 | extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; |
23 | 23 | ||
24 | /* sleep.S */ | 24 | /* sleep.S */ |
25 | extern void pxa25x_cpu_suspend(unsigned int, long); | 25 | extern int pxa25x_finish_suspend(unsigned long); |
26 | extern void pxa27x_cpu_suspend(unsigned int, long); | 26 | extern int pxa27x_finish_suspend(unsigned long); |
27 | 27 | ||
28 | extern int pxa_pm_enter(suspend_state_t state); | 28 | extern int pxa_pm_enter(suspend_state_t state); |
29 | extern int pxa_pm_prepare(void); | 29 | extern int pxa_pm_prepare(void); |
diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 508c3ba1f4d0..3ac0baac7350 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h | |||
@@ -4,5 +4,14 @@ | |||
4 | #include <mach/hardware.h> | 4 | #include <mach/hardware.h> |
5 | #include <mach/pxa2xx-regs.h> | 5 | #include <mach/pxa2xx-regs.h> |
6 | #include <mach/mfp-pxa25x.h> | 6 | #include <mach/mfp-pxa25x.h> |
7 | #include <mach/irqs.h> | ||
8 | |||
9 | extern void __init pxa25x_map_io(void); | ||
10 | extern void __init pxa25x_init_irq(void); | ||
11 | #ifdef CONFIG_CPU_PXA26x | ||
12 | extern void __init pxa26x_init_irq(void); | ||
13 | #endif | ||
14 | |||
15 | #define pxa25x_handle_irq icip_handle_irq | ||
7 | 16 | ||
8 | #endif /* __MACH_PXA25x_H */ | 17 | #endif /* __MACH_PXA25x_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x-udc.h b/arch/arm/mach-pxa/include/mach/pxa27x-udc.h index ab1443f8bd89..4cf28f670706 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x-udc.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x-udc.h | |||
@@ -56,9 +56,9 @@ | |||
56 | #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ | 56 | #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ |
57 | #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ | 57 | #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ |
58 | #define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ | 58 | #define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ |
59 | #define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt | 59 | #define UDCOTGICR_IEXR (1 << 17) /* Extra Transceiver Interrupt |
60 | Rising Edge Interrupt Enable */ | 60 | Rising Edge Interrupt Enable */ |
61 | #define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt | 61 | #define UDCOTGICR_IEXF (1 << 16) /* Extra Transceiver Interrupt |
62 | Falling Edge Interrupt Enable */ | 62 | Falling Edge Interrupt Enable */ |
63 | #define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge | 63 | #define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge |
64 | Interrupt Enable */ | 64 | Interrupt Enable */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 0b702693f458..b9b1bdc4bacc 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <mach/hardware.h> | 4 | #include <mach/hardware.h> |
5 | #include <mach/pxa2xx-regs.h> | 5 | #include <mach/pxa2xx-regs.h> |
6 | #include <mach/mfp-pxa27x.h> | 6 | #include <mach/mfp-pxa27x.h> |
7 | #include <mach/irqs.h> | ||
7 | 8 | ||
8 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ | 9 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ |
9 | 10 | ||
@@ -17,6 +18,10 @@ | |||
17 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ | 18 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ |
18 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ | 19 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ |
19 | 20 | ||
21 | extern void __init pxa27x_map_io(void); | ||
22 | extern void __init pxa27x_init_irq(void); | ||
20 | extern int __init pxa27x_set_pwrmode(unsigned int mode); | 23 | extern int __init pxa27x_set_pwrmode(unsigned int mode); |
21 | 24 | ||
25 | #define pxa27x_handle_irq ichp_handle_irq | ||
26 | |||
22 | #endif /* __MACH_PXA27x_H */ | 27 | #endif /* __MACH_PXA27x_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa300.h b/arch/arm/mach-pxa/include/mach/pxa300.h index 2f33076c9e48..733b6412c3df 100644 --- a/arch/arm/mach-pxa/include/mach/pxa300.h +++ b/arch/arm/mach-pxa/include/mach/pxa300.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA300_H | 1 | #ifndef __MACH_PXA300_H |
2 | #define __MACH_PXA300_H | 2 | #define __MACH_PXA300_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa300.h> | 5 | #include <mach/mfp-pxa300.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA300_H */ | 7 | #endif /* __MACH_PXA300_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa320.h b/arch/arm/mach-pxa/include/mach/pxa320.h index cab78e903273..b6204e470d89 100644 --- a/arch/arm/mach-pxa/include/mach/pxa320.h +++ b/arch/arm/mach-pxa/include/mach/pxa320.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA320_H | 1 | #ifndef __MACH_PXA320_H |
2 | #define __MACH_PXA320_H | 2 | #define __MACH_PXA320_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa320.h> | 5 | #include <mach/mfp-pxa320.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA320_H */ | 7 | #endif /* __MACH_PXA320_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h new file mode 100644 index 000000000000..cd3e57f42688 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h | |||
@@ -0,0 +1,14 @@ | |||
1 | #ifndef __MACH_PXA3XX_H | ||
2 | #define __MACH_PXA3XX_H | ||
3 | |||
4 | #include <mach/hardware.h> | ||
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/irqs.h> | ||
7 | |||
8 | extern void __init pxa3xx_map_io(void); | ||
9 | extern void __init pxa3xx_init_irq(void); | ||
10 | extern void __init pxa95x_init_irq(void); | ||
11 | |||
12 | #define pxa3xx_handle_irq ichp_handle_irq | ||
13 | |||
14 | #endif /* __MACH_PXA3XX_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa930.h b/arch/arm/mach-pxa/include/mach/pxa930.h index d45f76a9b54d..190363b98d01 100644 --- a/arch/arm/mach-pxa/include/mach/pxa930.h +++ b/arch/arm/mach-pxa/include/mach/pxa930.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA930_H | 1 | #ifndef __MACH_PXA930_H |
2 | #define __MACH_PXA930_H | 2 | #define __MACH_PXA930_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa930.h> | 5 | #include <mach/mfp-pxa930.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA930_H */ | 7 | #endif /* __MACH_PXA930_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h deleted file mode 100644 index 662288eb6f95..000000000000 --- a/arch/arm/mach-pxa/include/mach/regs-intc.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_REGS_INTC_H | ||
2 | #define __ASM_MACH_REGS_INTC_H | ||
3 | |||
4 | #include <mach/hardware.h> | ||
5 | |||
6 | /* | ||
7 | * Interrupt Controller | ||
8 | */ | ||
9 | |||
10 | #define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ | ||
11 | #define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ | ||
12 | #define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ | ||
13 | #define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ | ||
14 | #define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ | ||
15 | #define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ | ||
16 | #define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ | ||
17 | |||
18 | #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ | ||
19 | #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ | ||
20 | #define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ | ||
21 | #define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ | ||
22 | #define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ | ||
23 | |||
24 | #define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */ | ||
25 | #define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */ | ||
26 | #define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */ | ||
27 | #define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ | ||
28 | #define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ | ||
29 | |||
30 | #endif /* __ASM_MACH_REGS_INTC_H */ | ||