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-rw-r--r--arch/arm/mach-pnx4008/serial.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c
new file mode 100644
index 000000000000..2e1e04cc048c
--- /dev/null
+++ b/arch/arm/mach-pnx4008/serial.c
@@ -0,0 +1,69 @@
1/*
2 * linux/arch/arm/mach-pnx4008/serial.c
3 *
4 * PNX4008 UART initialization
5 *
6 * Copyright: MontaVista Software Inc. (c) 2005
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15
16#include <asm/io.h>
17
18#include <asm/arch/platform.h>
19#include <asm/arch/hardware.h>
20
21#include <linux/serial_core.h>
22#include <linux/serial_reg.h>
23#include <asm/arch/pm.h>
24
25#include <asm/arch/clock.h>
26
27#define UART_3 0
28#define UART_4 1
29#define UART_5 2
30#define UART_6 3
31#define UART_UNKNOWN (-1)
32
33#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
34#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
35#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
36#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
37
38#define UART_FCR_OFFSET 8
39#define UART_FIFO_SIZE 64
40
41void pnx4008_uart_init(void)
42{
43 u32 tmp;
44 int i = UART_FIFO_SIZE;
45
46 __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
47 __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
48
49 /* Send a NULL to fix the UART HW bug */
50 __raw_writel(0x00, UART5_BASE_VA);
51 __raw_writel(0x00, UART3_BASE_VA);
52
53 while (i--) {
54 tmp = __raw_readl(UART5_BASE_VA);
55 tmp = __raw_readl(UART3_BASE_VA);
56 }
57 __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
58 __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
59
60 /* setup wakeup interrupt */
61 start_int_set_rising_edge(SE_U3_RX_INT);
62 start_int_ack(SE_U3_RX_INT);
63 start_int_umask(SE_U3_RX_INT);
64
65 start_int_set_rising_edge(SE_U5_RX_INT);
66 start_int_ack(SE_U5_RX_INT);
67 start_int_umask(SE_U5_RX_INT);
68}
69