diff options
Diffstat (limited to 'arch/arm/mach-orion5x/pci.c')
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index d9c7c3bf0d9c..503368023bb1 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -157,8 +157,11 @@ static int __init pcie_setup(struct pci_sys_data *sys) | |||
157 | if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) { | 157 | if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) { |
158 | printk(KERN_NOTICE "Applying Orion-1/Orion-NAS PCIe config " | 158 | printk(KERN_NOTICE "Applying Orion-1/Orion-NAS PCIe config " |
159 | "read transaction workaround\n"); | 159 | "read transaction workaround\n"); |
160 | orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, | 160 | mvebu_mbus_add_window_remap_flags("pcie0.0", |
161 | ORION5X_PCIE_WA_SIZE); | 161 | ORION5X_PCIE_WA_PHYS_BASE, |
162 | ORION5X_PCIE_WA_SIZE, | ||
163 | MVEBU_MBUS_NO_REMAP, | ||
164 | MVEBU_MBUS_PCI_WA); | ||
162 | pcie_ops.read = pcie_rd_conf_wa; | 165 | pcie_ops.read = pcie_rd_conf_wa; |
163 | } | 166 | } |
164 | 167 | ||
@@ -402,8 +405,9 @@ static void __init orion5x_pci_master_slave_enable(void) | |||
402 | orion5x_pci_hw_wr_conf(bus_nr, 0, func, reg, 4, val | 0x7); | 405 | orion5x_pci_hw_wr_conf(bus_nr, 0, func, reg, 4, val | 0x7); |
403 | } | 406 | } |
404 | 407 | ||
405 | static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram) | 408 | static void __init orion5x_setup_pci_wins(void) |
406 | { | 409 | { |
410 | const struct mbus_dram_target_info *dram = mv_mbus_dram_info(); | ||
407 | u32 win_enable; | 411 | u32 win_enable; |
408 | int bus; | 412 | int bus; |
409 | int i; | 413 | int i; |
@@ -420,7 +424,7 @@ static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram) | |||
420 | bus = orion5x_pci_local_bus_nr(); | 424 | bus = orion5x_pci_local_bus_nr(); |
421 | 425 | ||
422 | for (i = 0; i < dram->num_cs; i++) { | 426 | for (i = 0; i < dram->num_cs; i++) { |
423 | struct mbus_dram_window *cs = dram->cs + i; | 427 | const struct mbus_dram_window *cs = dram->cs + i; |
424 | u32 func = PCI_CONF_FUNC_BAR_CS(cs->cs_index); | 428 | u32 func = PCI_CONF_FUNC_BAR_CS(cs->cs_index); |
425 | u32 reg; | 429 | u32 reg; |
426 | u32 val; | 430 | u32 val; |
@@ -467,7 +471,7 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
467 | /* | 471 | /* |
468 | * Point PCI unit MBUS decode windows to DRAM space. | 472 | * Point PCI unit MBUS decode windows to DRAM space. |
469 | */ | 473 | */ |
470 | orion5x_setup_pci_wins(&orion_mbus_dram_info); | 474 | orion5x_setup_pci_wins(); |
471 | 475 | ||
472 | /* | 476 | /* |
473 | * Master + Slave enable | 477 | * Master + Slave enable |