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-rw-r--r--arch/arm/mach-orion5x/include/mach/bridge-regs.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 11a3c1e9801f..461fd69a10ae 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -13,27 +13,27 @@
13 13
14#include <mach/orion5x.h> 14#include <mach/orion5x.h>
15 15
16#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE | 0x100) 16#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100)
17 17
18#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) 18#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104)
19 19
20#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) 20#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108)
21#define WDT_RESET_OUT_EN 0x0002 21#define WDT_RESET_OUT_EN 0x0002
22 22
23#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) 23#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
24 24
25#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110) 25#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110)
26 26
27#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C) 27#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
28 28
29#define WDT_INT_REQ 0x0008 29#define WDT_INT_REQ 0x0008
30 30
31#define BRIDGE_INT_TIMER1_CLR (~0x0004) 31#define BRIDGE_INT_TIMER1_CLR (~0x0004)
32 32
33#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200) 33#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200)
34 34
35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) 35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204)
36 36
37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) 37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300)
38#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300) 38#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300)
39#endif 39#endif