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-rw-r--r--arch/arm/mach-orion5x/common.c115
1 files changed, 112 insertions, 3 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 168eeacaa4c0..7b11e552bc5a 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -26,9 +26,10 @@
26#include <asm/mach/time.h> 26#include <asm/mach/time.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/orion5x.h> 28#include <mach/orion5x.h>
29#include <asm/plat-orion/ehci-orion.h> 29#include <plat/ehci-orion.h>
30#include <asm/plat-orion/orion_nand.h> 30#include <plat/mv_xor.h>
31#include <asm/plat-orion/time.h> 31#include <plat/orion_nand.h>
32#include <plat/time.h>
32#include "common.h" 33#include "common.h"
33 34
34/***************************************************************************** 35/*****************************************************************************
@@ -355,6 +356,103 @@ void __init orion5x_uart1_init(void)
355 356
356 357
357/***************************************************************************** 358/*****************************************************************************
359 * XOR engine
360 ****************************************************************************/
361static struct resource orion5x_xor_shared_resources[] = {
362 {
363 .name = "xor low",
364 .start = ORION5X_XOR_PHYS_BASE,
365 .end = ORION5X_XOR_PHYS_BASE + 0xff,
366 .flags = IORESOURCE_MEM,
367 }, {
368 .name = "xor high",
369 .start = ORION5X_XOR_PHYS_BASE + 0x200,
370 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device orion5x_xor_shared = {
376 .name = MV_XOR_SHARED_NAME,
377 .id = 0,
378 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
379 .resource = orion5x_xor_shared_resources,
380};
381
382static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
383
384static struct resource orion5x_xor0_resources[] = {
385 [0] = {
386 .start = IRQ_ORION5X_XOR0,
387 .end = IRQ_ORION5X_XOR0,
388 .flags = IORESOURCE_IRQ,
389 },
390};
391
392static struct mv_xor_platform_data orion5x_xor0_data = {
393 .shared = &orion5x_xor_shared,
394 .hw_id = 0,
395 .pool_size = PAGE_SIZE,
396};
397
398static struct platform_device orion5x_xor0_channel = {
399 .name = MV_XOR_NAME,
400 .id = 0,
401 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
402 .resource = orion5x_xor0_resources,
403 .dev = {
404 .dma_mask = &orion5x_xor_dmamask,
405 .coherent_dma_mask = DMA_64BIT_MASK,
406 .platform_data = (void *)&orion5x_xor0_data,
407 },
408};
409
410static struct resource orion5x_xor1_resources[] = {
411 [0] = {
412 .start = IRQ_ORION5X_XOR1,
413 .end = IRQ_ORION5X_XOR1,
414 .flags = IORESOURCE_IRQ,
415 },
416};
417
418static struct mv_xor_platform_data orion5x_xor1_data = {
419 .shared = &orion5x_xor_shared,
420 .hw_id = 1,
421 .pool_size = PAGE_SIZE,
422};
423
424static struct platform_device orion5x_xor1_channel = {
425 .name = MV_XOR_NAME,
426 .id = 1,
427 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
428 .resource = orion5x_xor1_resources,
429 .dev = {
430 .dma_mask = &orion5x_xor_dmamask,
431 .coherent_dma_mask = DMA_64BIT_MASK,
432 .platform_data = (void *)&orion5x_xor1_data,
433 },
434};
435
436void __init orion5x_xor_init(void)
437{
438 platform_device_register(&orion5x_xor_shared);
439
440 /*
441 * two engines can't do memset simultaneously, this limitation
442 * satisfied by removing memset support from one of the engines.
443 */
444 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
445 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
446 platform_device_register(&orion5x_xor0_channel);
447
448 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
449 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
450 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
451 platform_device_register(&orion5x_xor1_channel);
452}
453
454
455/*****************************************************************************
358 * Time handling 456 * Time handling
359 ****************************************************************************/ 457 ****************************************************************************/
360static void orion5x_timer_init(void) 458static void orion5x_timer_init(void)
@@ -382,6 +480,8 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
382 *dev_name = "MV88F5281-D2"; 480 *dev_name = "MV88F5281-D2";
383 } else if (*rev == MV88F5281_REV_D1) { 481 } else if (*rev == MV88F5281_REV_D1) {
384 *dev_name = "MV88F5281-D1"; 482 *dev_name = "MV88F5281-D1";
483 } else if (*rev == MV88F5281_REV_D0) {
484 *dev_name = "MV88F5281-D0";
385 } else { 485 } else {
386 *dev_name = "MV88F5281-Rev-Unsupported"; 486 *dev_name = "MV88F5281-Rev-Unsupported";
387 } 487 }
@@ -416,6 +516,15 @@ void __init orion5x_init(void)
416 * Setup Orion address map 516 * Setup Orion address map
417 */ 517 */
418 orion5x_setup_cpu_mbus_bridge(); 518 orion5x_setup_cpu_mbus_bridge();
519
520 /*
521 * Don't issue "Wait for Interrupt" instruction if we are
522 * running on D0 5281 silicon.
523 */
524 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
525 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
526 disable_hlt();
527 }
419} 528}
420 529
421/* 530/*