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-rw-r--r--arch/arm/mach-orion5x/common.c488
1 files changed, 41 insertions, 447 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8dc2c76d2260..0ab531d047fc 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -13,12 +13,11 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/dma-mapping.h>
16#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
17#include <linux/mbus.h> 18#include <linux/mbus.h>
18#include <linux/mv643xx_eth.h>
19#include <linux/mv643xx_i2c.h> 19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/spi/orion_spi.h>
22#include <net/dsa.h> 21#include <net/dsa.h>
23#include <asm/page.h> 22#include <asm/page.h>
24#include <asm/setup.h> 23#include <asm/setup.h>
@@ -26,13 +25,12 @@
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <mach/bridge-regs.h>
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/orion5x.h> 30#include <mach/orion5x.h>
31#include <plat/ehci-orion.h>
32#include <plat/mv_xor.h>
33#include <plat/orion_nand.h> 31#include <plat/orion_nand.h>
34#include <plat/orion_wdt.h>
35#include <plat/time.h> 32#include <plat/time.h>
33#include <plat/common.h>
36#include "common.h" 34#include "common.h"
37 35
38/***************************************************************************** 36/*****************************************************************************
@@ -69,536 +67,135 @@ void __init orion5x_map_io(void)
69 67
70 68
71/***************************************************************************** 69/*****************************************************************************
72 * EHCI
73 ****************************************************************************/
74static struct orion_ehci_data orion5x_ehci_data = {
75 .dram = &orion5x_mbus_dram_info,
76 .phy_version = EHCI_PHY_ORION,
77};
78
79static u64 ehci_dmamask = 0xffffffffUL;
80
81
82/*****************************************************************************
83 * EHCI0 70 * EHCI0
84 ****************************************************************************/ 71 ****************************************************************************/
85static struct resource orion5x_ehci0_resources[] = {
86 {
87 .start = ORION5X_USB0_PHYS_BASE,
88 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
89 .flags = IORESOURCE_MEM,
90 }, {
91 .start = IRQ_ORION5X_USB0_CTRL,
92 .end = IRQ_ORION5X_USB0_CTRL,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct platform_device orion5x_ehci0 = {
98 .name = "orion-ehci",
99 .id = 0,
100 .dev = {
101 .dma_mask = &ehci_dmamask,
102 .coherent_dma_mask = 0xffffffff,
103 .platform_data = &orion5x_ehci_data,
104 },
105 .resource = orion5x_ehci0_resources,
106 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
107};
108
109void __init orion5x_ehci0_init(void) 72void __init orion5x_ehci0_init(void)
110{ 73{
111 platform_device_register(&orion5x_ehci0); 74 orion_ehci_init(&orion5x_mbus_dram_info,
75 ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
112} 76}
113 77
114 78
115/***************************************************************************** 79/*****************************************************************************
116 * EHCI1 80 * EHCI1
117 ****************************************************************************/ 81 ****************************************************************************/
118static struct resource orion5x_ehci1_resources[] = {
119 {
120 .start = ORION5X_USB1_PHYS_BASE,
121 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
122 .flags = IORESOURCE_MEM,
123 }, {
124 .start = IRQ_ORION5X_USB1_CTRL,
125 .end = IRQ_ORION5X_USB1_CTRL,
126 .flags = IORESOURCE_IRQ,
127 },
128};
129
130static struct platform_device orion5x_ehci1 = {
131 .name = "orion-ehci",
132 .id = 1,
133 .dev = {
134 .dma_mask = &ehci_dmamask,
135 .coherent_dma_mask = 0xffffffff,
136 .platform_data = &orion5x_ehci_data,
137 },
138 .resource = orion5x_ehci1_resources,
139 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
140};
141
142void __init orion5x_ehci1_init(void) 82void __init orion5x_ehci1_init(void)
143{ 83{
144 platform_device_register(&orion5x_ehci1); 84 orion_ehci_1_init(&orion5x_mbus_dram_info,
85 ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
145} 86}
146 87
147 88
148/***************************************************************************** 89/*****************************************************************************
149 * GigE 90 * GE00
150 ****************************************************************************/ 91 ****************************************************************************/
151struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
152 .dram = &orion5x_mbus_dram_info,
153};
154
155static struct resource orion5x_eth_shared_resources[] = {
156 {
157 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
158 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
159 .flags = IORESOURCE_MEM,
160 }, {
161 .start = IRQ_ORION5X_ETH_ERR,
162 .end = IRQ_ORION5X_ETH_ERR,
163 .flags = IORESOURCE_IRQ,
164 },
165};
166
167static struct platform_device orion5x_eth_shared = {
168 .name = MV643XX_ETH_SHARED_NAME,
169 .id = 0,
170 .dev = {
171 .platform_data = &orion5x_eth_shared_data,
172 },
173 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
174 .resource = orion5x_eth_shared_resources,
175};
176
177static struct resource orion5x_eth_resources[] = {
178 {
179 .name = "eth irq",
180 .start = IRQ_ORION5X_ETH_SUM,
181 .end = IRQ_ORION5X_ETH_SUM,
182 .flags = IORESOURCE_IRQ,
183 },
184};
185
186static struct platform_device orion5x_eth = {
187 .name = MV643XX_ETH_NAME,
188 .id = 0,
189 .num_resources = 1,
190 .resource = orion5x_eth_resources,
191 .dev = {
192 .coherent_dma_mask = 0xffffffff,
193 },
194};
195
196void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) 92void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
197{ 93{
198 eth_data->shared = &orion5x_eth_shared; 94 orion_ge00_init(eth_data, &orion5x_mbus_dram_info,
199 orion5x_eth.dev.platform_data = eth_data; 95 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
200 96 IRQ_ORION5X_ETH_ERR, orion5x_tclk);
201 platform_device_register(&orion5x_eth_shared);
202 platform_device_register(&orion5x_eth);
203} 97}
204 98
205 99
206/***************************************************************************** 100/*****************************************************************************
207 * Ethernet switch 101 * Ethernet switch
208 ****************************************************************************/ 102 ****************************************************************************/
209static struct resource orion5x_switch_resources[] = {
210 {
211 .start = 0,
212 .end = 0,
213 .flags = IORESOURCE_IRQ,
214 },
215};
216
217static struct platform_device orion5x_switch_device = {
218 .name = "dsa",
219 .id = 0,
220 .num_resources = 0,
221 .resource = orion5x_switch_resources,
222};
223
224void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq) 103void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
225{ 104{
226 int i; 105 orion_ge00_switch_init(d, irq);
227
228 if (irq != NO_IRQ) {
229 orion5x_switch_resources[0].start = irq;
230 orion5x_switch_resources[0].end = irq;
231 orion5x_switch_device.num_resources = 1;
232 }
233
234 d->netdev = &orion5x_eth.dev;
235 for (i = 0; i < d->nr_chips; i++)
236 d->chip[i].mii_bus = &orion5x_eth_shared.dev;
237 orion5x_switch_device.dev.platform_data = d;
238
239 platform_device_register(&orion5x_switch_device);
240} 106}
241 107
242 108
243/***************************************************************************** 109/*****************************************************************************
244 * I2C 110 * I2C
245 ****************************************************************************/ 111 ****************************************************************************/
246static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
247 .freq_m = 8, /* assumes 166 MHz TCLK */
248 .freq_n = 3,
249 .timeout = 1000, /* Default timeout of 1 second */
250};
251
252static struct resource orion5x_i2c_resources[] = {
253 {
254 .start = I2C_PHYS_BASE,
255 .end = I2C_PHYS_BASE + 0x1f,
256 .flags = IORESOURCE_MEM,
257 }, {
258 .start = IRQ_ORION5X_I2C,
259 .end = IRQ_ORION5X_I2C,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device orion5x_i2c = {
265 .name = MV64XXX_I2C_CTLR_NAME,
266 .id = 0,
267 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
268 .resource = orion5x_i2c_resources,
269 .dev = {
270 .platform_data = &orion5x_i2c_pdata,
271 },
272};
273
274void __init orion5x_i2c_init(void) 112void __init orion5x_i2c_init(void)
275{ 113{
276 platform_device_register(&orion5x_i2c); 114 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
115
277} 116}
278 117
279 118
280/***************************************************************************** 119/*****************************************************************************
281 * SATA 120 * SATA
282 ****************************************************************************/ 121 ****************************************************************************/
283static struct resource orion5x_sata_resources[] = {
284 {
285 .name = "sata base",
286 .start = ORION5X_SATA_PHYS_BASE,
287 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
288 .flags = IORESOURCE_MEM,
289 }, {
290 .name = "sata irq",
291 .start = IRQ_ORION5X_SATA,
292 .end = IRQ_ORION5X_SATA,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static struct platform_device orion5x_sata = {
298 .name = "sata_mv",
299 .id = 0,
300 .dev = {
301 .coherent_dma_mask = 0xffffffff,
302 },
303 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
304 .resource = orion5x_sata_resources,
305};
306
307void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) 122void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
308{ 123{
309 sata_data->dram = &orion5x_mbus_dram_info; 124 orion_sata_init(sata_data, &orion5x_mbus_dram_info,
310 orion5x_sata.dev.platform_data = sata_data; 125 ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
311 platform_device_register(&orion5x_sata);
312} 126}
313 127
314 128
315/***************************************************************************** 129/*****************************************************************************
316 * SPI 130 * SPI
317 ****************************************************************************/ 131 ****************************************************************************/
318static struct orion_spi_info orion5x_spi_plat_data = {
319 .tclk = 0,
320 .enable_clock_fix = 1,
321};
322
323static struct resource orion5x_spi_resources[] = {
324 {
325 .name = "spi base",
326 .start = SPI_PHYS_BASE,
327 .end = SPI_PHYS_BASE + 0x1f,
328 .flags = IORESOURCE_MEM,
329 },
330};
331
332static struct platform_device orion5x_spi = {
333 .name = "orion_spi",
334 .id = 0,
335 .dev = {
336 .platform_data = &orion5x_spi_plat_data,
337 },
338 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
339 .resource = orion5x_spi_resources,
340};
341
342void __init orion5x_spi_init() 132void __init orion5x_spi_init()
343{ 133{
344 platform_device_register(&orion5x_spi); 134 orion_spi_init(SPI_PHYS_BASE, orion5x_tclk);
345} 135}
346 136
347 137
348/***************************************************************************** 138/*****************************************************************************
349 * UART0 139 * UART0
350 ****************************************************************************/ 140 ****************************************************************************/
351static struct plat_serial8250_port orion5x_uart0_data[] = {
352 {
353 .mapbase = UART0_PHYS_BASE,
354 .membase = (char *)UART0_VIRT_BASE,
355 .irq = IRQ_ORION5X_UART0,
356 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
357 .iotype = UPIO_MEM,
358 .regshift = 2,
359 .uartclk = 0,
360 }, {
361 },
362};
363
364static struct resource orion5x_uart0_resources[] = {
365 {
366 .start = UART0_PHYS_BASE,
367 .end = UART0_PHYS_BASE + 0xff,
368 .flags = IORESOURCE_MEM,
369 }, {
370 .start = IRQ_ORION5X_UART0,
371 .end = IRQ_ORION5X_UART0,
372 .flags = IORESOURCE_IRQ,
373 },
374};
375
376static struct platform_device orion5x_uart0 = {
377 .name = "serial8250",
378 .id = PLAT8250_DEV_PLATFORM,
379 .dev = {
380 .platform_data = orion5x_uart0_data,
381 },
382 .resource = orion5x_uart0_resources,
383 .num_resources = ARRAY_SIZE(orion5x_uart0_resources),
384};
385
386void __init orion5x_uart0_init(void) 141void __init orion5x_uart0_init(void)
387{ 142{
388 platform_device_register(&orion5x_uart0); 143 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
144 IRQ_ORION5X_UART0, orion5x_tclk);
389} 145}
390 146
391
392/***************************************************************************** 147/*****************************************************************************
393 * UART1 148 * UART1
394 ****************************************************************************/ 149 ****************************************************************************/
395static struct plat_serial8250_port orion5x_uart1_data[] = {
396 {
397 .mapbase = UART1_PHYS_BASE,
398 .membase = (char *)UART1_VIRT_BASE,
399 .irq = IRQ_ORION5X_UART1,
400 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
401 .iotype = UPIO_MEM,
402 .regshift = 2,
403 .uartclk = 0,
404 }, {
405 },
406};
407
408static struct resource orion5x_uart1_resources[] = {
409 {
410 .start = UART1_PHYS_BASE,
411 .end = UART1_PHYS_BASE + 0xff,
412 .flags = IORESOURCE_MEM,
413 }, {
414 .start = IRQ_ORION5X_UART1,
415 .end = IRQ_ORION5X_UART1,
416 .flags = IORESOURCE_IRQ,
417 },
418};
419
420static struct platform_device orion5x_uart1 = {
421 .name = "serial8250",
422 .id = PLAT8250_DEV_PLATFORM1,
423 .dev = {
424 .platform_data = orion5x_uart1_data,
425 },
426 .resource = orion5x_uart1_resources,
427 .num_resources = ARRAY_SIZE(orion5x_uart1_resources),
428};
429
430void __init orion5x_uart1_init(void) 150void __init orion5x_uart1_init(void)
431{ 151{
432 platform_device_register(&orion5x_uart1); 152 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
153 IRQ_ORION5X_UART1, orion5x_tclk);
433} 154}
434 155
435
436/***************************************************************************** 156/*****************************************************************************
437 * XOR engine 157 * XOR engine
438 ****************************************************************************/ 158 ****************************************************************************/
439struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
440 .dram = &orion5x_mbus_dram_info,
441};
442
443static struct resource orion5x_xor_shared_resources[] = {
444 {
445 .name = "xor low",
446 .start = ORION5X_XOR_PHYS_BASE,
447 .end = ORION5X_XOR_PHYS_BASE + 0xff,
448 .flags = IORESOURCE_MEM,
449 }, {
450 .name = "xor high",
451 .start = ORION5X_XOR_PHYS_BASE + 0x200,
452 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
453 .flags = IORESOURCE_MEM,
454 },
455};
456
457static struct platform_device orion5x_xor_shared = {
458 .name = MV_XOR_SHARED_NAME,
459 .id = 0,
460 .dev = {
461 .platform_data = &orion5x_xor_shared_data,
462 },
463 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
464 .resource = orion5x_xor_shared_resources,
465};
466
467static u64 orion5x_xor_dmamask = DMA_BIT_MASK(32);
468
469static struct resource orion5x_xor0_resources[] = {
470 [0] = {
471 .start = IRQ_ORION5X_XOR0,
472 .end = IRQ_ORION5X_XOR0,
473 .flags = IORESOURCE_IRQ,
474 },
475};
476
477static struct mv_xor_platform_data orion5x_xor0_data = {
478 .shared = &orion5x_xor_shared,
479 .hw_id = 0,
480 .pool_size = PAGE_SIZE,
481};
482
483static struct platform_device orion5x_xor0_channel = {
484 .name = MV_XOR_NAME,
485 .id = 0,
486 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
487 .resource = orion5x_xor0_resources,
488 .dev = {
489 .dma_mask = &orion5x_xor_dmamask,
490 .coherent_dma_mask = DMA_BIT_MASK(64),
491 .platform_data = &orion5x_xor0_data,
492 },
493};
494
495static struct resource orion5x_xor1_resources[] = {
496 [0] = {
497 .start = IRQ_ORION5X_XOR1,
498 .end = IRQ_ORION5X_XOR1,
499 .flags = IORESOURCE_IRQ,
500 },
501};
502
503static struct mv_xor_platform_data orion5x_xor1_data = {
504 .shared = &orion5x_xor_shared,
505 .hw_id = 1,
506 .pool_size = PAGE_SIZE,
507};
508
509static struct platform_device orion5x_xor1_channel = {
510 .name = MV_XOR_NAME,
511 .id = 1,
512 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
513 .resource = orion5x_xor1_resources,
514 .dev = {
515 .dma_mask = &orion5x_xor_dmamask,
516 .coherent_dma_mask = DMA_BIT_MASK(64),
517 .platform_data = &orion5x_xor1_data,
518 },
519};
520
521void __init orion5x_xor_init(void) 159void __init orion5x_xor_init(void)
522{ 160{
523 platform_device_register(&orion5x_xor_shared); 161 orion_xor0_init(&orion5x_mbus_dram_info,
524 162 ORION5X_XOR_PHYS_BASE,
525 /* 163 ORION5X_XOR_PHYS_BASE + 0x200,
526 * two engines can't do memset simultaneously, this limitation 164 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
527 * satisfied by removing memset support from one of the engines.
528 */
529 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
530 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
531 platform_device_register(&orion5x_xor0_channel);
532
533 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
534 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
535 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
536 platform_device_register(&orion5x_xor1_channel);
537} 165}
538 166
539static struct resource orion5x_crypto_res[] = { 167/*****************************************************************************
540 { 168 * Cryptographic Engines and Security Accelerator (CESA)
541 .name = "regs", 169 ****************************************************************************/
542 .start = ORION5X_CRYPTO_PHYS_BASE, 170static void __init orion5x_crypto_init(void)
543 .end = ORION5X_CRYPTO_PHYS_BASE + 0xffff,
544 .flags = IORESOURCE_MEM,
545 }, {
546 .name = "sram",
547 .start = ORION5X_SRAM_PHYS_BASE,
548 .end = ORION5X_SRAM_PHYS_BASE + SZ_8K - 1,
549 .flags = IORESOURCE_MEM,
550 }, {
551 .name = "crypto interrupt",
552 .start = IRQ_ORION5X_CESA,
553 .end = IRQ_ORION5X_CESA,
554 .flags = IORESOURCE_IRQ,
555 },
556};
557
558static struct platform_device orion5x_crypto_device = {
559 .name = "mv_crypto",
560 .id = -1,
561 .num_resources = ARRAY_SIZE(orion5x_crypto_res),
562 .resource = orion5x_crypto_res,
563};
564
565static int __init orion5x_crypto_init(void)
566{ 171{
567 int ret; 172 int ret;
568 173
569 ret = orion5x_setup_sram_win(); 174 ret = orion5x_setup_sram_win();
570 if (ret) 175 if (ret)
571 return ret; 176 return;
572 177
573 return platform_device_register(&orion5x_crypto_device); 178 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
179 SZ_8K, IRQ_ORION5X_CESA);
574} 180}
575 181
576/***************************************************************************** 182/*****************************************************************************
577 * Watchdog 183 * Watchdog
578 ****************************************************************************/ 184 ****************************************************************************/
579static struct orion_wdt_platform_data orion5x_wdt_data = {
580 .tclk = 0,
581};
582
583static struct platform_device orion5x_wdt_device = {
584 .name = "orion_wdt",
585 .id = -1,
586 .dev = {
587 .platform_data = &orion5x_wdt_data,
588 },
589 .num_resources = 0,
590};
591
592void __init orion5x_wdt_init(void) 185void __init orion5x_wdt_init(void)
593{ 186{
594 orion5x_wdt_data.tclk = orion5x_tclk; 187 orion_wdt_init(orion5x_tclk);
595 platform_device_register(&orion5x_wdt_device);
596} 188}
597 189
598 190
599/***************************************************************************** 191/*****************************************************************************
600 * Time handling 192 * Time handling
601 ****************************************************************************/ 193 ****************************************************************************/
194void __init orion5x_init_early(void)
195{
196 orion_time_set_base(TIMER_VIRT_BASE);
197}
198
602int orion5x_tclk; 199int orion5x_tclk;
603 200
604int __init orion5x_find_tclk(void) 201int __init orion5x_find_tclk(void)
@@ -616,7 +213,9 @@ int __init orion5x_find_tclk(void)
616static void orion5x_timer_init(void) 213static void orion5x_timer_init(void)
617{ 214{
618 orion5x_tclk = orion5x_find_tclk(); 215 orion5x_tclk = orion5x_find_tclk();
619 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk); 216
217 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
218 IRQ_ORION5X_BRIDGE, orion5x_tclk);
620} 219}
621 220
622struct sys_timer orion5x_timer = { 221struct sys_timer orion5x_timer = {
@@ -677,11 +276,6 @@ void __init orion5x_init(void)
677 orion5x_id(&dev, &rev, &dev_name); 276 orion5x_id(&dev, &rev, &dev_name);
678 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk); 277 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
679 278
680 orion5x_eth_shared_data.t_clk = orion5x_tclk;
681 orion5x_spi_plat_data.tclk = orion5x_tclk;
682 orion5x_uart0_data[0].uartclk = orion5x_tclk;
683 orion5x_uart1_data[0].uartclk = orion5x_tclk;
684
685 /* 279 /*
686 * Setup Orion address map 280 * Setup Orion address map
687 */ 281 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-22 14:04:50 -0500