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-rw-r--r--arch/arm/mach-omap2/prcm.c2
-rw-r--r--arch/arm/mach-omap2/prm44xx.c15
-rw-r--r--arch/arm/mach-omap2/prm44xx.h2
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c19
-rw-r--r--arch/arm/mach-omap2/prminst44xx.h8
5 files changed, 24 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 6be14389e4f3..2e40a5cf0163 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -70,7 +70,7 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
70 prcm_offs = OMAP3430_GR_MOD; 70 prcm_offs = OMAP3430_GR_MOD;
71 omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); 71 omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
72 } else if (cpu_is_omap44xx()) { 72 } else if (cpu_is_omap44xx()) {
73 omap4_prm_global_warm_sw_reset(); /* never returns */ 73 omap4_prminst_global_warm_sw_reset(); /* never returns */
74 } else { 74 } else {
75 WARN_ON(1); 75 WARN_ON(1);
76 } 76 }
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index faec860ebc0e..f81532934d1f 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg)
87{ 87{
88 return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); 88 return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
89} 89}
90
91void omap4_prm_global_warm_sw_reset(void)
92{
93 u32 v;
94
95 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
96 OMAP4_RM_RSTCTRL);
97 v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
98 omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST,
99 OMAP4_RM_RSTCTRL);
100
101 /* OCP barrier */
102 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
103 OMAP4_RM_RSTCTRL);
104}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 3732e026a22f..725a6a86985b 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -755,8 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
755extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); 755extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
756extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); 756extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
757 757
758extern void omap4_prm_global_warm_sw_reset(void);
759
760# endif 758# endif
761 759
762#endif 760#endif
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 35e02aac1de9..3a7bab16edd5 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -155,3 +155,22 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
155 155
156 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 156 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
157} 157}
158
159
160void omap4_prminst_global_warm_sw_reset(void)
161{
162 u32 v;
163
164 v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
165 OMAP4430_PRM_DEVICE_INST,
166 OMAP4_PRM_RSTCTRL_OFFSET);
167 v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
168 omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
169 OMAP4430_PRM_DEVICE_INST,
170 OMAP4_PRM_RSTCTRL_OFFSET);
171
172 /* OCP barrier */
173 v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
174 OMAP4430_PRM_DEVICE_INST,
175 OMAP4_PRM_RSTCTRL_OFFSET);
176}
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index c14ae294cd54..46f2efb36596 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -21,13 +21,13 @@ extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
21extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, 21extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
22 s16 inst, u16 idx); 22 s16 inst, u16 idx);
23 23
24extern void omap4_prm_global_warm_sw_reset(void); 24extern void omap4_prminst_global_warm_sw_reset(void);
25 25
26extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, 26extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
27 u16 rstctrl_offs); 27 u16 rstctrl_offs);
28extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, 28extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
29 u16 rstctrl_offs); 29 u16 rstctrl_offs);
30extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, 30extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
31 u16 rstctrl_offs); 31 u16 rstctrl_offs);
32 32
33#endif 33#endif