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-rw-r--r--arch/arm/mach-omap2/mcbsp.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 4c9c999dfa4a..51abcedfde83 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -52,6 +52,54 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux)
52} 52}
53EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); 53EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
54 54
55/* McBSP CLKS source switching function */
56
57int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
58{
59 struct omap_mcbsp *mcbsp;
60 struct clk *fck_src;
61 char *fck_src_name;
62 int r;
63
64 if (!omap_mcbsp_check_valid_id(id)) {
65 pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
66 return -EINVAL;
67 }
68 mcbsp = id_to_mcbsp_ptr(id);
69
70 if (fck_src_id == MCBSP_CLKS_PAD_SRC)
71 fck_src_name = "pad_fck";
72 else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
73 fck_src_name = "prcm_fck";
74 else
75 return -EINVAL;
76
77 fck_src = clk_get(mcbsp->dev, fck_src_name);
78 if (IS_ERR_OR_NULL(fck_src)) {
79 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
80 fck_src_name);
81 return -EINVAL;
82 }
83
84 clk_disable(mcbsp->fclk);
85
86 r = clk_set_parent(mcbsp->fclk, fck_src);
87 if (IS_ERR_VALUE(r)) {
88 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
89 "clks", fck_src_name);
90 clk_put(fck_src);
91 return -EINVAL;
92 }
93
94 clk_enable(mcbsp->fclk);
95
96 clk_put(fck_src);
97
98 return 0;
99}
100EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
101
102
55/* Platform data */ 103/* Platform data */
56 104
57#ifdef CONFIG_ARCH_OMAP2420 105#ifdef CONFIG_ARCH_OMAP2420
@@ -190,18 +238,21 @@ static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
190 .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX, 238 .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
191 .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX, 239 .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
192 .tx_irq = OMAP44XX_IRQ_MCBSP2, 240 .tx_irq = OMAP44XX_IRQ_MCBSP2,
241 /* XXX .ops ? */
193 }, 242 },
194 { 243 {
195 .phys_base = OMAP44XX_MCBSP3_BASE, 244 .phys_base = OMAP44XX_MCBSP3_BASE,
196 .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX, 245 .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
197 .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX, 246 .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
198 .tx_irq = OMAP44XX_IRQ_MCBSP3, 247 .tx_irq = OMAP44XX_IRQ_MCBSP3,
248 /* XXX .ops ? */
199 }, 249 },
200 { 250 {
201 .phys_base = OMAP44XX_MCBSP4_BASE, 251 .phys_base = OMAP44XX_MCBSP4_BASE,
202 .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX, 252 .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
203 .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX, 253 .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
204 .tx_irq = OMAP44XX_IRQ_MCBSP4, 254 .tx_irq = OMAP44XX_IRQ_MCBSP4,
255 /* XXX .ops ? */
205 }, 256 },
206}; 257};
207#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata) 258#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata)