15 files changed, 164 insertions, 14 deletions

diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 608079a1aba6..b61c049f92d6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -77,6 +77,24 @@ MACHINE_END
 #endif
 
 #ifdef CONFIG_ARCH_OMAP3
+/* Some boards need board name for legacy userspace in /proc/cpuinfo */
+static const char *const n900_boards_compat[] __initconst = {
+        "nokia,omap3-n900",
+        NULL,
+};
+
+DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = omap3430_init_early,
+        .init_machine   = omap_generic_init,
+        .init_late      = omap3_init_late,
+        .init_time      = omap3_sync32k_timer_init,
+        .dt_compat      = n900_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
+
+/* Generic omap3 boards, most boards can use these */
 static const char *const omap3_boards_compat[] __initconst = {
         "ti,omap3430",
         "ti,omap3",
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 377eea849e7b..64e44d6d07c0 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void);
 extern struct device *omap2_get_l3_device(void);
 extern struct device *omap4_get_dsp_device(void);
 
+unsigned int omap4_xlate_irq(unsigned int hwirq);
 void omap_gic_of_init(void);
 
 #ifdef CONFIG_CACHE_L2X0
@@ -249,6 +250,7 @@ extern void omap4_cpu_die(unsigned int cpu);
 extern struct smp_operations omap4_smp_ops;
 
 extern void omap5_secondary_startup(void);
+extern void omap5_secondary_hyp_startup(void);
 #endif
 
 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a3c013345c45..a80ac2d70bb1 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -286,6 +286,10 @@
 #define OMAP5XXX_CONTROL_STATUS                0x134
 #define OMAP5_DEVICETYPE_MASK          (0x7 << 6)
 
+/* DRA7XX CONTROL CORE BOOTSTRAP */
+#define DRA7_CTRL_CORE_BOOTSTRAP        0x6c4
+#define DRA7_SPEEDSELECT_MASK           (0x3 << 8)
+
 /*
  * REVISIT: This list of registers is not comprehensive - there are more
  * that should be added.
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 4993d4bfe9b2..6d1dffca6c7b 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -22,6 +22,7 @@
 
 /* Physical address needed since MMU not enabled yet on secondary core */
 #define AUX_CORE_BOOT0_PA                       0x48281800
+#define API_HYP_ENTRY                           0x102
 
 /*
  * OMAP5 specific entry point for secondary CPU to jump from ROM
@@ -41,6 +42,26 @@ wait:	ldr	r2, =AUX_CORE_BOOT0_PA	@ read from AuxCoreBoot0
         b       secondary_startup
 ENDPROC(omap5_secondary_startup)
 /*
+ * Same as omap5_secondary_startup except we call into the ROM to
+ * enable HYP mode first.  This is called instead of
+ * omap5_secondary_startup if the primary CPU was put into HYP mode by
+ * the boot loader.
+ */
+ENTRY(omap5_secondary_hyp_startup)
+wait_2: ldr     r2, =AUX_CORE_BOOT0_PA  @ read from AuxCoreBoot0
+        ldr     r0, [r2]
+        mov     r0, r0, lsr #5
+        mrc     p15, 0, r4, c0, c0, 5
+        and     r4, r4, #0x0f
+        cmp     r0, r4
+        bne     wait_2
+        ldr     r12, =API_HYP_ENTRY
+        adr     r0, hyp_boot
+        smc     #0
+hyp_boot:
+        b       secondary_startup
+ENDPROC(omap5_secondary_hyp_startup)
+/*
  * OMAP4 specific entry point for secondary CPU to jump from ROM
  * code.  This routine also provides a holding flag into which
  * secondary core is held until we're ready for it to initialise.
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 256e84ef0f67..5305ec7341ec 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -22,6 +22,7 @@
 #include <linux/irqchip/arm-gic.h>
 
 #include <asm/smp_scu.h>
+#include <asm/virt.h>
 
 #include "omap-secure.h"
 #include "omap-wakeupgen.h"
@@ -227,8 +228,16 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
         if (omap_secure_apis_support())
                 omap_auxcoreboot_addr(virt_to_phys(startup_addr));
         else
-                writel_relaxed(virt_to_phys(omap5_secondary_startup),
-                               base + OMAP_AUX_CORE_BOOT_1);
+                /*
+                 * If the boot CPU is in HYP mode then start secondary
+                 * CPU in HYP mode as well.
+                 */
+                if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
+                        writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup),
+                                       base + OMAP_AUX_CORE_BOOT_1);
+                else
+                        writel_relaxed(virt_to_phys(omap5_secondary_startup),
+                                       base + OMAP_AUX_CORE_BOOT_1);
 
 }
 
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index b7cb44abe49b..cc30e49a4cc2 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void)
 }
 omap_early_initcall(omap4_sar_ram_init);
 
+static struct of_device_id gic_match[] = {
+        { .compatible = "arm,cortex-a9-gic", },
+        { .compatible = "arm,cortex-a15-gic", },
+        { },
+};
+
+static struct device_node *gic_node;
+
+unsigned int omap4_xlate_irq(unsigned int hwirq)
+{
+        struct of_phandle_args irq_data;
+        unsigned int irq;
+
+        if (!gic_node)
+                gic_node = of_find_matching_node(NULL, gic_match);
+
+        if (WARN_ON(!gic_node))
+                return hwirq;
+
+        irq_data.np = gic_node;
+        irq_data.args_count = 3;
+        irq_data.args[0] = 0;
+        irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
+        irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
+
+        irq = irq_create_of_mapping(&irq_data);
+        if (WARN_ON(!irq))
+                irq = hwirq;
+
+        return irq;
+}
+
 void __init omap_gic_of_init(void)
 {
         struct device_node *np;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cbb908dc5cf0..9025ffffd2dc 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
 
         mpu_irqs_cnt = _count_mpu_irqs(oh);
         for (i = 0; i < mpu_irqs_cnt; i++) {
+                unsigned int irq;
+
+                if (oh->xlate_irq)
+                        irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
+                else
+                        irq = (oh->mpu_irqs + i)->irq;
                 (res + r)->name = (oh->mpu_irqs + i)->name;
-                (res + r)->start = (oh->mpu_irqs + i)->irq;
-                (res + r)->end = (oh->mpu_irqs + i)->irq;
+                (res + r)->start = irq;
+                (res + r)->end = irq;
                 (res + r)->flags = IORESOURCE_IRQ;
                 r++;
         }
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 35ca6efbec31..5b42fafcaf55 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -676,6 +676,7 @@ struct omap_hwmod {
         spinlock_t                      _lock;
         struct list_head                node;
         struct omap_hwmod_ocp_if        *_mpu_port;
+        unsigned int                    (*xlate_irq)(unsigned int);
         u16                             flags;
         u8                              mpu_rt_idx;
         u8                              response_lat;
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c314b3c31117..f5e68a782025 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -479,6 +479,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
         .class          = &omap44xx_dma_hwmod_class,
         .clkdm_name     = "l3_dma_clkdm",
         .mpu_irqs       = omap44xx_dma_system_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .main_clk       = "l3_div_ck",
         .prcm = {
                 .omap4 = {
@@ -640,6 +641,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .class          = &omap44xx_dispc_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
         .mpu_irqs       = omap44xx_dss_dispc_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .sdma_reqs      = omap44xx_dss_dispc_sdma_reqs,
         .main_clk       = "dss_dss_clk",
         .prcm = {
@@ -693,6 +695,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
         .class          = &omap44xx_dsi_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
         .mpu_irqs       = omap44xx_dss_dsi1_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .sdma_reqs      = omap44xx_dss_dsi1_sdma_reqs,
         .main_clk       = "dss_dss_clk",
         .prcm = {
@@ -726,6 +729,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
         .class          = &omap44xx_dsi_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
         .mpu_irqs       = omap44xx_dss_dsi2_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .sdma_reqs      = omap44xx_dss_dsi2_sdma_reqs,
         .main_clk       = "dss_dss_clk",
         .prcm = {
@@ -784,6 +788,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
          */
         .flags          = HWMOD_SWSUP_SIDLE,
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
         .main_clk       = "dss_48mhz_clk",
         .prcm = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 3e9523084b2a..7c3fac035e93 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -288,6 +288,7 @@ static struct omap_hwmod omap54xx_dma_system_hwmod = {
         .class          = &omap54xx_dma_hwmod_class,
         .clkdm_name     = "dma_clkdm",
         .mpu_irqs       = omap54xx_dma_system_irqs,
+        .xlate_irq      = omap4_xlate_irq,
         .main_clk       = "l3_iclk_div",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index a8e4b582c527..6163d66102a3 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -498,6 +498,7 @@ struct omap_prcm_irq_setup {
         u8 nr_irqs;
         const struct omap_prcm_irq *irqs;
         int irq;
+        unsigned int (*xlate_irq)(unsigned int);
         void (*read_pending_irqs)(unsigned long *events);
         void (*ocp_barrier)(void);
         void (*save_and_clear_irqen)(u32 *saved_mask);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index cc170fb81ff7..408c64efb807 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -49,6 +49,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
         .irqs                   = omap4_prcm_irqs,
         .nr_irqs                = ARRAY_SIZE(omap4_prcm_irqs),
         .irq                    = 11 + OMAP44XX_IRQ_GIC_START,
+        .xlate_irq              = omap4_xlate_irq,
         .read_pending_irqs      = &omap44xx_prm_read_pending_irqs,
         .ocp_barrier            = &omap44xx_prm_ocp_barrier,
         .save_and_clear_irqen   = &omap44xx_prm_save_and_clear_irqen,
@@ -751,8 +752,10 @@ static int omap44xx_prm_late_init(void)
                 }
 
                 /* Once OMAP4 DT is filled as well */
-                if (irq_num >= 0)
+                if (irq_num >= 0) {
                         omap4_prcm_irq_setup.irq = irq_num;
+                        omap4_prcm_irq_setup.xlate_irq = NULL;
+                }
         }
 
         omap44xx_prm_enable_io_wakeup();
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 779940cb6e56..dea2833ca627 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -187,6 +187,7 @@ int omap_prcm_event_to_irq(const char *name)
  */
 void omap_prcm_irq_cleanup(void)
 {
+        unsigned int irq;
         int i;
 
         if (!prcm_irq_setup) {
@@ -211,7 +212,11 @@ void omap_prcm_irq_cleanup(void)
         kfree(prcm_irq_setup->priority_mask);
         prcm_irq_setup->priority_mask = NULL;
 
-        irq_set_chained_handler(prcm_irq_setup->irq, NULL);
+        if (prcm_irq_setup->xlate_irq)
+                irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq);
+        else
+                irq = prcm_irq_setup->irq;
+        irq_set_chained_handler(irq, NULL);
 
         if (prcm_irq_setup->base_irq > 0)
                 irq_free_descs(prcm_irq_setup->base_irq,
@@ -259,6 +264,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
         int offset, i;
         struct irq_chip_generic *gc;
         struct irq_chip_type *ct;
+        unsigned int irq;
 
         if (!irq_setup)
                 return -EINVAL;
@@ -298,7 +304,11 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
                                 1 << (offset & 0x1f);
         }
 
-        irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler);
+        if (irq_setup->xlate_irq)
+                irq = irq_setup->xlate_irq(irq_setup->irq);
+        else
+                irq = irq_setup->irq;
+        irq_set_chained_handler(irq, omap_prcm_irq_handler);
 
         irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
                 0);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4f61148ec168..7d45c84c69ba 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -54,6 +54,7 @@
 
 #include "soc.h"
 #include "common.h"
+#include "control.h"
 #include "powerdomain.h"
 #include "omap-secure.h"
 
@@ -496,7 +497,8 @@ static void __init realtime_counter_init(void)
         void __iomem *base;
         static struct clk *sys_clk;
         unsigned long rate;
-        unsigned int reg, num, den;
+        unsigned int reg;
+        unsigned long long num, den;
 
         base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
         if (!base) {
@@ -511,13 +513,42 @@ static void __init realtime_counter_init(void)
         }
 
         rate = clk_get_rate(sys_clk);
+
+        if (soc_is_dra7xx()) {
+                /*
+                 * Errata i856 says the 32.768KHz crystal does not start at
+                 * power on, so the CPU falls back to an emulated 32KHz clock
+                 * based on sysclk / 610 instead. This causes the master counter
+                 * frequency to not be 6.144MHz but at sysclk / 610 * 375 / 2
+                 * (OR sysclk * 75 / 244)
+                 *
+                 * This affects at least the DRA7/AM572x 1.0, 1.1 revisions.
+                 * Of course any board built without a populated 32.768KHz
+                 * crystal would also need this fix even if the CPU is fixed
+                 * later.
+                 *
+                 * Either case can be detected by using the two speedselect bits
+                 * If they are not 0, then the 32.768KHz clock driving the
+                 * coarse counter that corrects the fine counter every time it
+                 * ticks is actually rate/610 rather than 32.768KHz and we
+                 * should compensate to avoid the 570ppm (at 20MHz, much worse
+                 * at other rates) too fast system time.
+                 */
+                reg = omap_ctrl_readl(DRA7_CTRL_CORE_BOOTSTRAP);
+                if (reg & DRA7_SPEEDSELECT_MASK) {
+                        num = 75;
+                        den = 244;
+                        goto sysclk1_based;
+                }
+        }
+
         /* Numerator/denumerator values refer TRM Realtime Counter section */
         switch (rate) {
-        case 1200000:
+        case 12000000:
                 num = 64;
                 den = 125;
                 break;
-        case 1300000:
+        case 13000000:
                 num = 768;
                 den = 1625;
                 break;
@@ -529,11 +560,11 @@ static void __init realtime_counter_init(void)
                 num = 192;
                 den = 625;
                 break;
-        case 2600000:
+        case 26000000:
                 num = 384;
                 den = 1625;
                 break;
-        case 2700000:
+        case 27000000:
                 num = 256;
                 den = 1125;
                 break;
@@ -545,6 +576,7 @@ static void __init realtime_counter_init(void)
                 break;
         }
 
+sysclk1_based:
         /* Program numerator and denumerator registers */
         reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) &
                         NUMERATOR_DENUMERATOR_MASK;
@@ -556,7 +588,7 @@ static void __init realtime_counter_init(void)
         reg |= den;
         writel_relaxed(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
 
-        arch_timer_freq = (rate / den) * num;
+        arch_timer_freq = DIV_ROUND_UP_ULL(rate * num, den);
         set_cntfreq();
 
         iounmap(base);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4457e731f7a4..292eca0e78ed 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -66,19 +66,24 @@ void __init omap_pmic_init(int bus, u32 clkrate,
         omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
 }
 
+#ifdef CONFIG_ARCH_OMAP4
 void __init omap4_pmic_init(const char *pmic_type,
                     struct twl4030_platform_data *pmic_data,
                     struct i2c_board_info *devices, int nr_devices)
 {
         /* PMIC part*/
+        unsigned int irq;
+
         omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
         omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
-        omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
+        irq = omap4_xlate_irq(7 + OMAP44XX_IRQ_GIC_START);
+        omap_pmic_init(1, 400, pmic_type, irq, pmic_data);
 
         /* Register additional devices on i2c1 bus if needed */
         if (devices)
                 i2c_register_board_info(1, devices, nr_devices);
 }
+#endif
 
 void __init omap_pmic_late_init(void)
 {