diff options
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock2420_data.c | 48 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2430_data.c | 48 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 36 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 33 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 27 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer.c | 194 |
9 files changed, 440 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index debc040872f1..14a6277dd184 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -1898,6 +1898,54 @@ static struct omap_clk omap2420_clks[] = { | |||
1898 | CLK(NULL, "pka_ick", &pka_ick, CK_242X), | 1898 | CLK(NULL, "pka_ick", &pka_ick, CK_242X), |
1899 | CLK(NULL, "usb_fck", &usb_fck, CK_242X), | 1899 | CLK(NULL, "usb_fck", &usb_fck, CK_242X), |
1900 | CLK("musb-hdrc", "fck", &osc_ck, CK_242X), | 1900 | CLK("musb-hdrc", "fck", &osc_ck, CK_242X), |
1901 | CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X), | ||
1902 | CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X), | ||
1903 | CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X), | ||
1904 | CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X), | ||
1905 | CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X), | ||
1906 | CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X), | ||
1907 | CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X), | ||
1908 | CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X), | ||
1909 | CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X), | ||
1910 | CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X), | ||
1911 | CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X), | ||
1912 | CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X), | ||
1913 | CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), | ||
1914 | CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), | ||
1915 | CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), | ||
1916 | CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), | ||
1917 | CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), | ||
1918 | CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), | ||
1919 | CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), | ||
1920 | CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), | ||
1921 | CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), | ||
1922 | CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), | ||
1923 | CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), | ||
1924 | CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), | ||
1925 | CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), | ||
1926 | CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), | ||
1927 | CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), | ||
1928 | CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), | ||
1929 | CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), | ||
1930 | CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), | ||
1931 | CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), | ||
1932 | CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), | ||
1933 | CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), | ||
1934 | CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), | ||
1935 | CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), | ||
1936 | CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), | ||
1937 | CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), | ||
1938 | CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), | ||
1939 | CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), | ||
1940 | CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), | ||
1941 | CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), | ||
1942 | CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), | ||
1943 | CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), | ||
1944 | CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), | ||
1945 | CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), | ||
1946 | CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), | ||
1947 | CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), | ||
1948 | CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), | ||
1901 | }; | 1949 | }; |
1902 | 1950 | ||
1903 | /* | 1951 | /* |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 96a942e42db1..ea6717cfa3c8 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -1998,6 +1998,54 @@ static struct omap_clk omap2430_clks[] = { | |||
1998 | CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), | 1998 | CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), |
1999 | CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), | 1999 | CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), |
2000 | CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), | 2000 | CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), |
2001 | CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X), | ||
2002 | CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X), | ||
2003 | CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X), | ||
2004 | CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X), | ||
2005 | CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X), | ||
2006 | CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X), | ||
2007 | CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X), | ||
2008 | CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X), | ||
2009 | CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X), | ||
2010 | CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X), | ||
2011 | CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X), | ||
2012 | CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X), | ||
2013 | CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), | ||
2014 | CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), | ||
2015 | CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), | ||
2016 | CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), | ||
2017 | CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), | ||
2018 | CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), | ||
2019 | CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), | ||
2020 | CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), | ||
2021 | CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), | ||
2022 | CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), | ||
2023 | CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), | ||
2024 | CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), | ||
2025 | CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), | ||
2026 | CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), | ||
2027 | CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), | ||
2028 | CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), | ||
2029 | CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), | ||
2030 | CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), | ||
2031 | CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), | ||
2032 | CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), | ||
2033 | CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), | ||
2034 | CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), | ||
2035 | CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), | ||
2036 | CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), | ||
2037 | CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), | ||
2038 | CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), | ||
2039 | CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), | ||
2040 | CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), | ||
2041 | CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), | ||
2042 | CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), | ||
2043 | CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), | ||
2044 | CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), | ||
2045 | CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), | ||
2046 | CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), | ||
2047 | CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), | ||
2048 | CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), | ||
2001 | }; | 2049 | }; |
2002 | 2050 | ||
2003 | /* | 2051 | /* |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index dadb8c6c0115..65dd363163bc 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3464,6 +3464,42 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3464 | CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), | 3464 | CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), |
3465 | CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), | 3465 | CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), |
3466 | CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), | 3466 | CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), |
3467 | CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX), | ||
3468 | CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX), | ||
3469 | CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX), | ||
3470 | CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX), | ||
3471 | CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX), | ||
3472 | CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX), | ||
3473 | CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX), | ||
3474 | CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX), | ||
3475 | CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX), | ||
3476 | CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX), | ||
3477 | CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX), | ||
3478 | CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX), | ||
3479 | CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3480 | CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3481 | CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3482 | CLK("omap_timer.4", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3483 | CLK("omap_timer.5", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3484 | CLK("omap_timer.6", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3485 | CLK("omap_timer.7", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3486 | CLK("omap_timer.8", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3487 | CLK("omap_timer.9", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3488 | CLK("omap_timer.10", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3489 | CLK("omap_timer.11", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3490 | CLK("omap_timer.12", "32k_ck", &omap_32k_fck, CK_3XXX), | ||
3491 | CLK("omap_timer.1", "sys_ck", &sys_ck, CK_3XXX), | ||
3492 | CLK("omap_timer.2", "sys_ck", &sys_ck, CK_3XXX), | ||
3493 | CLK("omap_timer.3", "sys_ck", &sys_ck, CK_3XXX), | ||
3494 | CLK("omap_timer.4", "sys_ck", &sys_ck, CK_3XXX), | ||
3495 | CLK("omap_timer.5", "sys_ck", &sys_ck, CK_3XXX), | ||
3496 | CLK("omap_timer.6", "sys_ck", &sys_ck, CK_3XXX), | ||
3497 | CLK("omap_timer.7", "sys_ck", &sys_ck, CK_3XXX), | ||
3498 | CLK("omap_timer.8", "sys_ck", &sys_ck, CK_3XXX), | ||
3499 | CLK("omap_timer.9", "sys_ck", &sys_ck, CK_3XXX), | ||
3500 | CLK("omap_timer.10", "sys_ck", &sys_ck, CK_3XXX), | ||
3501 | CLK("omap_timer.11", "sys_ck", &sys_ck, CK_3XXX), | ||
3502 | CLK("omap_timer.12", "sys_ck", &sys_ck, CK_3XXX), | ||
3467 | }; | 3503 | }; |
3468 | 3504 | ||
3469 | 3505 | ||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c0b6fbda3408..946bf04a956d 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3363,6 +3363,39 @@ static struct omap_clk omap44xx_clks[] = { | |||
3363 | CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), | 3363 | CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), |
3364 | CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), | 3364 | CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), |
3365 | CLK("omap_wdt", "ick", &dummy_ck, CK_443X), | 3365 | CLK("omap_wdt", "ick", &dummy_ck, CK_443X), |
3366 | CLK("omap_timer.1", "fck", &timer1_fck, CK_443X), | ||
3367 | CLK("omap_timer.2", "fck", &timer2_fck, CK_443X), | ||
3368 | CLK("omap_timer.3", "fck", &timer3_fck, CK_443X), | ||
3369 | CLK("omap_timer.4", "fck", &timer4_fck, CK_443X), | ||
3370 | CLK("omap_timer.5", "fck", &timer5_fck, CK_443X), | ||
3371 | CLK("omap_timer.6", "fck", &timer6_fck, CK_443X), | ||
3372 | CLK("omap_timer.7", "fck", &timer7_fck, CK_443X), | ||
3373 | CLK("omap_timer.8", "fck", &timer8_fck, CK_443X), | ||
3374 | CLK("omap_timer.9", "fck", &timer9_fck, CK_443X), | ||
3375 | CLK("omap_timer.10", "fck", &timer10_fck, CK_443X), | ||
3376 | CLK("omap_timer.11", "fck", &timer11_fck, CK_443X), | ||
3377 | CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), | ||
3378 | CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), | ||
3379 | CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), | ||
3380 | CLK("omap_timer.4", "32k_ck", &sys_32k_ck, CK_443X), | ||
3381 | CLK("omap_timer.5", "32k_ck", &sys_32k_ck, CK_443X), | ||
3382 | CLK("omap_timer.6", "32k_ck", &sys_32k_ck, CK_443X), | ||
3383 | CLK("omap_timer.7", "32k_ck", &sys_32k_ck, CK_443X), | ||
3384 | CLK("omap_timer.8", "32k_ck", &sys_32k_ck, CK_443X), | ||
3385 | CLK("omap_timer.9", "32k_ck", &sys_32k_ck, CK_443X), | ||
3386 | CLK("omap_timer.10", "32k_ck", &sys_32k_ck, CK_443X), | ||
3387 | CLK("omap_timer.11", "32k_ck", &sys_32k_ck, CK_443X), | ||
3388 | CLK("omap_timer.1", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3389 | CLK("omap_timer.2", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3390 | CLK("omap_timer.3", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3391 | CLK("omap_timer.4", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3392 | CLK("omap_timer.9", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3393 | CLK("omap_timer.10", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3394 | CLK("omap_timer.11", "sys_ck", &sys_clkin_ck, CK_443X), | ||
3395 | CLK("omap_timer.5", "sys_ck", &syc_clk_div_ck, CK_443X), | ||
3396 | CLK("omap_timer.6", "sys_ck", &syc_clk_div_ck, CK_443X), | ||
3397 | CLK("omap_timer.7", "sys_ck", &syc_clk_div_ck, CK_443X), | ||
3398 | CLK("omap_timer.8", "sys_ck", &syc_clk_div_ck, CK_443X), | ||
3366 | }; | 3399 | }; |
3367 | 3400 | ||
3368 | int __init omap4xxx_clk_init(void) | 3401 | int __init omap4xxx_clk_init(void) |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b6ea69a5c2f8..6d7206213525 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -269,6 +269,16 @@ static struct omap_hwmod omap2420_iva_hwmod = { | |||
269 | .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), | 269 | .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), |
270 | }; | 270 | }; |
271 | 271 | ||
272 | /* always-on timers dev attribute */ | ||
273 | static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { | ||
274 | .timer_capability = OMAP_TIMER_ALWON, | ||
275 | }; | ||
276 | |||
277 | /* pwm timers dev attribute */ | ||
278 | static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { | ||
279 | .timer_capability = OMAP_TIMER_HAS_PWM, | ||
280 | }; | ||
281 | |||
272 | /* timer1 */ | 282 | /* timer1 */ |
273 | static struct omap_hwmod omap2420_timer1_hwmod; | 283 | static struct omap_hwmod omap2420_timer1_hwmod; |
274 | 284 | ||
@@ -309,6 +319,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { | |||
309 | .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, | 319 | .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, |
310 | }, | 320 | }, |
311 | }, | 321 | }, |
322 | .dev_attr = &capability_alwon_dev_attr, | ||
312 | .slaves = omap2420_timer1_slaves, | 323 | .slaves = omap2420_timer1_slaves, |
313 | .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), | 324 | .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), |
314 | .class = &omap2xxx_timer_hwmod_class, | 325 | .class = &omap2xxx_timer_hwmod_class, |
@@ -345,6 +356,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { | |||
345 | .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, | 356 | .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, |
346 | }, | 357 | }, |
347 | }, | 358 | }, |
359 | .dev_attr = &capability_alwon_dev_attr, | ||
348 | .slaves = omap2420_timer2_slaves, | 360 | .slaves = omap2420_timer2_slaves, |
349 | .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), | 361 | .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), |
350 | .class = &omap2xxx_timer_hwmod_class, | 362 | .class = &omap2xxx_timer_hwmod_class, |
@@ -381,6 +393,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { | |||
381 | .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, | 393 | .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, |
382 | }, | 394 | }, |
383 | }, | 395 | }, |
396 | .dev_attr = &capability_alwon_dev_attr, | ||
384 | .slaves = omap2420_timer3_slaves, | 397 | .slaves = omap2420_timer3_slaves, |
385 | .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), | 398 | .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), |
386 | .class = &omap2xxx_timer_hwmod_class, | 399 | .class = &omap2xxx_timer_hwmod_class, |
@@ -417,6 +430,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { | |||
417 | .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, | 430 | .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, |
418 | }, | 431 | }, |
419 | }, | 432 | }, |
433 | .dev_attr = &capability_alwon_dev_attr, | ||
420 | .slaves = omap2420_timer4_slaves, | 434 | .slaves = omap2420_timer4_slaves, |
421 | .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), | 435 | .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), |
422 | .class = &omap2xxx_timer_hwmod_class, | 436 | .class = &omap2xxx_timer_hwmod_class, |
@@ -453,6 +467,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { | |||
453 | .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, | 467 | .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, |
454 | }, | 468 | }, |
455 | }, | 469 | }, |
470 | .dev_attr = &capability_alwon_dev_attr, | ||
456 | .slaves = omap2420_timer5_slaves, | 471 | .slaves = omap2420_timer5_slaves, |
457 | .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), | 472 | .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), |
458 | .class = &omap2xxx_timer_hwmod_class, | 473 | .class = &omap2xxx_timer_hwmod_class, |
@@ -490,6 +505,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { | |||
490 | .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, | 505 | .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, |
491 | }, | 506 | }, |
492 | }, | 507 | }, |
508 | .dev_attr = &capability_alwon_dev_attr, | ||
493 | .slaves = omap2420_timer6_slaves, | 509 | .slaves = omap2420_timer6_slaves, |
494 | .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), | 510 | .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), |
495 | .class = &omap2xxx_timer_hwmod_class, | 511 | .class = &omap2xxx_timer_hwmod_class, |
@@ -526,6 +542,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { | |||
526 | .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, | 542 | .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, |
527 | }, | 543 | }, |
528 | }, | 544 | }, |
545 | .dev_attr = &capability_alwon_dev_attr, | ||
529 | .slaves = omap2420_timer7_slaves, | 546 | .slaves = omap2420_timer7_slaves, |
530 | .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), | 547 | .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), |
531 | .class = &omap2xxx_timer_hwmod_class, | 548 | .class = &omap2xxx_timer_hwmod_class, |
@@ -562,6 +579,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { | |||
562 | .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, | 579 | .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, |
563 | }, | 580 | }, |
564 | }, | 581 | }, |
582 | .dev_attr = &capability_alwon_dev_attr, | ||
565 | .slaves = omap2420_timer8_slaves, | 583 | .slaves = omap2420_timer8_slaves, |
566 | .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), | 584 | .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), |
567 | .class = &omap2xxx_timer_hwmod_class, | 585 | .class = &omap2xxx_timer_hwmod_class, |
@@ -598,6 +616,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { | |||
598 | .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, | 616 | .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, |
599 | }, | 617 | }, |
600 | }, | 618 | }, |
619 | .dev_attr = &capability_pwm_dev_attr, | ||
601 | .slaves = omap2420_timer9_slaves, | 620 | .slaves = omap2420_timer9_slaves, |
602 | .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), | 621 | .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), |
603 | .class = &omap2xxx_timer_hwmod_class, | 622 | .class = &omap2xxx_timer_hwmod_class, |
@@ -634,6 +653,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { | |||
634 | .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, | 653 | .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, |
635 | }, | 654 | }, |
636 | }, | 655 | }, |
656 | .dev_attr = &capability_pwm_dev_attr, | ||
637 | .slaves = omap2420_timer10_slaves, | 657 | .slaves = omap2420_timer10_slaves, |
638 | .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), | 658 | .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), |
639 | .class = &omap2xxx_timer_hwmod_class, | 659 | .class = &omap2xxx_timer_hwmod_class, |
@@ -670,6 +690,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { | |||
670 | .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, | 690 | .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, |
671 | }, | 691 | }, |
672 | }, | 692 | }, |
693 | .dev_attr = &capability_pwm_dev_attr, | ||
673 | .slaves = omap2420_timer11_slaves, | 694 | .slaves = omap2420_timer11_slaves, |
674 | .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), | 695 | .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), |
675 | .class = &omap2xxx_timer_hwmod_class, | 696 | .class = &omap2xxx_timer_hwmod_class, |
@@ -706,6 +727,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { | |||
706 | .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, | 727 | .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, |
707 | }, | 728 | }, |
708 | }, | 729 | }, |
730 | .dev_attr = &capability_pwm_dev_attr, | ||
709 | .slaves = omap2420_timer12_slaves, | 731 | .slaves = omap2420_timer12_slaves, |
710 | .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), | 732 | .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), |
711 | .class = &omap2xxx_timer_hwmod_class, | 733 | .class = &omap2xxx_timer_hwmod_class, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 56de8d616313..a2580d01c3ff 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -343,6 +343,16 @@ static struct omap_hwmod omap2430_iva_hwmod = { | |||
343 | .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), | 343 | .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), |
344 | }; | 344 | }; |
345 | 345 | ||
346 | /* always-on timers dev attribute */ | ||
347 | static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { | ||
348 | .timer_capability = OMAP_TIMER_ALWON, | ||
349 | }; | ||
350 | |||
351 | /* pwm timers dev attribute */ | ||
352 | static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { | ||
353 | .timer_capability = OMAP_TIMER_HAS_PWM, | ||
354 | }; | ||
355 | |||
346 | /* timer1 */ | 356 | /* timer1 */ |
347 | static struct omap_hwmod omap2430_timer1_hwmod; | 357 | static struct omap_hwmod omap2430_timer1_hwmod; |
348 | 358 | ||
@@ -383,6 +393,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | |||
383 | .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, | 393 | .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, |
384 | }, | 394 | }, |
385 | }, | 395 | }, |
396 | .dev_attr = &capability_alwon_dev_attr, | ||
386 | .slaves = omap2430_timer1_slaves, | 397 | .slaves = omap2430_timer1_slaves, |
387 | .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), | 398 | .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), |
388 | .class = &omap2xxx_timer_hwmod_class, | 399 | .class = &omap2xxx_timer_hwmod_class, |
@@ -419,6 +430,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | |||
419 | .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, | 430 | .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, |
420 | }, | 431 | }, |
421 | }, | 432 | }, |
433 | .dev_attr = &capability_alwon_dev_attr, | ||
422 | .slaves = omap2430_timer2_slaves, | 434 | .slaves = omap2430_timer2_slaves, |
423 | .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), | 435 | .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), |
424 | .class = &omap2xxx_timer_hwmod_class, | 436 | .class = &omap2xxx_timer_hwmod_class, |
@@ -455,6 +467,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | |||
455 | .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, | 467 | .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, |
456 | }, | 468 | }, |
457 | }, | 469 | }, |
470 | .dev_attr = &capability_alwon_dev_attr, | ||
458 | .slaves = omap2430_timer3_slaves, | 471 | .slaves = omap2430_timer3_slaves, |
459 | .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), | 472 | .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), |
460 | .class = &omap2xxx_timer_hwmod_class, | 473 | .class = &omap2xxx_timer_hwmod_class, |
@@ -491,6 +504,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | |||
491 | .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, | 504 | .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, |
492 | }, | 505 | }, |
493 | }, | 506 | }, |
507 | .dev_attr = &capability_alwon_dev_attr, | ||
494 | .slaves = omap2430_timer4_slaves, | 508 | .slaves = omap2430_timer4_slaves, |
495 | .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), | 509 | .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), |
496 | .class = &omap2xxx_timer_hwmod_class, | 510 | .class = &omap2xxx_timer_hwmod_class, |
@@ -527,6 +541,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | |||
527 | .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, | 541 | .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, |
528 | }, | 542 | }, |
529 | }, | 543 | }, |
544 | .dev_attr = &capability_alwon_dev_attr, | ||
530 | .slaves = omap2430_timer5_slaves, | 545 | .slaves = omap2430_timer5_slaves, |
531 | .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), | 546 | .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), |
532 | .class = &omap2xxx_timer_hwmod_class, | 547 | .class = &omap2xxx_timer_hwmod_class, |
@@ -563,6 +578,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | |||
563 | .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, | 578 | .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, |
564 | }, | 579 | }, |
565 | }, | 580 | }, |
581 | .dev_attr = &capability_alwon_dev_attr, | ||
566 | .slaves = omap2430_timer6_slaves, | 582 | .slaves = omap2430_timer6_slaves, |
567 | .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), | 583 | .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), |
568 | .class = &omap2xxx_timer_hwmod_class, | 584 | .class = &omap2xxx_timer_hwmod_class, |
@@ -599,6 +615,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | |||
599 | .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, | 615 | .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, |
600 | }, | 616 | }, |
601 | }, | 617 | }, |
618 | .dev_attr = &capability_alwon_dev_attr, | ||
602 | .slaves = omap2430_timer7_slaves, | 619 | .slaves = omap2430_timer7_slaves, |
603 | .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), | 620 | .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), |
604 | .class = &omap2xxx_timer_hwmod_class, | 621 | .class = &omap2xxx_timer_hwmod_class, |
@@ -635,6 +652,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | |||
635 | .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, | 652 | .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, |
636 | }, | 653 | }, |
637 | }, | 654 | }, |
655 | .dev_attr = &capability_alwon_dev_attr, | ||
638 | .slaves = omap2430_timer8_slaves, | 656 | .slaves = omap2430_timer8_slaves, |
639 | .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), | 657 | .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), |
640 | .class = &omap2xxx_timer_hwmod_class, | 658 | .class = &omap2xxx_timer_hwmod_class, |
@@ -671,6 +689,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | |||
671 | .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, | 689 | .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, |
672 | }, | 690 | }, |
673 | }, | 691 | }, |
692 | .dev_attr = &capability_pwm_dev_attr, | ||
674 | .slaves = omap2430_timer9_slaves, | 693 | .slaves = omap2430_timer9_slaves, |
675 | .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), | 694 | .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), |
676 | .class = &omap2xxx_timer_hwmod_class, | 695 | .class = &omap2xxx_timer_hwmod_class, |
@@ -707,6 +726,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | |||
707 | .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, | 726 | .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, |
708 | }, | 727 | }, |
709 | }, | 728 | }, |
729 | .dev_attr = &capability_pwm_dev_attr, | ||
710 | .slaves = omap2430_timer10_slaves, | 730 | .slaves = omap2430_timer10_slaves, |
711 | .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), | 731 | .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), |
712 | .class = &omap2xxx_timer_hwmod_class, | 732 | .class = &omap2xxx_timer_hwmod_class, |
@@ -743,6 +763,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | |||
743 | .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, | 763 | .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, |
744 | }, | 764 | }, |
745 | }, | 765 | }, |
766 | .dev_attr = &capability_pwm_dev_attr, | ||
746 | .slaves = omap2430_timer11_slaves, | 767 | .slaves = omap2430_timer11_slaves, |
747 | .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), | 768 | .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), |
748 | .class = &omap2xxx_timer_hwmod_class, | 769 | .class = &omap2xxx_timer_hwmod_class, |
@@ -779,6 +800,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { | |||
779 | .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, | 800 | .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, |
780 | }, | 801 | }, |
781 | }, | 802 | }, |
803 | .dev_attr = &capability_pwm_dev_attr, | ||
782 | .slaves = omap2430_timer12_slaves, | 804 | .slaves = omap2430_timer12_slaves, |
783 | .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), | 805 | .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), |
784 | .class = &omap2xxx_timer_hwmod_class, | 806 | .class = &omap2xxx_timer_hwmod_class, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ab35acbc2d1d..2e4852d9574f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -564,6 +564,21 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { | |||
564 | .rev = OMAP_TIMER_IP_VERSION_1, | 564 | .rev = OMAP_TIMER_IP_VERSION_1, |
565 | }; | 565 | }; |
566 | 566 | ||
567 | /* secure timers dev attribute */ | ||
568 | static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { | ||
569 | .timer_capability = OMAP_TIMER_SECURE, | ||
570 | }; | ||
571 | |||
572 | /* always-on timers dev attribute */ | ||
573 | static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { | ||
574 | .timer_capability = OMAP_TIMER_ALWON, | ||
575 | }; | ||
576 | |||
577 | /* pwm timers dev attribute */ | ||
578 | static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { | ||
579 | .timer_capability = OMAP_TIMER_HAS_PWM, | ||
580 | }; | ||
581 | |||
567 | /* timer1 */ | 582 | /* timer1 */ |
568 | static struct omap_hwmod omap3xxx_timer1_hwmod; | 583 | static struct omap_hwmod omap3xxx_timer1_hwmod; |
569 | 584 | ||
@@ -604,6 +619,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { | |||
604 | .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, | 619 | .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, |
605 | }, | 620 | }, |
606 | }, | 621 | }, |
622 | .dev_attr = &capability_alwon_dev_attr, | ||
607 | .slaves = omap3xxx_timer1_slaves, | 623 | .slaves = omap3xxx_timer1_slaves, |
608 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), | 624 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), |
609 | .class = &omap3xxx_timer_1ms_hwmod_class, | 625 | .class = &omap3xxx_timer_1ms_hwmod_class, |
@@ -649,6 +665,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { | |||
649 | .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, | 665 | .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, |
650 | }, | 666 | }, |
651 | }, | 667 | }, |
668 | .dev_attr = &capability_alwon_dev_attr, | ||
652 | .slaves = omap3xxx_timer2_slaves, | 669 | .slaves = omap3xxx_timer2_slaves, |
653 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), | 670 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), |
654 | .class = &omap3xxx_timer_1ms_hwmod_class, | 671 | .class = &omap3xxx_timer_1ms_hwmod_class, |
@@ -694,6 +711,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { | |||
694 | .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, | 711 | .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, |
695 | }, | 712 | }, |
696 | }, | 713 | }, |
714 | .dev_attr = &capability_alwon_dev_attr, | ||
697 | .slaves = omap3xxx_timer3_slaves, | 715 | .slaves = omap3xxx_timer3_slaves, |
698 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), | 716 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), |
699 | .class = &omap3xxx_timer_hwmod_class, | 717 | .class = &omap3xxx_timer_hwmod_class, |
@@ -739,6 +757,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { | |||
739 | .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, | 757 | .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, |
740 | }, | 758 | }, |
741 | }, | 759 | }, |
760 | .dev_attr = &capability_alwon_dev_attr, | ||
742 | .slaves = omap3xxx_timer4_slaves, | 761 | .slaves = omap3xxx_timer4_slaves, |
743 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), | 762 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), |
744 | .class = &omap3xxx_timer_hwmod_class, | 763 | .class = &omap3xxx_timer_hwmod_class, |
@@ -784,6 +803,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { | |||
784 | .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, | 803 | .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, |
785 | }, | 804 | }, |
786 | }, | 805 | }, |
806 | .dev_attr = &capability_alwon_dev_attr, | ||
787 | .slaves = omap3xxx_timer5_slaves, | 807 | .slaves = omap3xxx_timer5_slaves, |
788 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), | 808 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), |
789 | .class = &omap3xxx_timer_hwmod_class, | 809 | .class = &omap3xxx_timer_hwmod_class, |
@@ -829,6 +849,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { | |||
829 | .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, | 849 | .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, |
830 | }, | 850 | }, |
831 | }, | 851 | }, |
852 | .dev_attr = &capability_alwon_dev_attr, | ||
832 | .slaves = omap3xxx_timer6_slaves, | 853 | .slaves = omap3xxx_timer6_slaves, |
833 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), | 854 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), |
834 | .class = &omap3xxx_timer_hwmod_class, | 855 | .class = &omap3xxx_timer_hwmod_class, |
@@ -874,6 +895,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { | |||
874 | .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, | 895 | .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, |
875 | }, | 896 | }, |
876 | }, | 897 | }, |
898 | .dev_attr = &capability_alwon_dev_attr, | ||
877 | .slaves = omap3xxx_timer7_slaves, | 899 | .slaves = omap3xxx_timer7_slaves, |
878 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), | 900 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), |
879 | .class = &omap3xxx_timer_hwmod_class, | 901 | .class = &omap3xxx_timer_hwmod_class, |
@@ -919,6 +941,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { | |||
919 | .idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT, | 941 | .idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT, |
920 | }, | 942 | }, |
921 | }, | 943 | }, |
944 | .dev_attr = &capability_pwm_dev_attr, | ||
922 | .slaves = omap3xxx_timer8_slaves, | 945 | .slaves = omap3xxx_timer8_slaves, |
923 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), | 946 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), |
924 | .class = &omap3xxx_timer_hwmod_class, | 947 | .class = &omap3xxx_timer_hwmod_class, |
@@ -964,6 +987,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { | |||
964 | .idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT, | 987 | .idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT, |
965 | }, | 988 | }, |
966 | }, | 989 | }, |
990 | .dev_attr = &capability_pwm_dev_attr, | ||
967 | .slaves = omap3xxx_timer9_slaves, | 991 | .slaves = omap3xxx_timer9_slaves, |
968 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), | 992 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), |
969 | .class = &omap3xxx_timer_hwmod_class, | 993 | .class = &omap3xxx_timer_hwmod_class, |
@@ -1000,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { | |||
1000 | .idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT, | 1024 | .idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT, |
1001 | }, | 1025 | }, |
1002 | }, | 1026 | }, |
1027 | .dev_attr = &capability_pwm_dev_attr, | ||
1003 | .slaves = omap3xxx_timer10_slaves, | 1028 | .slaves = omap3xxx_timer10_slaves, |
1004 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), | 1029 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), |
1005 | .class = &omap3xxx_timer_1ms_hwmod_class, | 1030 | .class = &omap3xxx_timer_1ms_hwmod_class, |
@@ -1036,6 +1061,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { | |||
1036 | .idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT, | 1061 | .idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT, |
1037 | }, | 1062 | }, |
1038 | }, | 1063 | }, |
1064 | .dev_attr = &capability_pwm_dev_attr, | ||
1039 | .slaves = omap3xxx_timer11_slaves, | 1065 | .slaves = omap3xxx_timer11_slaves, |
1040 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), | 1066 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), |
1041 | .class = &omap3xxx_timer_hwmod_class, | 1067 | .class = &omap3xxx_timer_hwmod_class, |
@@ -1085,6 +1111,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { | |||
1085 | .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, | 1111 | .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, |
1086 | }, | 1112 | }, |
1087 | }, | 1113 | }, |
1114 | .dev_attr = &capability_secure_dev_attr, | ||
1088 | .slaves = omap3xxx_timer12_slaves, | 1115 | .slaves = omap3xxx_timer12_slaves, |
1089 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), | 1116 | .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), |
1090 | .class = &omap3xxx_timer_hwmod_class, | 1117 | .class = &omap3xxx_timer_hwmod_class, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index fd1074a024b8..7695e5d43316 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <plat/mcbsp.h> | 29 | #include <plat/mcbsp.h> |
30 | #include <plat/mmc.h> | 30 | #include <plat/mmc.h> |
31 | #include <plat/i2c.h> | 31 | #include <plat/i2c.h> |
32 | #include <plat/dmtimer.h> | ||
32 | 33 | ||
33 | #include "omap_hwmod_common_data.h" | 34 | #include "omap_hwmod_common_data.h" |
34 | 35 | ||
@@ -4201,6 +4202,16 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { | |||
4201 | .sysc = &omap44xx_timer_sysc, | 4202 | .sysc = &omap44xx_timer_sysc, |
4202 | }; | 4203 | }; |
4203 | 4204 | ||
4205 | /* always-on timers dev attribute */ | ||
4206 | static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { | ||
4207 | .timer_capability = OMAP_TIMER_ALWON, | ||
4208 | }; | ||
4209 | |||
4210 | /* pwm timers dev attribute */ | ||
4211 | static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { | ||
4212 | .timer_capability = OMAP_TIMER_HAS_PWM, | ||
4213 | }; | ||
4214 | |||
4204 | /* timer1 */ | 4215 | /* timer1 */ |
4205 | static struct omap_hwmod omap44xx_timer1_hwmod; | 4216 | static struct omap_hwmod omap44xx_timer1_hwmod; |
4206 | static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { | 4217 | static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { |
@@ -4244,6 +4255,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | |||
4244 | .modulemode = MODULEMODE_SWCTRL, | 4255 | .modulemode = MODULEMODE_SWCTRL, |
4245 | }, | 4256 | }, |
4246 | }, | 4257 | }, |
4258 | .dev_attr = &capability_alwon_dev_attr, | ||
4247 | .slaves = omap44xx_timer1_slaves, | 4259 | .slaves = omap44xx_timer1_slaves, |
4248 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), | 4260 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), |
4249 | }; | 4261 | }; |
@@ -4291,6 +4303,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | |||
4291 | .modulemode = MODULEMODE_SWCTRL, | 4303 | .modulemode = MODULEMODE_SWCTRL, |
4292 | }, | 4304 | }, |
4293 | }, | 4305 | }, |
4306 | .dev_attr = &capability_alwon_dev_attr, | ||
4294 | .slaves = omap44xx_timer2_slaves, | 4307 | .slaves = omap44xx_timer2_slaves, |
4295 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), | 4308 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), |
4296 | }; | 4309 | }; |
@@ -4338,6 +4351,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | |||
4338 | .modulemode = MODULEMODE_SWCTRL, | 4351 | .modulemode = MODULEMODE_SWCTRL, |
4339 | }, | 4352 | }, |
4340 | }, | 4353 | }, |
4354 | .dev_attr = &capability_alwon_dev_attr, | ||
4341 | .slaves = omap44xx_timer3_slaves, | 4355 | .slaves = omap44xx_timer3_slaves, |
4342 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), | 4356 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), |
4343 | }; | 4357 | }; |
@@ -4385,6 +4399,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | |||
4385 | .modulemode = MODULEMODE_SWCTRL, | 4399 | .modulemode = MODULEMODE_SWCTRL, |
4386 | }, | 4400 | }, |
4387 | }, | 4401 | }, |
4402 | .dev_attr = &capability_alwon_dev_attr, | ||
4388 | .slaves = omap44xx_timer4_slaves, | 4403 | .slaves = omap44xx_timer4_slaves, |
4389 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), | 4404 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), |
4390 | }; | 4405 | }; |
@@ -4451,6 +4466,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | |||
4451 | .modulemode = MODULEMODE_SWCTRL, | 4466 | .modulemode = MODULEMODE_SWCTRL, |
4452 | }, | 4467 | }, |
4453 | }, | 4468 | }, |
4469 | .dev_attr = &capability_alwon_dev_attr, | ||
4454 | .slaves = omap44xx_timer5_slaves, | 4470 | .slaves = omap44xx_timer5_slaves, |
4455 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), | 4471 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), |
4456 | }; | 4472 | }; |
@@ -4518,6 +4534,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | |||
4518 | .modulemode = MODULEMODE_SWCTRL, | 4534 | .modulemode = MODULEMODE_SWCTRL, |
4519 | }, | 4535 | }, |
4520 | }, | 4536 | }, |
4537 | .dev_attr = &capability_alwon_dev_attr, | ||
4521 | .slaves = omap44xx_timer6_slaves, | 4538 | .slaves = omap44xx_timer6_slaves, |
4522 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), | 4539 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), |
4523 | }; | 4540 | }; |
@@ -4584,6 +4601,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | |||
4584 | .modulemode = MODULEMODE_SWCTRL, | 4601 | .modulemode = MODULEMODE_SWCTRL, |
4585 | }, | 4602 | }, |
4586 | }, | 4603 | }, |
4604 | .dev_attr = &capability_alwon_dev_attr, | ||
4587 | .slaves = omap44xx_timer7_slaves, | 4605 | .slaves = omap44xx_timer7_slaves, |
4588 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), | 4606 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), |
4589 | }; | 4607 | }; |
@@ -4650,6 +4668,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | |||
4650 | .modulemode = MODULEMODE_SWCTRL, | 4668 | .modulemode = MODULEMODE_SWCTRL, |
4651 | }, | 4669 | }, |
4652 | }, | 4670 | }, |
4671 | .dev_attr = &capability_pwm_dev_attr, | ||
4653 | .slaves = omap44xx_timer8_slaves, | 4672 | .slaves = omap44xx_timer8_slaves, |
4654 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), | 4673 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), |
4655 | }; | 4674 | }; |
@@ -4697,6 +4716,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | |||
4697 | .modulemode = MODULEMODE_SWCTRL, | 4716 | .modulemode = MODULEMODE_SWCTRL, |
4698 | }, | 4717 | }, |
4699 | }, | 4718 | }, |
4719 | .dev_attr = &capability_pwm_dev_attr, | ||
4700 | .slaves = omap44xx_timer9_slaves, | 4720 | .slaves = omap44xx_timer9_slaves, |
4701 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), | 4721 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), |
4702 | }; | 4722 | }; |
@@ -4744,6 +4764,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | |||
4744 | .modulemode = MODULEMODE_SWCTRL, | 4764 | .modulemode = MODULEMODE_SWCTRL, |
4745 | }, | 4765 | }, |
4746 | }, | 4766 | }, |
4767 | .dev_attr = &capability_pwm_dev_attr, | ||
4747 | .slaves = omap44xx_timer10_slaves, | 4768 | .slaves = omap44xx_timer10_slaves, |
4748 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), | 4769 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), |
4749 | }; | 4770 | }; |
@@ -4791,6 +4812,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { | |||
4791 | .modulemode = MODULEMODE_SWCTRL, | 4812 | .modulemode = MODULEMODE_SWCTRL, |
4792 | }, | 4813 | }, |
4793 | }, | 4814 | }, |
4815 | .dev_attr = &capability_pwm_dev_attr, | ||
4794 | .slaves = omap44xx_timer11_slaves, | 4816 | .slaves = omap44xx_timer11_slaves, |
4795 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), | 4817 | .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), |
4796 | }; | 4818 | }; |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index cf1de7d2630d..1140e98c9773 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/irq.h> | 35 | #include <linux/irq.h> |
36 | #include <linux/clocksource.h> | 36 | #include <linux/clocksource.h> |
37 | #include <linux/clockchips.h> | 37 | #include <linux/clockchips.h> |
38 | #include <linux/slab.h> | ||
38 | 39 | ||
39 | #include <asm/mach/time.h> | 40 | #include <asm/mach/time.h> |
40 | #include <plat/dmtimer.h> | 41 | #include <plat/dmtimer.h> |
@@ -42,6 +43,10 @@ | |||
42 | #include <asm/sched_clock.h> | 43 | #include <asm/sched_clock.h> |
43 | #include <plat/common.h> | 44 | #include <plat/common.h> |
44 | #include <plat/omap_hwmod.h> | 45 | #include <plat/omap_hwmod.h> |
46 | #include <plat/omap_device.h> | ||
47 | #include <plat/omap-pm.h> | ||
48 | |||
49 | #include "powerdomain.h" | ||
45 | 50 | ||
46 | /* Parent clocks, eventually these will come from the clock framework */ | 51 | /* Parent clocks, eventually these will come from the clock framework */ |
47 | 52 | ||
@@ -67,7 +72,7 @@ | |||
67 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | 72 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ |
68 | #define MAX_GPTIMER_ID 12 | 73 | #define MAX_GPTIMER_ID 12 |
69 | 74 | ||
70 | u32 sys_timer_reserved; | 75 | static u32 sys_timer_reserved; |
71 | 76 | ||
72 | /* Clockevent code */ | 77 | /* Clockevent code */ |
73 | 78 | ||
@@ -78,7 +83,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | |||
78 | { | 83 | { |
79 | struct clock_event_device *evt = &clockevent_gpt; | 84 | struct clock_event_device *evt = &clockevent_gpt; |
80 | 85 | ||
81 | __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | 86 | __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW); |
82 | 87 | ||
83 | evt->event_handler(evt); | 88 | evt->event_handler(evt); |
84 | return IRQ_HANDLED; | 89 | return IRQ_HANDLED; |
@@ -93,7 +98,7 @@ static struct irqaction omap2_gp_timer_irq = { | |||
93 | static int omap2_gp_timer_set_next_event(unsigned long cycles, | 98 | static int omap2_gp_timer_set_next_event(unsigned long cycles, |
94 | struct clock_event_device *evt) | 99 | struct clock_event_device *evt) |
95 | { | 100 | { |
96 | __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, | 101 | __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, |
97 | 0xffffffff - cycles, 1); | 102 | 0xffffffff - cycles, 1); |
98 | 103 | ||
99 | return 0; | 104 | return 0; |
@@ -104,16 +109,16 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | |||
104 | { | 109 | { |
105 | u32 period; | 110 | u32 period; |
106 | 111 | ||
107 | __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); | 112 | __omap_dm_timer_stop(&clkev, 1, clkev.rate); |
108 | 113 | ||
109 | switch (mode) { | 114 | switch (mode) { |
110 | case CLOCK_EVT_MODE_PERIODIC: | 115 | case CLOCK_EVT_MODE_PERIODIC: |
111 | period = clkev.rate / HZ; | 116 | period = clkev.rate / HZ; |
112 | period -= 1; | 117 | period -= 1; |
113 | /* Looks like we need to first set the load value separately */ | 118 | /* Looks like we need to first set the load value separately */ |
114 | __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, | 119 | __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, |
115 | 0xffffffff - period, 1); | 120 | 0xffffffff - period, 1); |
116 | __omap_dm_timer_load_start(clkev.io_base, | 121 | __omap_dm_timer_load_start(&clkev, |
117 | OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, | 122 | OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, |
118 | 0xffffffff - period, 1); | 123 | 0xffffffff - period, 1); |
119 | break; | 124 | break; |
@@ -189,7 +194,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | |||
189 | clk_put(src); | 194 | clk_put(src); |
190 | } | 195 | } |
191 | } | 196 | } |
192 | __omap_dm_timer_reset(timer->io_base, 1, 1); | 197 | __omap_dm_timer_init_regs(timer); |
198 | __omap_dm_timer_reset(timer, 1, 1); | ||
193 | timer->posted = 1; | 199 | timer->posted = 1; |
194 | 200 | ||
195 | timer->rate = clk_get_rate(timer->fclk); | 201 | timer->rate = clk_get_rate(timer->fclk); |
@@ -210,7 +216,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | |||
210 | omap2_gp_timer_irq.dev_id = (void *)&clkev; | 216 | omap2_gp_timer_irq.dev_id = (void *)&clkev; |
211 | setup_irq(clkev.irq, &omap2_gp_timer_irq); | 217 | setup_irq(clkev.irq, &omap2_gp_timer_irq); |
212 | 218 | ||
213 | __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | 219 | __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); |
214 | 220 | ||
215 | clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, | 221 | clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, |
216 | clockevent_gpt.shift); | 222 | clockevent_gpt.shift); |
@@ -251,7 +257,7 @@ static struct omap_dm_timer clksrc; | |||
251 | static DEFINE_CLOCK_DATA(cd); | 257 | static DEFINE_CLOCK_DATA(cd); |
252 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 258 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
253 | { | 259 | { |
254 | return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); | 260 | return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); |
255 | } | 261 | } |
256 | 262 | ||
257 | static struct clocksource clocksource_gpt = { | 263 | static struct clocksource clocksource_gpt = { |
@@ -266,7 +272,7 @@ static void notrace dmtimer_update_sched_clock(void) | |||
266 | { | 272 | { |
267 | u32 cyc; | 273 | u32 cyc; |
268 | 274 | ||
269 | cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | 275 | cyc = __omap_dm_timer_read_counter(&clksrc, 1); |
270 | 276 | ||
271 | update_sched_clock(&cd, cyc, (u32)~0); | 277 | update_sched_clock(&cd, cyc, (u32)~0); |
272 | } | 278 | } |
@@ -276,7 +282,7 @@ unsigned long long notrace sched_clock(void) | |||
276 | u32 cyc = 0; | 282 | u32 cyc = 0; |
277 | 283 | ||
278 | if (clksrc.reserved) | 284 | if (clksrc.reserved) |
279 | cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | 285 | cyc = __omap_dm_timer_read_counter(&clksrc, 1); |
280 | 286 | ||
281 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | 287 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); |
282 | } | 288 | } |
@@ -293,7 +299,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, | |||
293 | pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", | 299 | pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", |
294 | gptimer_id, clksrc.rate); | 300 | gptimer_id, clksrc.rate); |
295 | 301 | ||
296 | __omap_dm_timer_load_start(clksrc.io_base, | 302 | __omap_dm_timer_load_start(&clksrc, |
297 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); | 303 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); |
298 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | 304 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); |
299 | 305 | ||
@@ -341,3 +347,167 @@ static void __init omap4_timer_init(void) | |||
341 | } | 347 | } |
342 | OMAP_SYS_TIMER(4) | 348 | OMAP_SYS_TIMER(4) |
343 | #endif | 349 | #endif |
350 | |||
351 | /** | ||
352 | * omap2_dm_timer_set_src - change the timer input clock source | ||
353 | * @pdev: timer platform device pointer | ||
354 | * @source: array index of parent clock source | ||
355 | */ | ||
356 | static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) | ||
357 | { | ||
358 | int ret; | ||
359 | struct dmtimer_platform_data *pdata = pdev->dev.platform_data; | ||
360 | struct clk *fclk, *parent; | ||
361 | char *parent_name = NULL; | ||
362 | |||
363 | fclk = clk_get(&pdev->dev, "fck"); | ||
364 | if (IS_ERR_OR_NULL(fclk)) { | ||
365 | dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n", | ||
366 | __func__, __LINE__); | ||
367 | return -EINVAL; | ||
368 | } | ||
369 | |||
370 | switch (source) { | ||
371 | case OMAP_TIMER_SRC_SYS_CLK: | ||
372 | parent_name = "sys_ck"; | ||
373 | break; | ||
374 | |||
375 | case OMAP_TIMER_SRC_32_KHZ: | ||
376 | parent_name = "32k_ck"; | ||
377 | break; | ||
378 | |||
379 | case OMAP_TIMER_SRC_EXT_CLK: | ||
380 | if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) { | ||
381 | parent_name = "alt_ck"; | ||
382 | break; | ||
383 | } | ||
384 | dev_err(&pdev->dev, "%s: %d: invalid clk src.\n", | ||
385 | __func__, __LINE__); | ||
386 | clk_put(fclk); | ||
387 | return -EINVAL; | ||
388 | } | ||
389 | |||
390 | parent = clk_get(&pdev->dev, parent_name); | ||
391 | if (IS_ERR_OR_NULL(parent)) { | ||
392 | dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n", | ||
393 | __func__, __LINE__, parent_name); | ||
394 | clk_put(fclk); | ||
395 | return -EINVAL; | ||
396 | } | ||
397 | |||
398 | ret = clk_set_parent(fclk, parent); | ||
399 | if (IS_ERR_VALUE(ret)) { | ||
400 | dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n", | ||
401 | __func__, parent_name); | ||
402 | ret = -EINVAL; | ||
403 | } | ||
404 | |||
405 | clk_put(parent); | ||
406 | clk_put(fclk); | ||
407 | |||
408 | return ret; | ||
409 | } | ||
410 | |||
411 | struct omap_device_pm_latency omap2_dmtimer_latency[] = { | ||
412 | { | ||
413 | .deactivate_func = omap_device_idle_hwmods, | ||
414 | .activate_func = omap_device_enable_hwmods, | ||
415 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, | ||
416 | }, | ||
417 | }; | ||
418 | |||
419 | /** | ||
420 | * omap_timer_init - build and register timer device with an | ||
421 | * associated timer hwmod | ||
422 | * @oh: timer hwmod pointer to be used to build timer device | ||
423 | * @user: parameter that can be passed from calling hwmod API | ||
424 | * | ||
425 | * Called by omap_hwmod_for_each_by_class to register each of the timer | ||
426 | * devices present in the system. The number of timer devices is known | ||
427 | * by parsing through the hwmod database for a given class name. At the | ||
428 | * end of function call memory is allocated for timer device and it is | ||
429 | * registered to the framework ready to be proved by the driver. | ||
430 | */ | ||
431 | static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) | ||
432 | { | ||
433 | int id; | ||
434 | int ret = 0; | ||
435 | char *name = "omap_timer"; | ||
436 | struct dmtimer_platform_data *pdata; | ||
437 | struct omap_device *od; | ||
438 | struct omap_timer_capability_dev_attr *timer_dev_attr; | ||
439 | struct powerdomain *pwrdm; | ||
440 | |||
441 | pr_debug("%s: %s\n", __func__, oh->name); | ||
442 | |||
443 | /* on secure device, do not register secure timer */ | ||
444 | timer_dev_attr = oh->dev_attr; | ||
445 | if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr) | ||
446 | if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE) | ||
447 | return ret; | ||
448 | |||
449 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | ||
450 | if (!pdata) { | ||
451 | pr_err("%s: No memory for [%s]\n", __func__, oh->name); | ||
452 | return -ENOMEM; | ||
453 | } | ||
454 | |||
455 | /* | ||
456 | * Extract the IDs from name field in hwmod database | ||
457 | * and use the same for constructing ids' for the | ||
458 | * timer devices. In a way, we are avoiding usage of | ||
459 | * static variable witin the function to do the same. | ||
460 | * CAUTION: We have to be careful and make sure the | ||
461 | * name in hwmod database does not change in which case | ||
462 | * we might either make corresponding change here or | ||
463 | * switch back static variable mechanism. | ||
464 | */ | ||
465 | sscanf(oh->name, "timer%2d", &id); | ||
466 | |||
467 | pdata->set_timer_src = omap2_dm_timer_set_src; | ||
468 | pdata->timer_ip_version = oh->class->rev; | ||
469 | |||
470 | /* Mark clocksource and clockevent timers as reserved */ | ||
471 | if ((sys_timer_reserved >> (id - 1)) & 0x1) | ||
472 | pdata->reserved = 1; | ||
473 | |||
474 | pwrdm = omap_hwmod_get_pwrdm(oh); | ||
475 | pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); | ||
476 | #ifdef CONFIG_PM | ||
477 | pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; | ||
478 | #endif | ||
479 | od = omap_device_build(name, id, oh, pdata, sizeof(*pdata), | ||
480 | omap2_dmtimer_latency, | ||
481 | ARRAY_SIZE(omap2_dmtimer_latency), | ||
482 | 0); | ||
483 | |||
484 | if (IS_ERR(od)) { | ||
485 | pr_err("%s: Can't build omap_device for %s: %s.\n", | ||
486 | __func__, name, oh->name); | ||
487 | ret = -EINVAL; | ||
488 | } | ||
489 | |||
490 | kfree(pdata); | ||
491 | |||
492 | return ret; | ||
493 | } | ||
494 | |||
495 | /** | ||
496 | * omap2_dm_timer_init - top level regular device initialization | ||
497 | * | ||
498 | * Uses dedicated hwmod api to parse through hwmod database for | ||
499 | * given class name and then build and register the timer device. | ||
500 | */ | ||
501 | static int __init omap2_dm_timer_init(void) | ||
502 | { | ||
503 | int ret; | ||
504 | |||
505 | ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); | ||
506 | if (unlikely(ret)) { | ||
507 | pr_err("%s: device registration failed.\n", __func__); | ||
508 | return -EINVAL; | ||
509 | } | ||
510 | |||
511 | return 0; | ||
512 | } | ||
513 | arch_initcall(omap2_dm_timer_init); | ||