aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig28
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.c1
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c16
-rw-r--r--arch/arm/mach-omap2/board-generic.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c6
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c13
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c6
-rw-r--r--arch/arm/mach-omap2/clockdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c18
-rw-r--r--arch/arm/mach-omap2/common.h3
-rw-r--r--arch/arm/mach-omap2/devices.c3
-rw-r--r--arch/arm/mach-omap2/display.c167
-rw-r--r--arch/arm/mach-omap2/display.h3
-rw-r--r--arch/arm/mach-omap2/dma.c183
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c2
-rw-r--r--arch/arm/mach-omap2/dss-common.c224
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c31
-rw-r--r--arch/arm/mach-omap2/id.c16
-rw-r--r--arch/arm/mach-omap2/include/mach/timex.h5
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/irq.c8
-rw-r--r--arch/arm/mach-omap2/mux.h3
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c5
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c4
-rw-r--r--arch/arm/mach-omap2/omap4-common.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_43xx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c83
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c120
-rw-r--r--arch/arm/mach-omap2/pm.h2
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c3
-rw-r--r--arch/arm/mach-omap2/soc.h3
-rw-r--r--arch/arm/mach-omap2/timer.c3
36 files changed, 556 insertions, 444 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 0af7ca02314d..cb31d4390d52 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -6,7 +6,6 @@ config ARCH_OMAP2
6 depends on ARCH_MULTI_V6 6 depends on ARCH_MULTI_V6
7 select ARCH_OMAP2PLUS 7 select ARCH_OMAP2PLUS
8 select CPU_V6 8 select CPU_V6
9 select MULTI_IRQ_HANDLER
10 select SOC_HAS_OMAP2_SDRC 9 select SOC_HAS_OMAP2_SDRC
11 10
12config ARCH_OMAP3 11config ARCH_OMAP3
@@ -15,13 +14,10 @@ config ARCH_OMAP3
15 select ARCH_OMAP2PLUS 14 select ARCH_OMAP2PLUS
16 select ARCH_HAS_OPP 15 select ARCH_HAS_OPP
17 select ARM_CPU_SUSPEND if PM 16 select ARM_CPU_SUSPEND if PM
18 select CPU_V7
19 select MULTI_IRQ_HANDLER
20 select OMAP_INTERCONNECT 17 select OMAP_INTERCONNECT
21 select PM_OPP if PM 18 select PM_OPP if PM
22 select PM_RUNTIME if CPU_IDLE 19 select PM_RUNTIME if CPU_IDLE
23 select SOC_HAS_OMAP2_SDRC 20 select SOC_HAS_OMAP2_SDRC
24 select USB_ARCH_HAS_EHCI if USB_SUPPORT
25 21
26config ARCH_OMAP4 22config ARCH_OMAP4
27 bool "TI OMAP4" 23 bool "TI OMAP4"
@@ -33,16 +29,13 @@ config ARCH_OMAP4
33 select ARM_ERRATA_720789 29 select ARM_ERRATA_720789
34 select ARM_GIC 30 select ARM_GIC
35 select CACHE_L2X0 31 select CACHE_L2X0
36 select CPU_V7
37 select HAVE_ARM_SCU if SMP 32 select HAVE_ARM_SCU if SMP
38 select HAVE_ARM_TWD if SMP 33 select HAVE_ARM_TWD if SMP
39 select HAVE_SMP
40 select OMAP_INTERCONNECT 34 select OMAP_INTERCONNECT
41 select PL310_ERRATA_588369 35 select PL310_ERRATA_588369
42 select PL310_ERRATA_727915 36 select PL310_ERRATA_727915
43 select PM_OPP if PM 37 select PM_OPP if PM
44 select PM_RUNTIME if CPU_IDLE 38 select PM_RUNTIME if CPU_IDLE
45 select USB_ARCH_HAS_EHCI if USB_SUPPORT
46 select ARM_ERRATA_754322 39 select ARM_ERRATA_754322
47 select ARM_ERRATA_775420 40 select ARM_ERRATA_775420
48 41
@@ -53,10 +46,8 @@ config SOC_OMAP5
53 select ARCH_HAS_OPP 46 select ARCH_HAS_OPP
54 select ARM_CPU_SUSPEND if PM 47 select ARM_CPU_SUSPEND if PM
55 select ARM_GIC 48 select ARM_GIC
56 select CPU_V7
57 select HAVE_ARM_SCU if SMP 49 select HAVE_ARM_SCU if SMP
58 select HAVE_ARM_TWD if SMP 50 select HAVE_ARM_TWD if SMP
59 select HAVE_SMP
60 select HAVE_ARM_ARCH_TIMER 51 select HAVE_ARM_ARCH_TIMER
61 select ARM_ERRATA_798181 if SMP 52 select ARM_ERRATA_798181 if SMP
62 53
@@ -66,16 +57,12 @@ config SOC_AM33XX
66 select ARCH_OMAP2PLUS 57 select ARCH_OMAP2PLUS
67 select ARCH_HAS_OPP 58 select ARCH_HAS_OPP
68 select ARM_CPU_SUSPEND if PM 59 select ARM_CPU_SUSPEND if PM
69 select CPU_V7
70 select MULTI_IRQ_HANDLER
71 60
72config SOC_AM43XX 61config SOC_AM43XX
73 bool "TI AM43x" 62 bool "TI AM43x"
74 depends on ARCH_MULTI_V7 63 depends on ARCH_MULTI_V7
75 select CPU_V7
76 select ARCH_OMAP2PLUS 64 select ARCH_OMAP2PLUS
77 select ARCH_HAS_OPP 65 select ARCH_HAS_OPP
78 select MULTI_IRQ_HANDLER
79 select ARM_GIC 66 select ARM_GIC
80 select MACH_OMAP_GENERIC 67 select MACH_OMAP_GENERIC
81 68
@@ -86,9 +73,8 @@ config SOC_DRA7XX
86 select ARCH_HAS_OPP 73 select ARCH_HAS_OPP
87 select ARM_CPU_SUSPEND if PM 74 select ARM_CPU_SUSPEND if PM
88 select ARM_GIC 75 select ARM_GIC
89 select CPU_V7
90 select HAVE_SMP
91 select HAVE_ARM_ARCH_TIMER 76 select HAVE_ARM_ARCH_TIMER
77 select IRQ_CROSSBAR
92 78
93config ARCH_OMAP2PLUS 79config ARCH_OMAP2PLUS
94 bool 80 bool
@@ -98,17 +84,12 @@ config ARCH_OMAP2PLUS
98 select ARCH_OMAP 84 select ARCH_OMAP
99 select ARCH_REQUIRE_GPIOLIB 85 select ARCH_REQUIRE_GPIOLIB
100 select CLKSRC_MMIO 86 select CLKSRC_MMIO
101 select COMMON_CLK
102 select GENERIC_CLOCKEVENTS
103 select GENERIC_IRQ_CHIP 87 select GENERIC_IRQ_CHIP
104 select MACH_OMAP_GENERIC 88 select MACH_OMAP_GENERIC
105 select OMAP_DM_TIMER 89 select OMAP_DM_TIMER
106 select PINCTRL 90 select PINCTRL
107 select PROC_DEVICETREE if PROC_FS
108 select SOC_BUS 91 select SOC_BUS
109 select SPARSE_IRQ
110 select TI_PRIV_EDMA 92 select TI_PRIV_EDMA
111 select USE_OF
112 help 93 help
113 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 94 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
114 95
@@ -169,12 +150,6 @@ config SOC_TI81XX
169 depends on ARCH_OMAP3 150 depends on ARCH_OMAP3
170 default y 151 default y
171 152
172config OMAP_PACKAGE_ZAF
173 bool
174
175config OMAP_PACKAGE_ZAC
176 bool
177
178config OMAP_PACKAGE_CBC 153config OMAP_PACKAGE_CBC
179 bool 154 bool
180 155
@@ -284,7 +259,6 @@ config MACH_NOKIA_N8X0
284 default y 259 default y
285 select MACH_NOKIA_N810 260 select MACH_NOKIA_N810
286 select MACH_NOKIA_N810_WIMAX 261 select MACH_NOKIA_N810_WIMAX
287 select OMAP_PACKAGE_ZAC
288 262
289config MACH_NOKIA_RX51 263config MACH_NOKIA_RX51
290 bool "Nokia N900 (RX-51) phone" 264 bool "Nokia N900 (RX-51) phone"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e6eec6f72fd3..8421f38cf445 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -60,6 +60,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
60obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o 60obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o
61obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o 61obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o
62obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o 62obj-$(CONFIG_SOC_AM33XX) += am33xx-restart.o
63obj-$(CONFIG_SOC_AM43XX) += omap4-restart.o
63obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o 64obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
64obj-$(CONFIG_ARCH_OMAP4) += omap4-restart.o 65obj-$(CONFIG_ARCH_OMAP4) += omap4-restart.o
65obj-$(CONFIG_SOC_OMAP5) += omap4-restart.o 66obj-$(CONFIG_SOC_OMAP5) += omap4-restart.o
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index 25b79a297365..6a6935caac1e 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -17,7 +17,6 @@
17 17
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/davinci_emac.h> 19#include <linux/davinci_emac.h>
20#include <asm/system.h>
21#include "omap_device.h" 20#include "omap_device.h"
22#include "am35xx.h" 21#include "am35xx.h"
23#include "control.h" 22#include "control.h"
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 8dd0ec858cf1..018353d88b96 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -16,6 +16,8 @@
16 * 16 *
17 */ 17 */
18 18
19#include <linux/clk-provider.h>
20#include <linux/clkdev.h>
19#include <linux/kernel.h> 21#include <linux/kernel.h>
20#include <linux/init.h> 22#include <linux/init.h>
21#include <linux/platform_device.h> 23#include <linux/platform_device.h>
@@ -542,8 +544,22 @@ static struct isp_platform_data cm_t35_isp_pdata = {
542 .subdevs = cm_t35_isp_subdevs, 544 .subdevs = cm_t35_isp_subdevs,
543}; 545};
544 546
547static struct regulator_consumer_supply cm_t35_camera_supplies[] = {
548 REGULATOR_SUPPLY("vaa", "3-005d"),
549 REGULATOR_SUPPLY("vdd", "3-005d"),
550};
551
545static void __init cm_t35_init_camera(void) 552static void __init cm_t35_init_camera(void)
546{ 553{
554 struct clk *clk;
555
556 clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,
557 48000000);
558 clk_register_clkdev(clk, NULL, "3-005d");
559
560 regulator_register_fixed(2, cm_t35_camera_supplies,
561 ARRAY_SIZE(cm_t35_camera_supplies));
562
547 if (omap3_init_camera(&cm_t35_isp_pdata) < 0) 563 if (omap3_init_camera(&cm_t35_isp_pdata) < 0)
548 pr_warn("CM-T3x: Failed registering camera device!\n"); 564 pr_warn("CM-T3x: Failed registering camera device!\n");
549} 565}
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 8e3daa11602b..b8920b6bc104 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -35,7 +35,11 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
35 35
36static void __init omap_generic_init(void) 36static void __init omap_generic_init(void)
37{ 37{
38 omapdss_early_init_of();
39
38 pdata_quirks_init(omap_dt_match_table); 40 pdata_quirks_init(omap_dt_match_table);
41
42 omapdss_init_of();
39} 43}
40 44
41#ifdef CONFIG_SOC_OMAP2420 45#ifdef CONFIG_SOC_OMAP2420
@@ -229,8 +233,9 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
229 .init_late = am43xx_init_late, 233 .init_late = am43xx_init_late,
230 .init_irq = omap_gic_of_init, 234 .init_irq = omap_gic_of_init,
231 .init_machine = omap_generic_init, 235 .init_machine = omap_generic_init,
232 .init_time = omap3_sync32k_timer_init, 236 .init_time = omap3_gptimer_timer_init,
233 .dt_compat = am43_boards_compat, 237 .dt_compat = am43_boards_compat,
238 .restart = omap44xx_restart,
234MACHINE_END 239MACHINE_END
235#endif 240#endif
236 241
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index de1bc6bbe585..cf18340eb3bb 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -536,11 +536,13 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
536 536
537static void __init pandora_wl1251_init(void) 537static void __init pandora_wl1251_init(void)
538{ 538{
539 struct wl12xx_platform_data pandora_wl1251_pdata; 539 struct wl1251_platform_data pandora_wl1251_pdata;
540 int ret; 540 int ret;
541 541
542 memset(&pandora_wl1251_pdata, 0, sizeof(pandora_wl1251_pdata)); 542 memset(&pandora_wl1251_pdata, 0, sizeof(pandora_wl1251_pdata));
543 543
544 pandora_wl1251_pdata.power_gpio = -1;
545
544 ret = gpio_request_one(PANDORA_WIFI_IRQ_GPIO, GPIOF_IN, "wl1251 irq"); 546 ret = gpio_request_one(PANDORA_WIFI_IRQ_GPIO, GPIOF_IN, "wl1251 irq");
545 if (ret < 0) 547 if (ret < 0)
546 goto fail; 548 goto fail;
@@ -550,7 +552,7 @@ static void __init pandora_wl1251_init(void)
550 goto fail_irq; 552 goto fail_irq;
551 553
552 pandora_wl1251_pdata.use_eeprom = true; 554 pandora_wl1251_pdata.use_eeprom = true;
553 ret = wl12xx_set_platform_data(&pandora_wl1251_pdata); 555 ret = wl1251_set_platform_data(&pandora_wl1251_pdata);
554 if (ret < 0) 556 if (ret < 0)
555 goto fail_irq; 557 goto fail_irq;
556 558
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 8760bbe3baab..ddfc8df83c6a 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -84,7 +84,7 @@ enum {
84 RX51_SPI_MIPID, /* LCD panel */ 84 RX51_SPI_MIPID, /* LCD panel */
85}; 85};
86 86
87static struct wl12xx_platform_data wl1251_pdata; 87static struct wl1251_platform_data wl1251_pdata;
88static struct tsc2005_platform_data tsc2005_pdata; 88static struct tsc2005_platform_data tsc2005_pdata;
89 89
90#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) 90#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
@@ -1173,13 +1173,7 @@ static inline void board_smc91x_init(void)
1173 1173
1174#endif 1174#endif
1175 1175
1176static void rx51_wl1251_set_power(bool enable)
1177{
1178 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1179}
1180
1181static struct gpio rx51_wl1251_gpios[] __initdata = { 1176static struct gpio rx51_wl1251_gpios[] __initdata = {
1182 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1183 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, 1177 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1184}; 1178};
1185 1179
@@ -1196,17 +1190,16 @@ static void __init rx51_init_wl1251(void)
1196 if (irq < 0) 1190 if (irq < 0)
1197 goto err_irq; 1191 goto err_irq;
1198 1192
1199 wl1251_pdata.set_power = rx51_wl1251_set_power; 1193 wl1251_pdata.power_gpio = RX51_WL1251_POWER_GPIO;
1200 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; 1194 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1201 1195
1202 return; 1196 return;
1203 1197
1204err_irq: 1198err_irq:
1205 gpio_free(RX51_WL1251_IRQ_GPIO); 1199 gpio_free(RX51_WL1251_IRQ_GPIO);
1206 gpio_free(RX51_WL1251_POWER_GPIO);
1207error: 1200error:
1208 printk(KERN_ERR "wl1251 board initialisation failed\n"); 1201 printk(KERN_ERR "wl1251 board initialisation failed\n");
1209 wl1251_pdata.set_power = NULL; 1202 wl1251_pdata.power_gpio = -1;
1210 1203
1211 /* 1204 /*
1212 * Now rx51_peripherals_spi_board_info[1].irq is zero and 1205 * Now rx51_peripherals_spi_board_info[1].irq is zero and
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 11ed9152e665..8f5121b89688 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -3497,10 +3497,6 @@ static struct omap_clk omap3xxx_clks[] = {
3497 CLK(NULL, "dss_tv_fck", &dss_tv_fck), 3497 CLK(NULL, "dss_tv_fck", &dss_tv_fck),
3498 CLK(NULL, "dss_96m_fck", &dss_96m_fck), 3498 CLK(NULL, "dss_96m_fck", &dss_96m_fck),
3499 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck), 3499 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
3500 CLK(NULL, "utmi_p1_gfclk", &dummy_ck),
3501 CLK(NULL, "utmi_p2_gfclk", &dummy_ck),
3502 CLK(NULL, "xclk60mhsp1_ck", &dummy_ck),
3503 CLK(NULL, "xclk60mhsp2_ck", &dummy_ck),
3504 CLK(NULL, "init_60m_fclk", &dummy_ck), 3500 CLK(NULL, "init_60m_fclk", &dummy_ck),
3505 CLK(NULL, "gpt1_fck", &gpt1_fck), 3501 CLK(NULL, "gpt1_fck", &gpt1_fck),
3506 CLK(NULL, "aes2_ick", &aes2_ick), 3502 CLK(NULL, "aes2_ick", &aes2_ick),
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 47f9562ca7aa..2649ce445845 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -306,7 +306,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
306 306
307 ref_rate = __clk_get_rate(dd->clk_ref); 307 ref_rate = __clk_get_rate(dd->clk_ref);
308 clk_name = __clk_get_name(hw->clk); 308 clk_name = __clk_get_name(hw->clk);
309 pr_debug("clock: %s: starting DPLL round_rate, target rate %ld\n", 309 pr_debug("clock: %s: starting DPLL round_rate, target rate %lu\n",
310 clk_name, target_rate); 310 clk_name, target_rate);
311 311
312 scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); 312 scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR);
@@ -342,7 +342,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
342 if (r == DPLL_MULT_UNDERFLOW) 342 if (r == DPLL_MULT_UNDERFLOW)
343 continue; 343 continue;
344 344
345 pr_debug("clock: %s: m = %d: n = %d: new_rate = %ld\n", 345 pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n",
346 clk_name, m, n, new_rate); 346 clk_name, m, n, new_rate);
347 347
348 if (target_rate == new_rate) { 348 if (target_rate == new_rate) {
@@ -354,7 +354,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
354 } 354 }
355 355
356 if (target_rate != new_rate) { 356 if (target_rate != new_rate) {
357 pr_debug("clock: %s: cannot round to rate %ld\n", 357 pr_debug("clock: %s: cannot round to rate %lu\n",
358 clk_name, target_rate); 358 clk_name, target_rate);
359 return ~0; 359 return ~0;
360 } 360 }
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index e6b91e552d3d..f03dc97921ad 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -247,7 +247,7 @@ static struct clockdomain neon_clkdm = {
247static struct clockdomain iva2_clkdm = { 247static struct clockdomain iva2_clkdm = {
248 .name = "iva2_clkdm", 248 .name = "iva2_clkdm",
249 .pwrdm = { .name = "iva2_pwrdm" }, 249 .pwrdm = { .name = "iva2_pwrdm" },
250 .flags = CLKDM_CAN_HWSUP_SWSUP, 250 .flags = CLKDM_CAN_SWSUP,
251 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, 251 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
252 .wkdep_srcs = iva2_wkdeps, 252 .wkdep_srcs = iva2_wkdeps,
253 .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, 253 .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 731ca134348c..f5c4731b6f06 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -254,6 +254,11 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
254 * 254 *
255 */ 255 */
256 256
257void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
258{
259 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
260}
261
257/** 262/**
258 * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state 263 * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
259 * @part: PRCM partition ID that the CM_CLKCTRL register exists in 264 * @part: PRCM partition ID that the CM_CLKCTRL register exists in
@@ -404,8 +409,17 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
404 409
405static int omap4_clkdm_sleep(struct clockdomain *clkdm) 410static int omap4_clkdm_sleep(struct clockdomain *clkdm)
406{ 411{
407 omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, 412 if (clkdm->flags & CLKDM_CAN_HWSUP)
408 clkdm->cm_inst, clkdm->clkdm_offs); 413 omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
414 clkdm->cm_inst,
415 clkdm->clkdm_offs);
416 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
417 omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
418 clkdm->cm_inst,
419 clkdm->clkdm_offs);
420 else
421 return -EINVAL;
422
409 return 0; 423 return 0;
410} 424}
411 425
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index a6aae300542c..d88aff7baff8 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -315,5 +315,8 @@ extern int omap_dss_reset(struct omap_hwmod *);
315/* SoC specific clock initializer */ 315/* SoC specific clock initializer */
316int omap_clk_init(void); 316int omap_clk_init(void);
317 317
318int __init omapdss_init_of(void);
319void __init omapdss_early_init_of(void);
320
318#endif /* __ASSEMBLER__ */ 321#endif /* __ASSEMBLER__ */
319#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 322#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0dd6398bade4..e58609b312c7 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -229,6 +229,9 @@ static struct omap_iommu_arch_data omap3_isp_iommu = {
229 229
230int omap3_init_camera(struct isp_platform_data *pdata) 230int omap3_init_camera(struct isp_platform_data *pdata)
231{ 231{
232 if (of_have_populated_dt())
233 omap3_isp_iommu.name = "480bd400.mmu";
234
232 omap3isp_device.dev.platform_data = pdata; 235 omap3isp_device.dev.platform_data = pdata;
233 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu; 236 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
234 237
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 4cf165502b35..16d33d831287 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -23,6 +23,9 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/slab.h>
26 29
27#include <video/omapdss.h> 30#include <video/omapdss.h>
28#include "omap_hwmod.h" 31#include "omap_hwmod.h"
@@ -301,7 +304,6 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
301 board_data->version = ver; 304 board_data->version = ver;
302 board_data->dsi_enable_pads = omap_dsi_enable_pads; 305 board_data->dsi_enable_pads = omap_dsi_enable_pads;
303 board_data->dsi_disable_pads = omap_dsi_disable_pads; 306 board_data->dsi_disable_pads = omap_dsi_disable_pads;
304 board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count;
305 board_data->set_min_bus_tput = omap_dss_set_min_bus_tput; 307 board_data->set_min_bus_tput = omap_dss_set_min_bus_tput;
306 308
307 omap_display_device.dev.platform_data = board_data; 309 omap_display_device.dev.platform_data = board_data;
@@ -552,3 +554,166 @@ int omap_dss_reset(struct omap_hwmod *oh)
552 554
553 return r; 555 return r;
554} 556}
557
558/* list of 'compatible' nodes to convert to omapdss specific */
559static const char * const dss_compat_conv_list[] __initconst = {
560 "composite-connector",
561 "dvi-connector",
562 "hdmi-connector",
563 "panel-dpi",
564 "panel-dsi-cm",
565 "sony,acx565akm",
566 "svideo-connector",
567 "ti,tfp410",
568 "ti,tpd12s015",
569};
570
571/* prepend compatible string with "omapdss," */
572static __init void omapdss_omapify_node(struct device_node *node,
573 const char *compat)
574{
575 char *new_compat;
576 struct property *prop;
577
578 new_compat = kasprintf(GFP_KERNEL, "omapdss,%s", compat);
579
580 prop = kzalloc(sizeof(*prop), GFP_KERNEL);
581
582 if (!prop) {
583 pr_err("omapdss_omapify_node: kzalloc failed\n");
584 return;
585 }
586
587 prop->name = "compatible";
588 prop->value = new_compat;
589 prop->length = strlen(new_compat) + 1;
590
591 of_update_property(node, prop);
592}
593
594/*
595 * As omapdss panel drivers are omapdss specific, but we want to define the
596 * DT-data in generic manner, we convert the compatible strings of the panel
597 * nodes from "panel-foo" to "omapdss,panel-foo". This way we can have both
598 * correct DT data and omapdss specific drivers.
599 *
600 * When we get generic panel drivers to the kernel, this will be removed.
601 */
602void __init omapdss_early_init_of(void)
603{
604 int i;
605
606 for (i = 0; i < ARRAY_SIZE(dss_compat_conv_list); ++i) {
607 const char *compat = dss_compat_conv_list[i];
608 struct device_node *node = NULL;
609
610 while ((node = of_find_compatible_node(node, NULL, compat))) {
611 if (!of_device_is_available(node))
612 continue;
613
614 omapdss_omapify_node(node, compat);
615 }
616 }
617}
618
619struct device_node * __init omapdss_find_dss_of_node(void)
620{
621 struct device_node *node;
622
623 node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
624 if (node)
625 return node;
626
627 node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
628 if (node)
629 return node;
630
631 node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
632 if (node)
633 return node;
634
635 return NULL;
636}
637
638int __init omapdss_init_of(void)
639{
640 int r;
641 enum omapdss_version ver;
642 struct device_node *node;
643 struct platform_device *pdev;
644
645 static struct omap_dss_board_info board_data = {
646 .dsi_enable_pads = omap_dsi_enable_pads,
647 .dsi_disable_pads = omap_dsi_disable_pads,
648 .set_min_bus_tput = omap_dss_set_min_bus_tput,
649 };
650
651 /* only create dss helper devices if dss is enabled in the .dts */
652
653 node = omapdss_find_dss_of_node();
654 if (!node)
655 return 0;
656
657 if (!of_device_is_available(node))
658 return 0;
659
660 ver = omap_display_get_version();
661
662 if (ver == OMAPDSS_VER_UNKNOWN) {
663 pr_err("DSS not supported on this SoC\n");
664 return -ENODEV;
665 }
666
667 pdev = of_find_device_by_node(node);
668
669 if (!pdev) {
670 pr_err("Unable to find DSS platform device\n");
671 return -ENODEV;
672 }
673
674 r = of_platform_populate(node, NULL, NULL, &pdev->dev);
675 if (r) {
676 pr_err("Unable to populate DSS submodule devices\n");
677 return r;
678 }
679
680 board_data.version = ver;
681
682 omap_display_device.dev.platform_data = &board_data;
683
684 r = platform_device_register(&omap_display_device);
685 if (r < 0) {
686 pr_err("Unable to register omapdss device\n");
687 return r;
688 }
689
690 /* create DRM device */
691 r = omap_init_drm();
692 if (r < 0) {
693 pr_err("Unable to register omapdrm device\n");
694 return r;
695 }
696
697 /* create vrfb device */
698 r = omap_init_vrfb();
699 if (r < 0) {
700 pr_err("Unable to register omapvrfb device\n");
701 return r;
702 }
703
704 /* create FB device */
705 r = omap_init_fb();
706 if (r < 0) {
707 pr_err("Unable to register omapfb device\n");
708 return r;
709 }
710
711 /* create V4L2 display device */
712 r = omap_init_vout();
713 if (r < 0) {
714 pr_err("Unable to register omap_vout device\n");
715 return r;
716 }
717
718 return 0;
719}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
index f3d2ce4bc262..7375854b16c7 100644
--- a/arch/arm/mach-omap2/display.h
+++ b/arch/arm/mach-omap2/display.h
@@ -30,4 +30,7 @@ int omap_init_drm(void);
30int omap_init_vrfb(void); 30int omap_init_vrfb(void);
31int omap_init_fb(void); 31int omap_init_fb(void);
32int omap_init_vout(void); 32int omap_init_vout(void);
33
34struct device_node * __init omapdss_find_dss_of_node(void);
35
33#endif 36#endif
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 49fd0d501c9b..5689c88d986d 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -35,97 +35,80 @@
35#include "omap_hwmod.h" 35#include "omap_hwmod.h"
36#include "omap_device.h" 36#include "omap_device.h"
37 37
38#define OMAP2_DMA_STRIDE 0x60 38static enum omap_reg_offsets dma_common_ch_end;
39 39
40static u32 errata; 40static const struct omap_dma_reg reg_map[] = {
41static u8 dma_stride; 41 [REVISION] = { 0x0000, 0x00, OMAP_DMA_REG_32BIT },
42 42 [GCR] = { 0x0078, 0x00, OMAP_DMA_REG_32BIT },
43static struct omap_dma_dev_attr *d; 43 [IRQSTATUS_L0] = { 0x0008, 0x00, OMAP_DMA_REG_32BIT },
44 44 [IRQSTATUS_L1] = { 0x000c, 0x00, OMAP_DMA_REG_32BIT },
45static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end; 45 [IRQSTATUS_L2] = { 0x0010, 0x00, OMAP_DMA_REG_32BIT },
46 46 [IRQSTATUS_L3] = { 0x0014, 0x00, OMAP_DMA_REG_32BIT },
47static u16 reg_map[] = { 47 [IRQENABLE_L0] = { 0x0018, 0x00, OMAP_DMA_REG_32BIT },
48 [REVISION] = 0x00, 48 [IRQENABLE_L1] = { 0x001c, 0x00, OMAP_DMA_REG_32BIT },
49 [GCR] = 0x78, 49 [IRQENABLE_L2] = { 0x0020, 0x00, OMAP_DMA_REG_32BIT },
50 [IRQSTATUS_L0] = 0x08, 50 [IRQENABLE_L3] = { 0x0024, 0x00, OMAP_DMA_REG_32BIT },
51 [IRQSTATUS_L1] = 0x0c, 51 [SYSSTATUS] = { 0x0028, 0x00, OMAP_DMA_REG_32BIT },
52 [IRQSTATUS_L2] = 0x10, 52 [OCP_SYSCONFIG] = { 0x002c, 0x00, OMAP_DMA_REG_32BIT },
53 [IRQSTATUS_L3] = 0x14, 53 [CAPS_0] = { 0x0064, 0x00, OMAP_DMA_REG_32BIT },
54 [IRQENABLE_L0] = 0x18, 54 [CAPS_2] = { 0x006c, 0x00, OMAP_DMA_REG_32BIT },
55 [IRQENABLE_L1] = 0x1c, 55 [CAPS_3] = { 0x0070, 0x00, OMAP_DMA_REG_32BIT },
56 [IRQENABLE_L2] = 0x20, 56 [CAPS_4] = { 0x0074, 0x00, OMAP_DMA_REG_32BIT },
57 [IRQENABLE_L3] = 0x24,
58 [SYSSTATUS] = 0x28,
59 [OCP_SYSCONFIG] = 0x2c,
60 [CAPS_0] = 0x64,
61 [CAPS_2] = 0x6c,
62 [CAPS_3] = 0x70,
63 [CAPS_4] = 0x74,
64 57
65 /* Common register offsets */ 58 /* Common register offsets */
66 [CCR] = 0x80, 59 [CCR] = { 0x0080, 0x60, OMAP_DMA_REG_32BIT },
67 [CLNK_CTRL] = 0x84, 60 [CLNK_CTRL] = { 0x0084, 0x60, OMAP_DMA_REG_32BIT },
68 [CICR] = 0x88, 61 [CICR] = { 0x0088, 0x60, OMAP_DMA_REG_32BIT },
69 [CSR] = 0x8c, 62 [CSR] = { 0x008c, 0x60, OMAP_DMA_REG_32BIT },
70 [CSDP] = 0x90, 63 [CSDP] = { 0x0090, 0x60, OMAP_DMA_REG_32BIT },
71 [CEN] = 0x94, 64 [CEN] = { 0x0094, 0x60, OMAP_DMA_REG_32BIT },
72 [CFN] = 0x98, 65 [CFN] = { 0x0098, 0x60, OMAP_DMA_REG_32BIT },
73 [CSEI] = 0xa4, 66 [CSEI] = { 0x00a4, 0x60, OMAP_DMA_REG_32BIT },
74 [CSFI] = 0xa8, 67 [CSFI] = { 0x00a8, 0x60, OMAP_DMA_REG_32BIT },
75 [CDEI] = 0xac, 68 [CDEI] = { 0x00ac, 0x60, OMAP_DMA_REG_32BIT },
76 [CDFI] = 0xb0, 69 [CDFI] = { 0x00b0, 0x60, OMAP_DMA_REG_32BIT },
77 [CSAC] = 0xb4, 70 [CSAC] = { 0x00b4, 0x60, OMAP_DMA_REG_32BIT },
78 [CDAC] = 0xb8, 71 [CDAC] = { 0x00b8, 0x60, OMAP_DMA_REG_32BIT },
79 72
80 /* Channel specific register offsets */ 73 /* Channel specific register offsets */
81 [CSSA] = 0x9c, 74 [CSSA] = { 0x009c, 0x60, OMAP_DMA_REG_32BIT },
82 [CDSA] = 0xa0, 75 [CDSA] = { 0x00a0, 0x60, OMAP_DMA_REG_32BIT },
83 [CCEN] = 0xbc, 76 [CCEN] = { 0x00bc, 0x60, OMAP_DMA_REG_32BIT },
84 [CCFN] = 0xc0, 77 [CCFN] = { 0x00c0, 0x60, OMAP_DMA_REG_32BIT },
85 [COLOR] = 0xc4, 78 [COLOR] = { 0x00c4, 0x60, OMAP_DMA_REG_32BIT },
86 79
87 /* OMAP4 specific registers */ 80 /* OMAP4 specific registers */
88 [CDP] = 0xd0, 81 [CDP] = { 0x00d0, 0x60, OMAP_DMA_REG_32BIT },
89 [CNDP] = 0xd4, 82 [CNDP] = { 0x00d4, 0x60, OMAP_DMA_REG_32BIT },
90 [CCDN] = 0xd8, 83 [CCDN] = { 0x00d8, 0x60, OMAP_DMA_REG_32BIT },
91}; 84};
92 85
93static void __iomem *dma_base; 86static void __iomem *dma_base;
94static inline void dma_write(u32 val, int reg, int lch) 87static inline void dma_write(u32 val, int reg, int lch)
95{ 88{
96 u8 stride; 89 void __iomem *addr = dma_base;
97 u32 offset;
98 90
99 stride = (reg >= dma_common_ch_start) ? dma_stride : 0; 91 addr += reg_map[reg].offset;
100 offset = reg_map[reg] + (stride * lch); 92 addr += reg_map[reg].stride * lch;
101 __raw_writel(val, dma_base + offset); 93
94 __raw_writel(val, addr);
102} 95}
103 96
104static inline u32 dma_read(int reg, int lch) 97static inline u32 dma_read(int reg, int lch)
105{ 98{
106 u8 stride; 99 void __iomem *addr = dma_base;
107 u32 offset, val;
108
109 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
110 offset = reg_map[reg] + (stride * lch);
111 val = __raw_readl(dma_base + offset);
112 return val;
113}
114 100
115static inline void omap2_disable_irq_lch(int lch) 101 addr += reg_map[reg].offset;
116{ 102 addr += reg_map[reg].stride * lch;
117 u32 val;
118 103
119 val = dma_read(IRQENABLE_L0, lch); 104 return __raw_readl(addr);
120 val &= ~(1 << lch);
121 dma_write(val, IRQENABLE_L0, lch);
122} 105}
123 106
124static void omap2_clear_dma(int lch) 107static void omap2_clear_dma(int lch)
125{ 108{
126 int i = dma_common_ch_start; 109 int i;
127 110
128 for (; i <= dma_common_ch_end; i += 1) 111 for (i = CSDP; i <= dma_common_ch_end; i += 1)
129 dma_write(0, i, lch); 112 dma_write(0, i, lch);
130} 113}
131 114
@@ -137,8 +120,9 @@ static void omap2_show_dma_caps(void)
137 return; 120 return;
138} 121}
139 122
140static u32 configure_dma_errata(void) 123static unsigned configure_dma_errata(void)
141{ 124{
125 unsigned errata = 0;
142 126
143 /* 127 /*
144 * Errata applicable for OMAP2430ES1.0 and all omap2420 128 * Errata applicable for OMAP2430ES1.0 and all omap2420
@@ -220,48 +204,50 @@ static u32 configure_dma_errata(void)
220 return errata; 204 return errata;
221} 205}
222 206
207static struct omap_system_dma_plat_info dma_plat_info __initdata = {
208 .reg_map = reg_map,
209 .channel_stride = 0x60,
210 .show_dma_caps = omap2_show_dma_caps,
211 .clear_dma = omap2_clear_dma,
212 .dma_write = dma_write,
213 .dma_read = dma_read,
214};
215
216static struct platform_device_info omap_dma_dev_info = {
217 .name = "omap-dma-engine",
218 .id = -1,
219 .dma_mask = DMA_BIT_MASK(32),
220};
221
223/* One time initializations */ 222/* One time initializations */
224static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) 223static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
225{ 224{
226 struct platform_device *pdev; 225 struct platform_device *pdev;
227 struct omap_system_dma_plat_info *p; 226 struct omap_system_dma_plat_info p;
227 struct omap_dma_dev_attr *d;
228 struct resource *mem; 228 struct resource *mem;
229 char *name = "omap_dma_system"; 229 char *name = "omap_dma_system";
230 230
231 dma_stride = OMAP2_DMA_STRIDE; 231 p = dma_plat_info;
232 dma_common_ch_start = CSDP; 232 p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
233 233 p.errata = configure_dma_errata();
234 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
235 if (!p) {
236 pr_err("%s: Unable to allocate pdata for %s:%s\n",
237 __func__, name, oh->name);
238 return -ENOMEM;
239 }
240
241 p->dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
242 p->disable_irq_lch = omap2_disable_irq_lch;
243 p->show_dma_caps = omap2_show_dma_caps;
244 p->clear_dma = omap2_clear_dma;
245 p->dma_write = dma_write;
246 p->dma_read = dma_read;
247
248 p->clear_lch_regs = NULL;
249
250 p->errata = configure_dma_errata();
251 234
252 pdev = omap_device_build(name, 0, oh, p, sizeof(*p)); 235 pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
253 kfree(p);
254 if (IS_ERR(pdev)) { 236 if (IS_ERR(pdev)) {
255 pr_err("%s: Can't build omap_device for %s:%s.\n", 237 pr_err("%s: Can't build omap_device for %s:%s.\n",
256 __func__, name, oh->name); 238 __func__, name, oh->name);
257 return PTR_ERR(pdev); 239 return PTR_ERR(pdev);
258 } 240 }
259 241
242 omap_dma_dev_info.res = pdev->resource;
243 omap_dma_dev_info.num_res = pdev->num_resources;
244
260 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 245 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
261 if (!mem) { 246 if (!mem) {
262 dev_err(&pdev->dev, "%s: no mem resource\n", __func__); 247 dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
263 return -EINVAL; 248 return -EINVAL;
264 } 249 }
250
265 dma_base = ioremap(mem->start, resource_size(mem)); 251 dma_base = ioremap(mem->start, resource_size(mem));
266 if (!dma_base) { 252 if (!dma_base) {
267 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); 253 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
@@ -269,13 +255,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
269 } 255 }
270 256
271 d = oh->dev_attr; 257 d = oh->dev_attr;
272 d->chan = kzalloc(sizeof(struct omap_dma_lch) *
273 (d->lch_count), GFP_KERNEL);
274
275 if (!d->chan) {
276 dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
277 return -ENOMEM;
278 }
279 258
280 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) 259 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
281 d->dev_caps |= HS_CHANNELS_RESERVED; 260 d->dev_caps |= HS_CHANNELS_RESERVED;
@@ -289,12 +268,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
289 return 0; 268 return 0;
290} 269}
291 270
292static const struct platform_device_info omap_dma_dev_info = {
293 .name = "omap-dma-engine",
294 .id = -1,
295 .dma_mask = DMA_BIT_MASK(32),
296};
297
298static int __init omap2_system_dma_init(void) 271static int __init omap2_system_dma_init(void)
299{ 272{
300 struct platform_device *pdev; 273 struct platform_device *pdev;
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 3c418ea54bbe..fcd8036af910 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -525,7 +525,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
525 * stuff is inherited for free 525 * stuff is inherited for free
526 */ 526 */
527 527
528 if (!ret) 528 if (!ret && clk_get_parent(hw->clk) != new_parent)
529 __clk_reparent(hw->clk, new_parent); 529 __clk_reparent(hw->clk, new_parent);
530 530
531 return 0; 531 return 0;
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index dadccc91488c..ea2be0f5953b 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -33,227 +33,5 @@
33#include "soc.h" 33#include "soc.h"
34#include "dss-common.h" 34#include "dss-common.h"
35#include "mux.h" 35#include "mux.h"
36#include "display.h"
36 37
37#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
38#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
39#define HDMI_GPIO_HPD 63 /* Hotplug detect */
40
41#define PANDA_DVI_TFP410_POWER_DOWN_GPIO 0
42
43/* DVI Connector */
44static struct connector_dvi_platform_data omap4_panda_dvi_connector_pdata = {
45 .name = "dvi",
46 .source = "tfp410.0",
47 .i2c_bus_num = 2,
48};
49
50static struct platform_device omap4_panda_dvi_connector_device = {
51 .name = "connector-dvi",
52 .id = 0,
53 .dev.platform_data = &omap4_panda_dvi_connector_pdata,
54};
55
56/* TFP410 DPI-to-DVI chip */
57static struct encoder_tfp410_platform_data omap4_panda_tfp410_pdata = {
58 .name = "tfp410.0",
59 .source = "dpi.0",
60 .data_lines = 24,
61 .power_down_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
62};
63
64static struct platform_device omap4_panda_tfp410_device = {
65 .name = "tfp410",
66 .id = 0,
67 .dev.platform_data = &omap4_panda_tfp410_pdata,
68};
69
70/* HDMI Connector */
71static struct connector_hdmi_platform_data omap4_panda_hdmi_connector_pdata = {
72 .name = "hdmi",
73 .source = "tpd12s015.0",
74};
75
76static struct platform_device omap4_panda_hdmi_connector_device = {
77 .name = "connector-hdmi",
78 .id = 0,
79 .dev.platform_data = &omap4_panda_hdmi_connector_pdata,
80};
81
82/* TPD12S015 HDMI ESD protection & level shifter chip */
83static struct encoder_tpd12s015_platform_data omap4_panda_tpd_pdata = {
84 .name = "tpd12s015.0",
85 .source = "hdmi.0",
86
87 .ct_cp_hpd_gpio = HDMI_GPIO_CT_CP_HPD,
88 .ls_oe_gpio = HDMI_GPIO_LS_OE,
89 .hpd_gpio = HDMI_GPIO_HPD,
90};
91
92static struct platform_device omap4_panda_tpd_device = {
93 .name = "tpd12s015",
94 .id = 0,
95 .dev.platform_data = &omap4_panda_tpd_pdata,
96};
97
98static struct omap_dss_board_info omap4_panda_dss_data = {
99 .default_display_name = "dvi",
100};
101
102void __init omap4_panda_display_init_of(void)
103{
104 omap_display_init(&omap4_panda_dss_data);
105
106 platform_device_register(&omap4_panda_tfp410_device);
107 platform_device_register(&omap4_panda_dvi_connector_device);
108
109 platform_device_register(&omap4_panda_tpd_device);
110 platform_device_register(&omap4_panda_hdmi_connector_device);
111}
112
113
114/* OMAP4 Blaze display data */
115
116#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */
117#define DLP_POWER_ON_GPIO 40
118
119static struct panel_dsicm_platform_data dsi1_panel = {
120 .name = "lcd",
121 .source = "dsi.0",
122 .reset_gpio = 102,
123 .use_ext_te = false,
124 .ext_te_gpio = 101,
125 .pin_config = {
126 .num_pins = 6,
127 .pins = { 0, 1, 2, 3, 4, 5 },
128 },
129};
130
131static struct platform_device sdp4430_lcd_device = {
132 .name = "panel-dsi-cm",
133 .id = 0,
134 .dev.platform_data = &dsi1_panel,
135};
136
137static struct panel_dsicm_platform_data dsi2_panel = {
138 .name = "lcd2",
139 .source = "dsi.1",
140 .reset_gpio = 104,
141 .use_ext_te = false,
142 .ext_te_gpio = 103,
143 .pin_config = {
144 .num_pins = 6,
145 .pins = { 0, 1, 2, 3, 4, 5 },
146 },
147};
148
149static struct platform_device sdp4430_lcd2_device = {
150 .name = "panel-dsi-cm",
151 .id = 1,
152 .dev.platform_data = &dsi2_panel,
153};
154
155/* HDMI Connector */
156static struct connector_hdmi_platform_data sdp4430_hdmi_connector_pdata = {
157 .name = "hdmi",
158 .source = "tpd12s015.0",
159};
160
161static struct platform_device sdp4430_hdmi_connector_device = {
162 .name = "connector-hdmi",
163 .id = 0,
164 .dev.platform_data = &sdp4430_hdmi_connector_pdata,
165};
166
167/* TPD12S015 HDMI ESD protection & level shifter chip */
168static struct encoder_tpd12s015_platform_data sdp4430_tpd_pdata = {
169 .name = "tpd12s015.0",
170 .source = "hdmi.0",
171
172 .ct_cp_hpd_gpio = HDMI_GPIO_CT_CP_HPD,
173 .ls_oe_gpio = HDMI_GPIO_LS_OE,
174 .hpd_gpio = HDMI_GPIO_HPD,
175};
176
177static struct platform_device sdp4430_tpd_device = {
178 .name = "tpd12s015",
179 .id = 0,
180 .dev.platform_data = &sdp4430_tpd_pdata,
181};
182
183
184static struct omap_dss_board_info sdp4430_dss_data = {
185 .default_display_name = "lcd",
186};
187
188/*
189 * we select LCD2 by default (instead of Pico DLP) by setting DISPLAY_SEL_GPIO.
190 * Setting DLP_POWER_ON gpio enables the VDLP_2V5 VDLP_1V8 and VDLP_1V0 rails
191 * used by picodlp on the 4430sdp platform. Keep this gpio disabled as LCD2 is
192 * selected by default
193 */
194void __init omap_4430sdp_display_init_of(void)
195{
196 int r;
197
198 r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH,
199 "display_sel");
200 if (r)
201 pr_err("%s: Could not get display_sel GPIO\n", __func__);
202
203 r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW,
204 "DLP POWER ON");
205 if (r)
206 pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__);
207
208 omap_display_init(&sdp4430_dss_data);
209
210 platform_device_register(&sdp4430_lcd_device);
211 platform_device_register(&sdp4430_lcd2_device);
212
213 platform_device_register(&sdp4430_tpd_device);
214 platform_device_register(&sdp4430_hdmi_connector_device);
215}
216
217
218/* OMAP3 IGEPv2 data */
219
220#define IGEP2_DVI_TFP410_POWER_DOWN_GPIO 170
221
222/* DVI Connector */
223static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
224 .name = "dvi",
225 .source = "tfp410.0",
226 .i2c_bus_num = 2,
227};
228
229static struct platform_device omap3_igep2_dvi_connector_device = {
230 .name = "connector-dvi",
231 .id = 0,
232 .dev.platform_data = &omap3_igep2_dvi_connector_pdata,
233};
234
235/* TFP410 DPI-to-DVI chip */
236static struct encoder_tfp410_platform_data omap3_igep2_tfp410_pdata = {
237 .name = "tfp410.0",
238 .source = "dpi.0",
239 .data_lines = 24,
240 .power_down_gpio = IGEP2_DVI_TFP410_POWER_DOWN_GPIO,
241};
242
243static struct platform_device omap3_igep2_tfp410_device = {
244 .name = "tfp410",
245 .id = 0,
246 .dev.platform_data = &omap3_igep2_tfp410_pdata,
247};
248
249static struct omap_dss_board_info igep2_dss_data = {
250 .default_display_name = "dvi",
251};
252
253void __init omap3_igep2_display_init_of(void)
254{
255 omap_display_init(&igep2_dss_data);
256
257 platform_device_register(&omap3_igep2_tfp410_device);
258 platform_device_register(&omap3_igep2_dvi_connector_device);
259}
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 174caecc3186..4349e82debfe 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -45,24 +45,31 @@ static struct platform_device gpmc_nand_device = {
45 45
46static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) 46static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
47{ 47{
48 /* support only OMAP3 class */ 48 /* platforms which support all ECC schemes */
49 if (!cpu_is_omap34xx() && !soc_is_am33xx()) { 49 if (soc_is_am33xx() || cpu_is_omap44xx() ||
50 pr_err("BCH ecc is not supported on this CPU\n"); 50 soc_is_omap54xx() || soc_is_dra7xx())
51 return 1;
52
53 /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
54 * which require H/W based ECC error detection */
55 if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
56 ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
57 (ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
51 return 0; 58 return 0;
52 }
53 59
54 /* 60 /*
55 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1 61 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
56 * and AM33xx derivates. Other chips may be added if confirmed to work. 62 * and AM33xx derivates. Other chips may be added if confirmed to work.
57 */ 63 */
58 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) && 64 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
59 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) && 65 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
60 (!soc_is_am33xx())) {
61 pr_err("BCH 4-bit mode is not supported on this CPU\n");
62 return 0; 66 return 0;
63 }
64 67
65 return 1; 68 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
69 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
70 return 1;
71 else
72 return 0;
66} 73}
67 74
68/* This function will go away once the device-tree convertion is complete */ 75/* This function will go away once the device-tree convertion is complete */
@@ -133,8 +140,10 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
133 140
134 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); 141 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
135 142
136 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) 143 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
144 dev_err(dev, "Unsupported NAND ECC scheme selected\n");
137 return -EINVAL; 145 return -EINVAL;
146 }
138 147
139 err = platform_device_register(&gpmc_nand_device); 148 err = platform_device_register(&gpmc_nand_device);
140 if (err < 0) { 149 if (err < 0) {
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 9428c5f9d4f2..157412e4273a 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -465,8 +465,18 @@ void __init omap3xxx_check_revision(void)
465 } 465 }
466 break; 466 break;
467 case 0xb98c: 467 case 0xb98c:
468 omap_revision = AM437X_REV_ES1_0; 468 switch (rev) {
469 cpu_rev = "1.0"; 469 case 0:
470 omap_revision = AM437X_REV_ES1_0;
471 cpu_rev = "1.0";
472 break;
473 case 1:
474 /* FALLTHROUGH */
475 default:
476 omap_revision = AM437X_REV_ES1_1;
477 cpu_rev = "1.1";
478 break;
479 }
470 break; 480 break;
471 case 0xb8f2: 481 case 0xb8f2:
472 switch (rev) { 482 switch (rev) {
@@ -657,6 +667,8 @@ static const char * __init omap_get_family(void)
657 return kasprintf(GFP_KERNEL, "OMAP4"); 667 return kasprintf(GFP_KERNEL, "OMAP4");
658 else if (soc_is_omap54xx()) 668 else if (soc_is_omap54xx())
659 return kasprintf(GFP_KERNEL, "OMAP5"); 669 return kasprintf(GFP_KERNEL, "OMAP5");
670 else if (soc_is_am43xx())
671 return kasprintf(GFP_KERNEL, "AM43xx");
660 else 672 else
661 return kasprintf(GFP_KERNEL, "Unknown"); 673 return kasprintf(GFP_KERNEL, "Unknown");
662} 674}
diff --git a/arch/arm/mach-omap2/include/mach/timex.h b/arch/arm/mach-omap2/include/mach/timex.h
deleted file mode 100644
index de9f8fc40e7c..000000000000
--- a/arch/arm/mach-omap2/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-omap2/include/mach/timex.h
3 */
4
5#include <plat/timex.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index af432b191255..f14f9ac2dca1 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -604,6 +604,7 @@ void __init am43xx_init_early(void)
604 omap_prm_base_init(); 604 omap_prm_base_init();
605 omap_cm_base_init(); 605 omap_cm_base_init();
606 omap3xxx_check_revision(); 606 omap3xxx_check_revision();
607 am33xx_check_features();
607 am43xx_powerdomains_init(); 608 am43xx_powerdomains_init();
608 am43xx_clockdomains_init(); 609 am43xx_clockdomains_init();
609 am43xx_hwmod_init(); 610 am43xx_hwmod_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index e022a869bff2..6037a9a01ed5 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -222,6 +222,7 @@ void __init ti81xx_init_irq(void)
222static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) 222static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
223{ 223{
224 u32 irqnr; 224 u32 irqnr;
225 int handled_irq = 0;
225 226
226 do { 227 do {
227 irqnr = readl_relaxed(base_addr + 0x98); 228 irqnr = readl_relaxed(base_addr + 0x98);
@@ -249,8 +250,15 @@ out:
249 if (irqnr) { 250 if (irqnr) {
250 irqnr = irq_find_mapping(domain, irqnr); 251 irqnr = irq_find_mapping(domain, irqnr);
251 handle_IRQ(irqnr, regs); 252 handle_IRQ(irqnr, regs);
253 handled_irq = 1;
252 } 254 }
253 } while (irqnr); 255 } while (irqnr);
256
257 /* If an irq is masked or deasserted while active, we will
258 * keep ending up here with no irq handled. So remove it from
259 * the INTC with an ack.*/
260 if (!handled_irq)
261 omap_ack_irq(NULL);
254} 262}
255 263
256asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) 264asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index a722330d4d53..d121fb6df4e6 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -63,9 +63,6 @@
63#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */ 63#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
64#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */ 64#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */
65#define OMAP_PACKAGE_CBC 3 /* 515-pin 0.50 0.65 */ 65#define OMAP_PACKAGE_CBC 3 /* 515-pin 0.50 0.65 */
66#define OMAP_PACKAGE_ZAC 2 /* 24xx 447-pin POP */
67#define OMAP_PACKAGE_ZAF 1 /* 2420 447-pin SIP */
68
69 66
70#define OMAP_MUX_NR_MODES 8 /* Available modes */ 67#define OMAP_MUX_NR_MODES 8 /* Available modes */
71#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */ 68#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index f6daae821ebb..f1fab5684a24 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -10,6 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#include <linux/of.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
15#include <linux/err.h> 16#include <linux/err.h>
@@ -58,6 +59,10 @@ static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
58 59
59static int __init omap_iommu_init(void) 60static int __init omap_iommu_init(void)
60{ 61{
62 /* If dtb is there, the devices will be created dynamically */
63 if (of_have_populated_dt())
64 return -ENODEV;
65
61 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL); 66 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
62} 67}
63/* must be ready before omap3isp is probed */ 68/* must be ready before omap3isp is probed */
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 3664562f9148..693fe486e917 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -138,7 +138,7 @@ static void wakeupgen_mask(struct irq_data *d)
138 unsigned long flags; 138 unsigned long flags;
139 139
140 raw_spin_lock_irqsave(&wakeupgen_lock, flags); 140 raw_spin_lock_irqsave(&wakeupgen_lock, flags);
141 _wakeupgen_clear(d->irq, irq_target_cpu[d->irq]); 141 _wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]);
142 raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); 142 raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
143} 143}
144 144
@@ -150,7 +150,7 @@ static void wakeupgen_unmask(struct irq_data *d)
150 unsigned long flags; 150 unsigned long flags;
151 151
152 raw_spin_lock_irqsave(&wakeupgen_lock, flags); 152 raw_spin_lock_irqsave(&wakeupgen_lock, flags);
153 _wakeupgen_set(d->irq, irq_target_cpu[d->irq]); 153 _wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]);
154 raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); 154 raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
155} 155}
156 156
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6cd3f3772ecf..95e171a055f3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -22,6 +22,7 @@
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqchip/arm-gic.h> 24#include <linux/irqchip/arm-gic.h>
25#include <linux/irqchip/irq-crossbar.h>
25#include <linux/of_address.h> 26#include <linux/of_address.h>
26#include <linux/reboot.h> 27#include <linux/reboot.h>
27 28
@@ -288,5 +289,8 @@ void __init omap_gic_of_init(void)
288 289
289skip_errata_init: 290skip_errata_init:
290 omap_wakeupgen_init(); 291 omap_wakeupgen_init();
292#ifdef CONFIG_IRQ_CROSSBAR
293 irqcrossbar_init();
294#endif
291 irqchip_init(); 295 irqchip_init();
292} 296}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 4c3b1e6df508..a123ff0070bd 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1955,10 +1955,6 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
1955 .sysc = &omap3xxx_usb_host_hs_sysc, 1955 .sysc = &omap3xxx_usb_host_hs_sysc,
1956}; 1956};
1957 1957
1958static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
1959 { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
1960};
1961
1962static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = { 1958static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
1963 { .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, }, 1959 { .name = "ohci-irq", .irq = 76 + OMAP_INTC_START, },
1964 { .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, }, 1960 { .name = "ehci-irq", .irq = 77 + OMAP_INTC_START, },
@@ -1981,8 +1977,6 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
1981 .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT, 1977 .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
1982 }, 1978 },
1983 }, 1979 },
1984 .opt_clks = omap3xxx_usb_host_hs_opt_clks,
1985 .opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
1986 1980
1987 /* 1981 /*
1988 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock 1982 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
@@ -3029,8 +3023,6 @@ static struct omap_hwmod omap3xxx_mmu_isp_hwmod = {
3029 .flags = HWMOD_NO_IDLEST, 3023 .flags = HWMOD_NO_IDLEST,
3030}; 3024};
3031 3025
3032#ifdef CONFIG_OMAP_IOMMU_IVA2
3033
3034/* mmu iva */ 3026/* mmu iva */
3035 3027
3036static struct omap_mmu_dev_attr mmu_iva_dev_attr = { 3028static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
@@ -3070,20 +3062,22 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = {
3070 .name = "mmu_iva", 3062 .name = "mmu_iva",
3071 .class = &omap3xxx_mmu_hwmod_class, 3063 .class = &omap3xxx_mmu_hwmod_class,
3072 .mpu_irqs = omap3xxx_mmu_iva_irqs, 3064 .mpu_irqs = omap3xxx_mmu_iva_irqs,
3065 .clkdm_name = "iva2_clkdm",
3073 .rst_lines = omap3xxx_mmu_iva_resets, 3066 .rst_lines = omap3xxx_mmu_iva_resets,
3074 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets), 3067 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets),
3075 .main_clk = "iva2_ck", 3068 .main_clk = "iva2_ck",
3076 .prcm = { 3069 .prcm = {
3077 .omap2 = { 3070 .omap2 = {
3078 .module_offs = OMAP3430_IVA2_MOD, 3071 .module_offs = OMAP3430_IVA2_MOD,
3072 .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
3073 .idlest_reg_id = 1,
3074 .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
3079 }, 3075 },
3080 }, 3076 },
3081 .dev_attr = &mmu_iva_dev_attr, 3077 .dev_attr = &mmu_iva_dev_attr,
3082 .flags = HWMOD_NO_IDLEST, 3078 .flags = HWMOD_NO_IDLEST,
3083}; 3079};
3084 3080
3085#endif
3086
3087/* l4_per -> gpio4 */ 3081/* l4_per -> gpio4 */
3088static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { 3082static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {
3089 { 3083 {
@@ -3855,9 +3849,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {
3855 &omap3xxx_l4_core__hdq1w, 3849 &omap3xxx_l4_core__hdq1w,
3856 &omap3xxx_sad2d__l3, 3850 &omap3xxx_sad2d__l3,
3857 &omap3xxx_l4_core__mmu_isp, 3851 &omap3xxx_l4_core__mmu_isp,
3858#ifdef CONFIG_OMAP_IOMMU_IVA2
3859 &omap3xxx_l3_main__mmu_iva, 3852 &omap3xxx_l3_main__mmu_iva,
3860#endif
3861 &omap34xx_l4_core__ssi, 3853 &omap34xx_l4_core__ssi,
3862 NULL 3854 NULL
3863}; 3855};
@@ -3881,9 +3873,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {
3881 &omap3xxx_l4_core__hdq1w, 3873 &omap3xxx_l4_core__hdq1w,
3882 &omap3xxx_sad2d__l3, 3874 &omap3xxx_sad2d__l3,
3883 &omap3xxx_l4_core__mmu_isp, 3875 &omap3xxx_l4_core__mmu_isp,
3884#ifdef CONFIG_OMAP_IOMMU_IVA2
3885 &omap3xxx_l3_main__mmu_iva, 3876 &omap3xxx_l3_main__mmu_iva,
3886#endif
3887 NULL 3877 NULL
3888}; 3878};
3889 3879
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 9002fca76699..5c2cc8083fdd 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -719,6 +719,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
719 &am33xx_l4_ls__uart4, 719 &am33xx_l4_ls__uart4,
720 &am33xx_l4_ls__uart5, 720 &am33xx_l4_ls__uart5,
721 &am33xx_l4_ls__uart6, 721 &am33xx_l4_ls__uart6,
722 &am33xx_l4_ls__spinlock,
722 &am33xx_l4_ls__elm, 723 &am33xx_l4_ls__elm,
723 &am33xx_l4_ls__epwmss0, 724 &am33xx_l4_ls__epwmss0,
724 &am33xx_epwmss0__ecap0, 725 &am33xx_epwmss0__ecap0,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 3318cae96e7d..1219280bb976 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2541,8 +2541,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_spinlock_sysc = {
2541 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | 2541 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
2542 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 2542 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
2543 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), 2543 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
2544 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2544 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
2545 SIDLE_SMART_WKUP),
2546 .sysc_fields = &omap_hwmod_sysc_type1, 2545 .sysc_fields = &omap_hwmod_sysc_type1,
2547}; 2546};
2548 2547
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index e297d6231c3a..892317294fdc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1122,6 +1122,71 @@ static struct omap_hwmod omap54xx_mmc5_hwmod = {
1122}; 1122};
1123 1123
1124/* 1124/*
1125 * 'mmu' class
1126 * The memory management unit performs virtual to physical address translation
1127 * for its requestors.
1128 */
1129
1130static struct omap_hwmod_class_sysconfig omap54xx_mmu_sysc = {
1131 .rev_offs = 0x0000,
1132 .sysc_offs = 0x0010,
1133 .syss_offs = 0x0014,
1134 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
1135 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1136 SYSS_HAS_RESET_STATUS),
1137 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1138 .sysc_fields = &omap_hwmod_sysc_type1,
1139};
1140
1141static struct omap_hwmod_class omap54xx_mmu_hwmod_class = {
1142 .name = "mmu",
1143 .sysc = &omap54xx_mmu_sysc,
1144};
1145
1146static struct omap_hwmod_rst_info omap54xx_mmu_dsp_resets[] = {
1147 { .name = "mmu_cache", .rst_shift = 1 },
1148};
1149
1150static struct omap_hwmod omap54xx_mmu_dsp_hwmod = {
1151 .name = "mmu_dsp",
1152 .class = &omap54xx_mmu_hwmod_class,
1153 .clkdm_name = "dsp_clkdm",
1154 .rst_lines = omap54xx_mmu_dsp_resets,
1155 .rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_dsp_resets),
1156 .main_clk = "dpll_iva_h11x2_ck",
1157 .prcm = {
1158 .omap4 = {
1159 .clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET,
1160 .rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET,
1161 .context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET,
1162 .modulemode = MODULEMODE_HWCTRL,
1163 },
1164 },
1165};
1166
1167/* mmu ipu */
1168static struct omap_hwmod_rst_info omap54xx_mmu_ipu_resets[] = {
1169 { .name = "mmu_cache", .rst_shift = 2 },
1170};
1171
1172static struct omap_hwmod omap54xx_mmu_ipu_hwmod = {
1173 .name = "mmu_ipu",
1174 .class = &omap54xx_mmu_hwmod_class,
1175 .clkdm_name = "ipu_clkdm",
1176 .rst_lines = omap54xx_mmu_ipu_resets,
1177 .rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_ipu_resets),
1178 .main_clk = "dpll_core_h22x2_ck",
1179 .prcm = {
1180 .omap4 = {
1181 .clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET,
1182 .rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET,
1183 .context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET,
1184 .modulemode = MODULEMODE_HWCTRL,
1185 },
1186 },
1187};
1188
1189/*
1125 * 'mpu' class 1190 * 'mpu' class
1126 * mpu sub-system 1191 * mpu sub-system
1127 */ 1192 */
@@ -1763,6 +1828,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_1 = {
1763 .user = OCP_USER_MPU | OCP_USER_SDMA, 1828 .user = OCP_USER_MPU | OCP_USER_SDMA,
1764}; 1829};
1765 1830
1831/* l4_cfg -> mmu_dsp */
1832static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mmu_dsp = {
1833 .master = &omap54xx_l4_cfg_hwmod,
1834 .slave = &omap54xx_mmu_dsp_hwmod,
1835 .clk = "l4_root_clk_div",
1836 .user = OCP_USER_MPU | OCP_USER_SDMA,
1837};
1838
1766/* mpu -> l3_main_1 */ 1839/* mpu -> l3_main_1 */
1767static struct omap_hwmod_ocp_if omap54xx_mpu__l3_main_1 = { 1840static struct omap_hwmod_ocp_if omap54xx_mpu__l3_main_1 = {
1768 .master = &omap54xx_mpu_hwmod, 1841 .master = &omap54xx_mpu_hwmod,
@@ -1787,6 +1860,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_2 = {
1787 .user = OCP_USER_MPU | OCP_USER_SDMA, 1860 .user = OCP_USER_MPU | OCP_USER_SDMA,
1788}; 1861};
1789 1862
1863/* l3_main_2 -> mmu_ipu */
1864static struct omap_hwmod_ocp_if omap54xx_l3_main_2__mmu_ipu = {
1865 .master = &omap54xx_l3_main_2_hwmod,
1866 .slave = &omap54xx_mmu_ipu_hwmod,
1867 .clk = "l3_iclk_div",
1868 .user = OCP_USER_MPU | OCP_USER_SDMA,
1869};
1870
1790/* l3_main_1 -> l3_main_3 */ 1871/* l3_main_1 -> l3_main_3 */
1791static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_3 = { 1872static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_3 = {
1792 .master = &omap54xx_l3_main_1_hwmod, 1873 .master = &omap54xx_l3_main_1_hwmod,
@@ -2345,6 +2426,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2345 &omap54xx_l4_wkup__counter_32k, 2426 &omap54xx_l4_wkup__counter_32k,
2346 &omap54xx_l4_cfg__dma_system, 2427 &omap54xx_l4_cfg__dma_system,
2347 &omap54xx_l4_abe__dmic, 2428 &omap54xx_l4_abe__dmic,
2429 &omap54xx_l4_cfg__mmu_dsp,
2348 &omap54xx_mpu__emif1, 2430 &omap54xx_mpu__emif1,
2349 &omap54xx_mpu__emif2, 2431 &omap54xx_mpu__emif2,
2350 &omap54xx_l4_wkup__gpio1, 2432 &omap54xx_l4_wkup__gpio1,
@@ -2360,6 +2442,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2360 &omap54xx_l4_per__i2c3, 2442 &omap54xx_l4_per__i2c3,
2361 &omap54xx_l4_per__i2c4, 2443 &omap54xx_l4_per__i2c4,
2362 &omap54xx_l4_per__i2c5, 2444 &omap54xx_l4_per__i2c5,
2445 &omap54xx_l3_main_2__mmu_ipu,
2363 &omap54xx_l4_wkup__kbd, 2446 &omap54xx_l4_wkup__kbd,
2364 &omap54xx_l4_cfg__mailbox, 2447 &omap54xx_l4_cfg__mailbox,
2365 &omap54xx_l4_abe__mcbsp1, 2448 &omap54xx_l4_abe__mcbsp1,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index c33e07e2f0d4..c3b73351cb7a 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -16,12 +16,14 @@
16#include <linux/wl12xx.h> 16#include <linux/wl12xx.h>
17 17
18#include <linux/platform_data/pinctrl-single.h> 18#include <linux/platform_data/pinctrl-single.h>
19#include <linux/platform_data/iommu-omap.h>
19 20
20#include "am35xx.h" 21#include "am35xx.h"
21#include "common.h" 22#include "common.h"
22#include "common-board-devices.h" 23#include "common-board-devices.h"
23#include "dss-common.h" 24#include "dss-common.h"
24#include "control.h" 25#include "control.h"
26#include "omap_device.h"
25#include "omap-secure.h" 27#include "omap-secure.h"
26#include "soc.h" 28#include "soc.h"
27 29
@@ -33,20 +35,6 @@ struct pdata_init {
33struct of_dev_auxdata omap_auxdata_lookup[]; 35struct of_dev_auxdata omap_auxdata_lookup[];
34static struct twl4030_gpio_platform_data twl_gpio_auxdata; 36static struct twl4030_gpio_platform_data twl_gpio_auxdata;
35 37
36/*
37 * Create alias for USB host PHY clock.
38 * Remove this when clock phandle can be provided via DT
39 */
40static void __init __used legacy_init_ehci_clk(char *clkname)
41{
42 int ret;
43
44 ret = clk_add_alias("main_clk", NULL, clkname, NULL);
45 if (ret)
46 pr_err("%s:Failed to add main_clk alias to %s :%d\n",
47 __func__, clkname, ret);
48}
49
50#if IS_ENABLED(CONFIG_WL12XX) 38#if IS_ENABLED(CONFIG_WL12XX)
51 39
52static struct wl12xx_platform_data wl12xx __initdata; 40static struct wl12xx_platform_data wl12xx __initdata;
@@ -94,6 +82,12 @@ static void __init hsmmc2_internal_input_clk(void)
94 omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); 82 omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
95} 83}
96 84
85static struct iommu_platform_data omap3_iommu_pdata = {
86 .reset_name = "mmu",
87 .assert_reset = omap_device_assert_hardreset,
88 .deassert_reset = omap_device_deassert_hardreset,
89};
90
97static int omap3_sbc_t3730_twl_callback(struct device *dev, 91static int omap3_sbc_t3730_twl_callback(struct device *dev,
98 unsigned gpio, 92 unsigned gpio,
99 unsigned ngpio) 93 unsigned ngpio)
@@ -101,7 +95,7 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
101 int res; 95 int res;
102 96
103 res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, 97 res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
104 "wlan rst"); 98 "wlan pwr");
105 if (res) 99 if (res)
106 return res; 100 return res;
107 101
@@ -110,6 +104,23 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
110 return 0; 104 return 0;
111} 105}
112 106
107static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
108{
109 int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
110
111 if (err) {
112 pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
113 hub_name, err);
114 return;
115 }
116
117 gpio_export(gpio, 0);
118
119 udelay(10);
120 gpio_set_value(gpio, 1);
121 msleep(1);
122}
123
113static void __init omap3_sbc_t3730_twl_init(void) 124static void __init omap3_sbc_t3730_twl_init(void)
114{ 125{
115 twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback; 126 twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
@@ -117,13 +128,19 @@ static void __init omap3_sbc_t3730_twl_init(void)
117 128
118static void __init omap3_sbc_t3730_legacy_init(void) 129static void __init omap3_sbc_t3730_legacy_init(void)
119{ 130{
131 omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
120 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136); 132 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136);
121 omap_ads7846_init(1, 57, 0, NULL); 133 omap_ads7846_init(1, 57, 0, NULL);
122} 134}
123 135
136static void __init omap3_sbc_t3530_legacy_init(void)
137{
138 omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
139 omap_ads7846_init(1, 57, 0, NULL);
140}
141
124static void __init omap3_igep0020_legacy_init(void) 142static void __init omap3_igep0020_legacy_init(void)
125{ 143{
126 omap3_igep2_display_init_of();
127} 144}
128 145
129static void __init omap3_evm_legacy_init(void) 146static void __init omap3_evm_legacy_init(void)
@@ -162,7 +179,7 @@ static struct emac_platform_data am35xx_emac_pdata = {
162 .interrupt_disable = am35xx_disable_emac_int, 179 .interrupt_disable = am35xx_disable_emac_int,
163}; 180};
164 181
165static void __init am3517_evm_legacy_init(void) 182static void __init am35xx_emac_reset(void)
166{ 183{
167 u32 v; 184 u32 v;
168 185
@@ -172,6 +189,43 @@ static void __init am3517_evm_legacy_init(void)
172 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ 189 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
173} 190}
174 191
192static struct gpio cm_t3517_wlan_gpios[] __initdata = {
193 { 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
194 { 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
195};
196
197static void __init omap3_sbc_t3517_wifi_init(void)
198{
199 int err = gpio_request_array(cm_t3517_wlan_gpios,
200 ARRAY_SIZE(cm_t3517_wlan_gpios));
201 if (err) {
202 pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
203 return;
204 }
205
206 gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
207 gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
208
209 msleep(100);
210 gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
211}
212
213static void __init omap3_sbc_t3517_legacy_init(void)
214{
215 omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
216 omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
217 am35xx_emac_reset();
218 hsmmc2_internal_input_clk();
219 omap3_sbc_t3517_wifi_init();
220 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 145);
221 omap_ads7846_init(1, 57, 0, NULL);
222}
223
224static void __init am3517_evm_legacy_init(void)
225{
226 am35xx_emac_reset();
227}
228
175static void __init nokia_n900_legacy_init(void) 229static void __init nokia_n900_legacy_init(void)
176{ 230{
177 hsmmc2_internal_input_clk(); 231 hsmmc2_internal_input_clk();
@@ -192,23 +246,34 @@ static void __init nokia_n900_legacy_init(void)
192#ifdef CONFIG_ARCH_OMAP4 246#ifdef CONFIG_ARCH_OMAP4
193static void __init omap4_sdp_legacy_init(void) 247static void __init omap4_sdp_legacy_init(void)
194{ 248{
195 omap_4430sdp_display_init_of();
196 legacy_init_wl12xx(WL12XX_REFCLOCK_26, 249 legacy_init_wl12xx(WL12XX_REFCLOCK_26,
197 WL12XX_TCXOCLOCK_26, 53); 250 WL12XX_TCXOCLOCK_26, 53);
198} 251}
199 252
200static void __init omap4_panda_legacy_init(void) 253static void __init omap4_panda_legacy_init(void)
201{ 254{
202 omap4_panda_display_init_of();
203 legacy_init_ehci_clk("auxclk3_ck");
204 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); 255 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
205} 256}
206#endif 257#endif
207 258
259#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
260static struct iommu_platform_data omap4_iommu_pdata = {
261 .reset_name = "mmu_cache",
262 .assert_reset = omap_device_assert_hardreset,
263 .deassert_reset = omap_device_deassert_hardreset,
264};
265#endif
266
267#ifdef CONFIG_SOC_AM33XX
268static void __init am335x_evmsk_legacy_init(void)
269{
270 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 31);
271}
272#endif
273
208#ifdef CONFIG_SOC_OMAP5 274#ifdef CONFIG_SOC_OMAP5
209static void __init omap5_uevm_legacy_init(void) 275static void __init omap5_uevm_legacy_init(void)
210{ 276{
211 legacy_init_ehci_clk("auxclk1_ck");
212} 277}
213#endif 278#endif
214 279
@@ -259,6 +324,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
259 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), 324 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
260 OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata), 325 OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata),
261 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), 326 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata),
327 OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
328 &omap3_iommu_pdata),
262 /* Only on am3517 */ 329 /* Only on am3517 */
263 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), 330 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
264 OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", 331 OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
@@ -268,6 +335,12 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
268 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), 335 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata),
269 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), 336 OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata),
270#endif 337#endif
338#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
339 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
340 &omap4_iommu_pdata),
341 OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
342 &omap4_iommu_pdata),
343#endif
271 { /* sentinel */ }, 344 { /* sentinel */ },
272}; 345};
273 346
@@ -277,6 +350,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
277 */ 350 */
278static struct pdata_init pdata_quirks[] __initdata = { 351static struct pdata_init pdata_quirks[] __initdata = {
279#ifdef CONFIG_ARCH_OMAP3 352#ifdef CONFIG_ARCH_OMAP3
353 { "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
354 { "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
280 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, }, 355 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
281 { "nokia,omap3-n900", nokia_n900_legacy_init, }, 356 { "nokia,omap3-n900", nokia_n900_legacy_init, },
282 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 357 { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
@@ -290,6 +365,9 @@ static struct pdata_init pdata_quirks[] __initdata = {
290 { "ti,omap4-sdp", omap4_sdp_legacy_init, }, 365 { "ti,omap4-sdp", omap4_sdp_legacy_init, },
291 { "ti,omap4-panda", omap4_panda_legacy_init, }, 366 { "ti,omap4-panda", omap4_panda_legacy_init, },
292#endif 367#endif
368#ifdef CONFIG_SOC_AM33XX
369 { "ti,am335x-evmsk", am335x_evmsk_legacy_init, },
370#endif
293#ifdef CONFIG_SOC_OMAP5 371#ifdef CONFIG_SOC_OMAP5
294 { "ti,omap5-uevm", omap5_uevm_legacy_init, }, 372 { "ti,omap5-uevm", omap5_uevm_legacy_init, },
295#endif 373#endif
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 7bdd22afce69..d4d0fce325c7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -103,7 +103,7 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { }
103 103
104#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0) 104#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
105 105
106#if defined(CONFIG_ARCH_OMAP4) 106#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
107extern u16 pm44xx_errata; 107extern u16 pm44xx_errata;
108#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id)) 108#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
109#else 109#else
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 280f3c58abe5..05fcf6de44ee 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -25,6 +25,7 @@
25#include "prminst44xx.h" 25#include "prminst44xx.h"
26#include "prm-regbits-44xx.h" 26#include "prm-regbits-44xx.h"
27#include "prcm44xx.h" 27#include "prcm44xx.h"
28#include "prcm43xx.h"
28#include "prcm_mpu44xx.h" 29#include "prcm_mpu44xx.h"
29#include "soc.h" 30#include "soc.h"
30 31
@@ -176,6 +177,8 @@ void omap4_prminst_global_warm_sw_reset(void)
176 dev_inst = OMAP54XX_PRM_DEVICE_INST; 177 dev_inst = OMAP54XX_PRM_DEVICE_INST;
177 else if (soc_is_dra7xx()) 178 else if (soc_is_dra7xx())
178 dev_inst = DRA7XX_PRM_DEVICE_INST; 179 dev_inst = DRA7XX_PRM_DEVICE_INST;
180 else if (soc_is_am43xx())
181 dev_inst = AM43XX_PRM_DEVICE_INST;
179 else 182 else
180 return; 183 return;
181 184
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 076bd90a6ce0..30abcc8b20e0 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -438,7 +438,8 @@ IS_OMAP_TYPE(3430, 0x3430)
438#define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8)) 438#define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8))
439 439
440#define AM437X_CLASS 0x43700000 440#define AM437X_CLASS 0x43700000
441#define AM437X_REV_ES1_0 AM437X_CLASS 441#define AM437X_REV_ES1_0 (AM437X_CLASS | (0x10 << 8))
442#define AM437X_REV_ES1_1 (AM437X_CLASS | (0x11 << 8))
442 443
443#define OMAP443X_CLASS 0x44300044 444#define OMAP443X_CLASS 0x44300044
444#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) 445#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 74044aaf438b..b62de9f9d05c 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -604,7 +604,8 @@ OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
604 2, "timer_sys_ck", NULL); 604 2, "timer_sys_ck", NULL);
605#endif /* CONFIG_ARCH_OMAP3 */ 605#endif /* CONFIG_ARCH_OMAP3 */
606 606
607#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) 607#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \
608 defined(CONFIG_SOC_AM43XX)
608OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL, 609OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
609 1, "timer_sys_ck", "ti,timer-alwon"); 610 1, "timer_sys_ck", "ti,timer-alwon");
610#endif 611#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 10:22:16 -0400