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-rw-r--r--arch/arm/mach-omap2/Kconfig12
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c80
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c82
-rw-r--r--arch/arm/mach-omap2/board-rx51.c1
-rw-r--r--arch/arm/mach-omap2/board-zoom2.c93
-rw-r--r--arch/arm/mach-omap2/clock24xx.c1
-rw-r--r--arch/arm/mach-omap2/clock34xx.c37
-rw-r--r--arch/arm/mach-omap2/clock34xx.h4
-rw-r--r--arch/arm/mach-omap2/clockdomain.c74
-rw-r--r--arch/arm/mach-omap2/gpmc.c4
-rw-r--r--arch/arm/mach-omap2/io.c2
-rw-r--r--arch/arm/mach-omap2/mailbox.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c188
-rw-r--r--arch/arm/mach-omap2/powerdomain.c39
-rw-r--r--arch/arm/mach-omap2/serial.c10
21 files changed, 370 insertions, 275 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 75b1c7efae7e..aad194f61a33 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -73,9 +73,21 @@ config MACH_OMAP_3430SDP
73 bool "OMAP 3430 SDP board" 73 bool "OMAP 3430 SDP board"
74 depends on ARCH_OMAP3 && ARCH_OMAP34XX 74 depends on ARCH_OMAP3 && ARCH_OMAP34XX
75 75
76config MACH_NOKIA_N800
77 bool
78
79config MACH_NOKIA_N810
80 bool
81
82config MACH_NOKIA_N810_WIMAX
83 bool
84
76config MACH_NOKIA_N8X0 85config MACH_NOKIA_N8X0
77 bool "Nokia N800/N810" 86 bool "Nokia N800/N810"
78 depends on ARCH_OMAP2420 87 depends on ARCH_OMAP2420
88 select MACH_NOKIA_N800
89 select MACH_NOKIA_N810
90 select MACH_NOKIA_N810_WIMAX
79 91
80config MACH_NOKIA_RX51 92config MACH_NOKIA_RX51
81 bool "Nokia RX-51 board" 93 bool "Nokia RX-51 board"
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index efaf053eba85..0acb5560229c 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/input.h> 19#include <linux/input.h>
20#include <linux/input/matrix_keypad.h>
20#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
21#include <linux/spi/ads7846.h> 22#include <linux/spi/ads7846.h>
22#include <linux/i2c/twl4030.h> 23#include <linux/i2c/twl4030.h>
@@ -38,7 +39,6 @@
38#include <mach/gpmc.h> 39#include <mach/gpmc.h>
39 40
40#include <mach/control.h> 41#include <mach/control.h>
41#include <mach/keypad.h>
42#include <mach/gpmc-smc91x.h> 42#include <mach/gpmc-smc91x.h>
43 43
44#include "sdram-qimonda-hyb18m512160af-6.h" 44#include "sdram-qimonda-hyb18m512160af-6.h"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index eb37c40ea83a..609a5a4a7e29 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -58,6 +58,8 @@ static void __init gic_init_irq(void)
58 58
59static void __init omap_4430sdp_init_irq(void) 59static void __init omap_4430sdp_init_irq(void)
60{ 60{
61 omap_board_config = sdp4430_config;
62 omap_board_config_size = ARRAY_SIZE(sdp4430_config);
61 omap2_init_common_hw(NULL, NULL); 63 omap2_init_common_hw(NULL, NULL);
62#ifdef CONFIG_OMAP_32K_TIMER 64#ifdef CONFIG_OMAP_32K_TIMER
63 omap2_gp_clockevent_set_gptimer(1); 65 omap2_gp_clockevent_set_gptimer(1);
@@ -70,8 +72,6 @@ static void __init omap_4430sdp_init_irq(void)
70static void __init omap_4430sdp_init(void) 72static void __init omap_4430sdp_init(void)
71{ 73{
72 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 74 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
73 omap_board_config = sdp4430_config;
74 omap_board_config_size = ARRAY_SIZE(sdp4430_config);
75 omap_serial_init(); 75 omap_serial_init();
76} 76}
77 77
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d110a7fdfbd8..d57ec2f4d0a9 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -16,6 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/input/matrix_keypad.h>
19#include <linux/gpio_keys.h> 20#include <linux/gpio_keys.h>
20#include <linux/workqueue.h> 21#include <linux/workqueue.h>
21#include <linux/err.h> 22#include <linux/err.h>
@@ -41,7 +42,6 @@
41#include <asm/delay.h> 42#include <asm/delay.h>
42#include <mach/control.h> 43#include <mach/control.h>
43#include <mach/usb.h> 44#include <mach/usb.h>
44#include <mach/keypad.h>
45 45
46#include "mmc-twl4030.h" 46#include "mmc-twl4030.h"
47 47
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 70df6b4dbcd4..08b0816afa61 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -162,7 +162,7 @@ static int beagle_twl_gpio_setup(struct device *dev,
162 162
163 /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ 163 /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
164 gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); 164 gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
165 gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); 165 gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
166 166
167 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 167 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
168 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 168 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index e4ec0c591216..4c4d7f8dbd72 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -20,6 +20,7 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
23#include <linux/leds.h> 24#include <linux/leds.h>
24 25
25#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
@@ -37,7 +38,6 @@
37#include <mach/usb.h> 38#include <mach/usb.h>
38#include <mach/common.h> 39#include <mach/common.h>
39#include <mach/mcspi.h> 40#include <mach/mcspi.h>
40#include <mach/keypad.h>
41 41
42#include "sdram-micron-mt46h32m32lf-6.h" 42#include "sdram-micron-mt46h32m32lf-6.h"
43#include "mmc-twl4030.h" 43#include "mmc-twl4030.h"
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 7f6bf8772af7..7519edb69155 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -27,6 +27,7 @@
27#include <linux/i2c/twl4030.h> 27#include <linux/i2c/twl4030.h>
28#include <linux/leds.h> 28#include <linux/leds.h>
29#include <linux/input.h> 29#include <linux/input.h>
30#include <linux/input/matrix_keypad.h>
30#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
@@ -39,7 +40,6 @@
39#include <mach/hardware.h> 40#include <mach/hardware.h>
40#include <mach/mcspi.h> 41#include <mach/mcspi.h>
41#include <mach/usb.h> 42#include <mach/usb.h>
42#include <mach/keypad.h>
43#include <mach/mux.h> 43#include <mach/mux.h>
44 44
45#include "sdram-micron-mt46h32m32lf-6.h" 45#include "sdram-micron-mt46h32m32lf-6.h"
@@ -134,50 +134,50 @@ static void __init pandora_keys_gpio_init(void)
134} 134}
135 135
136static int board_keymap[] = { 136static int board_keymap[] = {
137 /* col, row, code */ 137 /* row, col, code */
138 KEY(0, 0, KEY_9), 138 KEY(0, 0, KEY_9),
139 KEY(0, 1, KEY_0), 139 KEY(0, 1, KEY_8),
140 KEY(0, 2, KEY_BACKSPACE), 140 KEY(0, 2, KEY_I),
141 KEY(0, 3, KEY_O), 141 KEY(0, 3, KEY_J),
142 KEY(0, 4, KEY_P), 142 KEY(0, 4, KEY_N),
143 KEY(0, 5, KEY_K), 143 KEY(0, 5, KEY_M),
144 KEY(0, 6, KEY_L), 144 KEY(1, 0, KEY_0),
145 KEY(0, 7, KEY_ENTER),
146 KEY(1, 0, KEY_8),
147 KEY(1, 1, KEY_7), 145 KEY(1, 1, KEY_7),
148 KEY(1, 2, KEY_6), 146 KEY(1, 2, KEY_U),
149 KEY(1, 3, KEY_5), 147 KEY(1, 3, KEY_H),
150 KEY(1, 4, KEY_4), 148 KEY(1, 4, KEY_B),
151 KEY(1, 5, KEY_3), 149 KEY(1, 5, KEY_SPACE),
152 KEY(1, 6, KEY_2), 150 KEY(2, 0, KEY_BACKSPACE),
153 KEY(1, 7, KEY_1), 151 KEY(2, 1, KEY_6),
154 KEY(2, 0, KEY_I),
155 KEY(2, 1, KEY_U),
156 KEY(2, 2, KEY_Y), 152 KEY(2, 2, KEY_Y),
157 KEY(2, 3, KEY_T), 153 KEY(2, 3, KEY_G),
158 KEY(2, 4, KEY_R), 154 KEY(2, 4, KEY_V),
159 KEY(2, 5, KEY_E), 155 KEY(2, 5, KEY_FN),
160 KEY(2, 6, KEY_W), 156 KEY(3, 0, KEY_O),
161 KEY(2, 7, KEY_Q), 157 KEY(3, 1, KEY_5),
162 KEY(3, 0, KEY_J), 158 KEY(3, 2, KEY_T),
163 KEY(3, 1, KEY_H),
164 KEY(3, 2, KEY_G),
165 KEY(3, 3, KEY_F), 159 KEY(3, 3, KEY_F),
166 KEY(3, 4, KEY_D), 160 KEY(3, 4, KEY_C),
167 KEY(3, 5, KEY_S), 161 KEY(4, 0, KEY_P),
168 KEY(3, 6, KEY_A), 162 KEY(4, 1, KEY_4),
169 KEY(3, 7, KEY_LEFTSHIFT), 163 KEY(4, 2, KEY_R),
170 KEY(4, 0, KEY_N), 164 KEY(4, 3, KEY_D),
171 KEY(4, 1, KEY_B),
172 KEY(4, 2, KEY_V),
173 KEY(4, 3, KEY_C),
174 KEY(4, 4, KEY_X), 165 KEY(4, 4, KEY_X),
175 KEY(4, 5, KEY_Z), 166 KEY(5, 0, KEY_K),
176 KEY(4, 6, KEY_DOT), 167 KEY(5, 1, KEY_3),
177 KEY(4, 7, KEY_COMMA), 168 KEY(5, 2, KEY_E),
178 KEY(5, 0, KEY_M), 169 KEY(5, 3, KEY_S),
179 KEY(5, 1, KEY_SPACE), 170 KEY(5, 4, KEY_Z),
180 KEY(5, 2, KEY_FN), 171 KEY(6, 0, KEY_L),
172 KEY(6, 1, KEY_2),
173 KEY(6, 2, KEY_W),
174 KEY(6, 3, KEY_A),
175 KEY(6, 4, KEY_DOT),
176 KEY(7, 0, KEY_ENTER),
177 KEY(7, 1, KEY_1),
178 KEY(7, 2, KEY_Q),
179 KEY(7, 3, KEY_LEFTSHIFT),
180 KEY(7, 4, KEY_COMMA),
181}; 181};
182 182
183static struct matrix_keymap_data board_map_data = { 183static struct matrix_keymap_data board_map_data = {
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index b45ad312c587..e34d96a825e3 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/input.h> 14#include <linux/input.h>
15#include <linux/input/matrix_keypad.h>
15#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
17#include <linux/i2c/twl4030.h> 18#include <linux/i2c/twl4030.h>
@@ -27,7 +28,6 @@
27#include <mach/common.h> 28#include <mach/common.h>
28#include <mach/dma.h> 29#include <mach/dma.h>
29#include <mach/gpmc.h> 30#include <mach/gpmc.h>
30#include <mach/keypad.h>
31#include <mach/onenand.h> 31#include <mach/onenand.h>
32#include <mach/gpmc-smc91x.h> 32#include <mach/gpmc-smc91x.h>
33 33
@@ -38,49 +38,49 @@
38 38
39static int board_keymap[] = { 39static int board_keymap[] = {
40 KEY(0, 0, KEY_Q), 40 KEY(0, 0, KEY_Q),
41 KEY(0, 1, KEY_W), 41 KEY(0, 1, KEY_O),
42 KEY(0, 2, KEY_E), 42 KEY(0, 2, KEY_P),
43 KEY(0, 3, KEY_R), 43 KEY(0, 3, KEY_COMMA),
44 KEY(0, 4, KEY_T), 44 KEY(0, 4, KEY_BACKSPACE),
45 KEY(0, 5, KEY_Y), 45 KEY(0, 6, KEY_A),
46 KEY(0, 6, KEY_U), 46 KEY(0, 7, KEY_S),
47 KEY(0, 7, KEY_I), 47 KEY(1, 0, KEY_W),
48 KEY(1, 0, KEY_O),
49 KEY(1, 1, KEY_D), 48 KEY(1, 1, KEY_D),
50 KEY(1, 2, KEY_DOT), 49 KEY(1, 2, KEY_F),
51 KEY(1, 3, KEY_V), 50 KEY(1, 3, KEY_G),
52 KEY(1, 4, KEY_DOWN), 51 KEY(1, 4, KEY_H),
53 KEY(2, 0, KEY_P), 52 KEY(1, 5, KEY_J),
54 KEY(2, 1, KEY_F), 53 KEY(1, 6, KEY_K),
54 KEY(1, 7, KEY_L),
55 KEY(2, 0, KEY_E),
56 KEY(2, 1, KEY_DOT),
55 KEY(2, 2, KEY_UP), 57 KEY(2, 2, KEY_UP),
56 KEY(2, 3, KEY_B), 58 KEY(2, 3, KEY_ENTER),
57 KEY(2, 4, KEY_RIGHT), 59 KEY(2, 5, KEY_Z),
58 KEY(3, 0, KEY_COMMA), 60 KEY(2, 6, KEY_X),
59 KEY(3, 1, KEY_G), 61 KEY(2, 7, KEY_C),
60 KEY(3, 2, KEY_ENTER), 62 KEY(3, 0, KEY_R),
63 KEY(3, 1, KEY_V),
64 KEY(3, 2, KEY_B),
61 KEY(3, 3, KEY_N), 65 KEY(3, 3, KEY_N),
62 KEY(4, 0, KEY_BACKSPACE), 66 KEY(3, 4, KEY_M),
63 KEY(4, 1, KEY_H), 67 KEY(3, 5, KEY_SPACE),
64 KEY(4, 3, KEY_M), 68 KEY(3, 6, KEY_SPACE),
69 KEY(3, 7, KEY_LEFT),
70 KEY(4, 0, KEY_T),
71 KEY(4, 1, KEY_DOWN),
72 KEY(4, 2, KEY_RIGHT),
65 KEY(4, 4, KEY_LEFTCTRL), 73 KEY(4, 4, KEY_LEFTCTRL),
66 KEY(5, 1, KEY_J), 74 KEY(4, 5, KEY_RIGHTALT),
67 KEY(5, 2, KEY_Z), 75 KEY(4, 6, KEY_LEFTSHIFT),
68 KEY(5, 3, KEY_SPACE), 76 KEY(5, 0, KEY_Y),
69 KEY(5, 4, KEY_LEFTSHIFT), 77 KEY(6, 0, KEY_U),
70 KEY(6, 0, KEY_A), 78 KEY(7, 0, KEY_I),
71 KEY(6, 1, KEY_K), 79 KEY(7, 1, KEY_F7),
72 KEY(6, 2, KEY_X), 80 KEY(7, 2, KEY_F8),
73 KEY(6, 3, KEY_SPACE), 81 KEY(0xff, 2, KEY_F9),
74 KEY(6, 4, KEY_FN), 82 KEY(0xff, 4, KEY_F10),
75 KEY(7, 0, KEY_S), 83 KEY(0xff, 5, KEY_F11),
76 KEY(7, 1, KEY_L),
77 KEY(7, 2, KEY_C),
78 KEY(7, 3, KEY_LEFT),
79 KEY(0xff, 0, KEY_F6),
80 KEY(0xff, 1, KEY_F7),
81 KEY(0xff, 2, KEY_F8),
82 KEY(0xff, 4, KEY_F9),
83 KEY(0xff, 5, KEY_F10),
84}; 84};
85 85
86static struct matrix_keymap_data board_map_data = { 86static struct matrix_keymap_data board_map_data = {
@@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void)
444 rx51_twldata.vaux3 = &rx51_vaux3_cam; 444 rx51_twldata.vaux3 = &rx51_vaux3_cam;
445 rx51_twldata.vmmc2 = &rx51_vmmc2; 445 rx51_twldata.vmmc2 = &rx51_vmmc2;
446 } 446 }
447 omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, 447 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
448 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); 448 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
449 omap_register_i2c_bus(2, 100, NULL, 0); 449 omap_register_i2c_bus(2, 100, NULL, 0);
450 omap_register_i2c_bus(3, 400, NULL, 0); 450 omap_register_i2c_bus(3, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index f9196c3b1a7b..78869a9a1cc2 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -26,7 +26,6 @@
26#include <mach/mux.h> 26#include <mach/mux.h>
27#include <mach/board.h> 27#include <mach/board.h>
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/keypad.h>
30#include <mach/dma.h> 29#include <mach/dma.h>
31#include <mach/gpmc.h> 30#include <mach/gpmc.h>
32#include <mach/usb.h> 31#include <mach/usb.h>
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index b7b32208ced7..51e0b3ba5f3a 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/input.h> 15#include <linux/input.h>
16#include <linux/input/matrix_keypad.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
17#include <linux/i2c/twl4030.h> 18#include <linux/i2c/twl4030.h>
18#include <linux/regulator/machine.h> 19#include <linux/regulator/machine.h>
@@ -22,64 +23,63 @@
22 23
23#include <mach/common.h> 24#include <mach/common.h>
24#include <mach/usb.h> 25#include <mach/usb.h>
25#include <mach/keypad.h>
26 26
27#include "mmc-twl4030.h" 27#include "mmc-twl4030.h"
28#include "sdram-micron-mt46h32m32lf-6.h"
28 29
29/* Zoom2 has Qwerty keyboard*/ 30/* Zoom2 has Qwerty keyboard*/
30static int board_keymap[] = { 31static int board_keymap[] = {
31 KEY(0, 0, KEY_E), 32 KEY(0, 0, KEY_E),
32 KEY(1, 0, KEY_R), 33 KEY(0, 1, KEY_R),
33 KEY(2, 0, KEY_T), 34 KEY(0, 2, KEY_T),
34 KEY(3, 0, KEY_HOME), 35 KEY(0, 3, KEY_HOME),
35 KEY(6, 0, KEY_I), 36 KEY(0, 6, KEY_I),
36 KEY(7, 0, KEY_LEFTSHIFT), 37 KEY(0, 7, KEY_LEFTSHIFT),
37 KEY(0, 1, KEY_D), 38 KEY(1, 0, KEY_D),
38 KEY(1, 1, KEY_F), 39 KEY(1, 1, KEY_F),
39 KEY(2, 1, KEY_G), 40 KEY(1, 2, KEY_G),
40 KEY(3, 1, KEY_SEND), 41 KEY(1, 3, KEY_SEND),
41 KEY(6, 1, KEY_K), 42 KEY(1, 6, KEY_K),
42 KEY(7, 1, KEY_ENTER), 43 KEY(1, 7, KEY_ENTER),
43 KEY(0, 2, KEY_X), 44 KEY(2, 0, KEY_X),
44 KEY(1, 2, KEY_C), 45 KEY(2, 1, KEY_C),
45 KEY(2, 2, KEY_V), 46 KEY(2, 2, KEY_V),
46 KEY(3, 2, KEY_END), 47 KEY(2, 3, KEY_END),
47 KEY(6, 2, KEY_DOT), 48 KEY(2, 6, KEY_DOT),
48 KEY(7, 2, KEY_CAPSLOCK), 49 KEY(2, 7, KEY_CAPSLOCK),
49 KEY(0, 3, KEY_Z), 50 KEY(3, 0, KEY_Z),
50 KEY(1, 3, KEY_KPPLUS), 51 KEY(3, 1, KEY_KPPLUS),
51 KEY(2, 3, KEY_B), 52 KEY(3, 2, KEY_B),
52 KEY(3, 3, KEY_F1), 53 KEY(3, 3, KEY_F1),
53 KEY(6, 3, KEY_O), 54 KEY(3, 6, KEY_O),
54 KEY(7, 3, KEY_SPACE), 55 KEY(3, 7, KEY_SPACE),
55 KEY(0, 4, KEY_W), 56 KEY(4, 0, KEY_W),
56 KEY(1, 4, KEY_Y), 57 KEY(4, 1, KEY_Y),
57 KEY(2, 4, KEY_U), 58 KEY(4, 2, KEY_U),
58 KEY(3, 4, KEY_F2), 59 KEY(4, 3, KEY_F2),
59 KEY(4, 4, KEY_VOLUMEUP), 60 KEY(4, 4, KEY_VOLUMEUP),
60 KEY(6, 4, KEY_L), 61 KEY(4, 6, KEY_L),
61 KEY(7, 4, KEY_LEFT), 62 KEY(4, 7, KEY_LEFT),
62 KEY(0, 5, KEY_S), 63 KEY(5, 0, KEY_S),
63 KEY(1, 5, KEY_H), 64 KEY(5, 1, KEY_H),
64 KEY(2, 5, KEY_J), 65 KEY(5, 2, KEY_J),
65 KEY(3, 5, KEY_F3), 66 KEY(5, 3, KEY_F3),
66 KEY(5, 5, KEY_VOLUMEDOWN), 67 KEY(5, 5, KEY_VOLUMEDOWN),
67 KEY(6, 5, KEY_M), 68 KEY(5, 6, KEY_M),
68 KEY(4, 5, KEY_ENTER), 69 KEY(5, 7, KEY_ENTER),
69 KEY(7, 5, KEY_RIGHT), 70 KEY(6, 0, KEY_Q),
70 KEY(0, 6, KEY_Q), 71 KEY(6, 1, KEY_A),
71 KEY(1, 6, KEY_A), 72 KEY(6, 2, KEY_N),
72 KEY(2, 6, KEY_N), 73 KEY(6, 3, KEY_BACKSPACE),
73 KEY(3, 6, KEY_BACKSPACE),
74 KEY(6, 6, KEY_P), 74 KEY(6, 6, KEY_P),
75 KEY(7, 6, KEY_UP),
76 KEY(6, 7, KEY_SELECT), 75 KEY(6, 7, KEY_SELECT),
77 KEY(7, 7, KEY_DOWN), 76 KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */
78 KEY(0, 7, KEY_PROG1), /*MACRO 1 <User defined> */ 77 KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */
79 KEY(1, 7, KEY_PROG2), /*MACRO 2 <User defined> */ 78 KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */
80 KEY(2, 7, KEY_PROG3), /*MACRO 3 <User defined> */ 79 KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */
81 KEY(3, 7, KEY_PROG4), /*MACRO 4 <User defined> */ 80 KEY(7, 5, KEY_RIGHT),
82 0 81 KEY(7, 6, KEY_UP),
82 KEY(7, 7, KEY_DOWN)
83}; 83};
84 84
85static struct matrix_keymap_data board_map_data = { 85static struct matrix_keymap_data board_map_data = {
@@ -213,7 +213,8 @@ static void __init omap_zoom2_init_irq(void)
213{ 213{
214 omap_board_config = zoom2_config; 214 omap_board_config = zoom2_config;
215 omap_board_config_size = ARRAY_SIZE(zoom2_config); 215 omap_board_config_size = ARRAY_SIZE(zoom2_config);
216 omap2_init_common_hw(NULL, NULL); 216 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
217 mt46h32m32lf6_sdrc_params);
217 omap_init_irq(); 218 omap_init_irq();
218 omap_gpio_init(); 219 omap_gpio_init();
219} 220}
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index bc5d3ac66611..e2dbedd581e8 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -769,6 +769,7 @@ int __init omap2_clk_init(void)
769 if (c->cpu & cpu_mask) { 769 if (c->cpu & cpu_mask) {
770 clkdev_add(&c->lk); 770 clkdev_add(&c->lk);
771 clk_register(c->lk.clk); 771 clk_register(c->lk.clk);
772 omap2_init_clk_clkdm(c->lk.clk);
772 } 773 }
773 774
774 /* Check the MPU rate set by bootloader */ 775 /* Check the MPU rate set by bootloader */
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index fafcd32e6907..7c5c00df3c70 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -338,6 +338,13 @@ static struct omap_clk omap34xx_clks[] = {
338 */ 338 */
339#define SDRC_MPURATE_LOOPS 96 339#define SDRC_MPURATE_LOOPS 96
340 340
341/*
342 * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
343 * that are sourced by DPLL5, and both of these require this clock
344 * to be at 120 MHz for proper operation.
345 */
346#define DPLL5_FREQ_FOR_USBHOST 120000000
347
341/** 348/**
342 * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI 349 * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI
343 * @clk: struct clk * being enabled 350 * @clk: struct clk * being enabled
@@ -466,7 +473,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n)
466 unsigned long fint; 473 unsigned long fint;
467 u16 f = 0; 474 u16 f = 0;
468 475
469 fint = clk->dpll_data->clk_ref->rate / (n + 1); 476 fint = clk->dpll_data->clk_ref->rate / n;
470 477
471 pr_debug("clock: fint is %lu\n", fint); 478 pr_debug("clock: fint is %lu\n", fint);
472 479
@@ -1056,6 +1063,28 @@ void omap2_clk_prepare_for_reboot(void)
1056#endif 1063#endif
1057} 1064}
1058 1065
1066static void omap3_clk_lock_dpll5(void)
1067{
1068 struct clk *dpll5_clk;
1069 struct clk *dpll5_m2_clk;
1070
1071 dpll5_clk = clk_get(NULL, "dpll5_ck");
1072 clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
1073 clk_enable(dpll5_clk);
1074
1075 /* Enable autoidle to allow it to enter low power bypass */
1076 omap3_dpll_allow_idle(dpll5_clk);
1077
1078 /* Program dpll5_m2_clk divider for no division */
1079 dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
1080 clk_enable(dpll5_m2_clk);
1081 clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
1082
1083 clk_disable(dpll5_m2_clk);
1084 clk_disable(dpll5_clk);
1085 return;
1086}
1087
1059/* REVISIT: Move this init stuff out into clock.c */ 1088/* REVISIT: Move this init stuff out into clock.c */
1060 1089
1061/* 1090/*
@@ -1148,6 +1177,12 @@ int __init omap2_clk_init(void)
1148 */ 1177 */
1149 clk_enable_init_clocks(); 1178 clk_enable_init_clocks();
1150 1179
1180 /*
1181 * Lock DPLL5 and put it in autoidle.
1182 */
1183 if (omap_rev() >= OMAP3430_REV_ES2_0)
1184 omap3_clk_lock_dpll5();
1185
1151 /* Avoid sleeping during omap2_clk_prepare_for_reboot() */ 1186 /* Avoid sleeping during omap2_clk_prepare_for_reboot() */
1152 /* REVISIT: not yet ready for 343x */ 1187 /* REVISIT: not yet ready for 343x */
1153#if 0 1188#if 0
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index c8119781e00a..9565c05bebd2 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -489,9 +489,9 @@ static struct clk core_ck = {
489static struct clk dpll3_m2x2_ck = { 489static struct clk dpll3_m2x2_ck = {
490 .name = "dpll3_m2x2_ck", 490 .name = "dpll3_m2x2_ck",
491 .ops = &clkops_null, 491 .ops = &clkops_null,
492 .parent = &dpll3_x2_ck, 492 .parent = &dpll3_m2_ck,
493 .clkdm_name = "dpll3_clkdm", 493 .clkdm_name = "dpll3_clkdm",
494 .recalc = &followparent_recalc, 494 .recalc = &omap3_clkoutx2_recalc,
495}; 495};
496 496
497/* The PWRDN bit is apparently only available on 3430ES2 and above */ 497/* The PWRDN bit is apparently only available on 3430ES2 and above */
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 4ef7b4f5474e..58aff8485df9 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
137 } 137 }
138} 138}
139 139
140/*
141 * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
142 * @clkdm: struct clockdomain *
143 * @enable: int 0 to disable, 1 to enable
144 *
145 * Internal helper for actually switching the bit that controls hwsup
146 * idle transitions for clkdm.
147 */
148static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
149{
150 u32 v;
151
152 if (cpu_is_omap24xx()) {
153 if (enable)
154 v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
155 else
156 v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
157 } else if (cpu_is_omap34xx()) {
158 if (enable)
159 v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
160 else
161 v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
162 } else {
163 BUG();
164 }
165
166 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
167 v << __ffs(clkdm->clktrctrl_mask),
168 clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
169}
140 170
141static struct clockdomain *_clkdm_lookup(const char *name) 171static struct clockdomain *_clkdm_lookup(const char *name)
142{ 172{
@@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
456 */ 486 */
457void omap2_clkdm_allow_idle(struct clockdomain *clkdm) 487void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
458{ 488{
459 u32 v;
460
461 if (!clkdm) 489 if (!clkdm)
462 return; 490 return;
463 491
@@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
473 if (atomic_read(&clkdm->usecount) > 0) 501 if (atomic_read(&clkdm->usecount) > 0)
474 _clkdm_add_autodeps(clkdm); 502 _clkdm_add_autodeps(clkdm);
475 503
476 if (cpu_is_omap24xx()) 504 _omap2_clkdm_set_hwsup(clkdm, 1);
477 v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
478 else if (cpu_is_omap34xx())
479 v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
480 else
481 BUG();
482
483
484 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
485 v << __ffs(clkdm->clktrctrl_mask),
486 clkdm->pwrdm.ptr->prcm_offs,
487 CM_CLKSTCTRL);
488 505
489 pwrdm_clkdm_state_switch(clkdm); 506 pwrdm_clkdm_state_switch(clkdm);
490} 507}
@@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
500 */ 517 */
501void omap2_clkdm_deny_idle(struct clockdomain *clkdm) 518void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
502{ 519{
503 u32 v;
504
505 if (!clkdm) 520 if (!clkdm)
506 return; 521 return;
507 522
@@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
514 pr_debug("clockdomain: disabling automatic idle transitions for %s\n", 529 pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
515 clkdm->name); 530 clkdm->name);
516 531
517 if (cpu_is_omap24xx()) 532 _omap2_clkdm_set_hwsup(clkdm, 0);
518 v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
519 else if (cpu_is_omap34xx())
520 v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
521 else
522 BUG();
523
524 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
525 v << __ffs(clkdm->clktrctrl_mask),
526 clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
527 533
528 if (atomic_read(&clkdm->usecount) > 0) 534 if (atomic_read(&clkdm->usecount) > 0)
529 _clkdm_del_autodeps(clkdm); 535 _clkdm_del_autodeps(clkdm);
@@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
569 v = omap2_clkdm_clktrctrl_read(clkdm); 575 v = omap2_clkdm_clktrctrl_read(clkdm);
570 576
571 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || 577 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
572 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) 578 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
579 /* Disable HW transitions when we are changing deps */
580 _omap2_clkdm_set_hwsup(clkdm, 0);
573 _clkdm_add_autodeps(clkdm); 581 _clkdm_add_autodeps(clkdm);
574 else 582 _omap2_clkdm_set_hwsup(clkdm, 1);
583 } else {
575 omap2_clkdm_wakeup(clkdm); 584 omap2_clkdm_wakeup(clkdm);
585 }
576 586
577 pwrdm_wait_transition(clkdm->pwrdm.ptr); 587 pwrdm_wait_transition(clkdm->pwrdm.ptr);
578 pwrdm_clkdm_state_switch(clkdm); 588 pwrdm_clkdm_state_switch(clkdm);
@@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
623 v = omap2_clkdm_clktrctrl_read(clkdm); 633 v = omap2_clkdm_clktrctrl_read(clkdm);
624 634
625 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || 635 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
626 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) 636 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
637 /* Disable HW transitions when we are changing deps */
638 _omap2_clkdm_set_hwsup(clkdm, 0);
627 _clkdm_del_autodeps(clkdm); 639 _clkdm_del_autodeps(clkdm);
628 else 640 _omap2_clkdm_set_hwsup(clkdm, 1);
641 } else {
629 omap2_clkdm_sleep(clkdm); 642 omap2_clkdm_sleep(clkdm);
643 }
630 644
631 pwrdm_clkdm_state_switch(clkdm); 645 pwrdm_clkdm_state_switch(clkdm);
632 646
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 15876828db23..f3c992e29651 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -366,7 +366,7 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
366 if (r < 0) 366 if (r < 0)
367 goto out; 367 goto out;
368 368
369 gpmc_cs_enable_mem(cs, res->start, res->end - res->start + 1); 369 gpmc_cs_enable_mem(cs, res->start, resource_size(res));
370 *base = res->start; 370 *base = res->start;
371 gpmc_cs_set_reserved(cs, 1); 371 gpmc_cs_set_reserved(cs, 1);
372out: 372out:
@@ -378,7 +378,7 @@ EXPORT_SYMBOL(gpmc_cs_request);
378void gpmc_cs_free(int cs) 378void gpmc_cs_free(int cs)
379{ 379{
380 spin_lock(&gpmc_mem_lock); 380 spin_lock(&gpmc_mem_lock);
381 if (cs >= GPMC_CS_NUM || !gpmc_cs_reserved(cs)) { 381 if (cs >= GPMC_CS_NUM || cs < 0 || !gpmc_cs_reserved(cs)) {
382 printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); 382 printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
383 BUG(); 383 BUG();
384 spin_unlock(&gpmc_mem_lock); 384 spin_unlock(&gpmc_mem_lock);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e3a3bad1d84f..56be87d13edb 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -302,7 +302,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
302 pwrdm_init(powerdomains_omap); 302 pwrdm_init(powerdomains_omap);
303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
304 omap2_clk_init(); 304 omap2_clk_init();
305#endif
305 omap_serial_early_init(); 306 omap_serial_early_init();
307#ifndef CONFIG_ARCH_OMAP4
306 omap_hwmod_late_init(); 308 omap_hwmod_late_init();
307 omap_pm_if_init(); 309 omap_pm_if_init();
308 omap2_sdrc_init(sdrc_cs0, sdrc_cs1); 310 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index c035ad3426d0..ef57b38a56a4 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -300,7 +300,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
300 dev_err(&pdev->dev, "invalid mem resource\n"); 300 dev_err(&pdev->dev, "invalid mem resource\n");
301 return -ENODEV; 301 return -ENODEV;
302 } 302 }
303 mbox_base = ioremap(res->start, res->end - res->start); 303 mbox_base = ioremap(res->start, resource_size(res));
304 if (!mbox_base) 304 if (!mbox_base)
305 return -ENOMEM; 305 return -ENOMEM;
306 306
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 1b4c1600f8d8..2fc4d6abbd0a 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -541,7 +541,7 @@ static int __init pm_dbg_init(void)
541 printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); 541 printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
542 return -ENODEV; 542 return -ENODEV;
543 } 543 }
544 544
545 d = debugfs_create_dir("pm_debug", NULL); 545 d = debugfs_create_dir("pm_debug", NULL);
546 if (IS_ERR(d)) 546 if (IS_ERR(d))
547 return PTR_ERR(d); 547 return PTR_ERR(d);
@@ -551,7 +551,7 @@ static int __init pm_dbg_init(void)
551 (void) debugfs_create_file("time", S_IRUGO, 551 (void) debugfs_create_file("time", S_IRUGO,
552 d, (void *)DEBUG_FILE_TIMERS, &debug_fops); 552 d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
553 553
554 pwrdm_for_each(pwrdms_setup, (void *)d); 554 pwrdm_for_each_nolock(pwrdms_setup, (void *)d);
555 555
556 pm_dbg_dir = debugfs_create_dir("registers", d); 556 pm_dbg_dir = debugfs_create_dir("registers", d);
557 if (IS_ERR(pm_dbg_dir)) 557 if (IS_ERR(pm_dbg_dir))
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ff5a6c53aa0..89463190923a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -51,97 +51,112 @@ static void (*_omap_sram_idle)(u32 *addr, int save_state);
51 51
52static struct powerdomain *mpu_pwrdm; 52static struct powerdomain *mpu_pwrdm;
53 53
54/* PRCM Interrupt Handler for wakeups */ 54/*
55static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) 55 * PRCM Interrupt Handler Helper Function
56 *
57 * The purpose of this function is to clear any wake-up events latched
58 * in the PRCM PM_WKST_x registers. It is possible that a wake-up event
59 * may occur whilst attempting to clear a PM_WKST_x register and thus
60 * set another bit in this register. A while loop is used to ensure
61 * that any peripheral wake-up events occurring while attempting to
62 * clear the PM_WKST_x are detected and cleared.
63 */
64static int prcm_clear_mod_irqs(s16 module, u8 regs)
56{ 65{
57 u32 wkst, irqstatus_mpu; 66 u32 wkst, fclk, iclk, clken;
58 u32 fclk, iclk; 67 u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
59 68 u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1;
60 /* WKUP */ 69 u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1;
61 wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST); 70 u16 grpsel_off = (regs == 3) ?
71 OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL;
72 int c = 0;
73
74 wkst = prm_read_mod_reg(module, wkst_off);
75 wkst &= prm_read_mod_reg(module, grpsel_off);
62 if (wkst) { 76 if (wkst) {
63 iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); 77 iclk = cm_read_mod_reg(module, iclk_off);
64 fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); 78 fclk = cm_read_mod_reg(module, fclk_off);
65 cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN); 79 while (wkst) {
66 cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN); 80 clken = wkst;
67 prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST); 81 cm_set_mod_reg_bits(clken, module, iclk_off);
68 while (prm_read_mod_reg(WKUP_MOD, PM_WKST)) 82 /*
69 cpu_relax(); 83 * For USBHOST, we don't know whether HOST1 or
70 cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN); 84 * HOST2 woke us up, so enable both f-clocks
71 cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN); 85 */
86 if (module == OMAP3430ES2_USBHOST_MOD)
87 clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT;
88 cm_set_mod_reg_bits(clken, module, fclk_off);
89 prm_write_mod_reg(wkst, module, wkst_off);
90 wkst = prm_read_mod_reg(module, wkst_off);
91 c++;
92 }
93 cm_write_mod_reg(iclk, module, iclk_off);
94 cm_write_mod_reg(fclk, module, fclk_off);
72 } 95 }
73 96
74 /* CORE */ 97 return c;
75 wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1); 98}
76 if (wkst) {
77 iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
78 fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
79 cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1);
80 cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1);
81 prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1);
82 while (prm_read_mod_reg(CORE_MOD, PM_WKST1))
83 cpu_relax();
84 cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN1);
85 cm_write_mod_reg(fclk, CORE_MOD, CM_FCLKEN1);
86 }
87 wkst = prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3);
88 if (wkst) {
89 iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
90 fclk = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
91 cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN3);
92 cm_set_mod_reg_bits(wkst, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
93 prm_write_mod_reg(wkst, CORE_MOD, OMAP3430ES2_PM_WKST3);
94 while (prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3))
95 cpu_relax();
96 cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN3);
97 cm_write_mod_reg(fclk, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
98 }
99 99
100 /* PER */ 100static int _prcm_int_handle_wakeup(void)
101 wkst = prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST); 101{
102 if (wkst) { 102 int c;
103 iclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
104 fclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
105 cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_ICLKEN);
106 cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_FCLKEN);
107 prm_write_mod_reg(wkst, OMAP3430_PER_MOD, PM_WKST);
108 while (prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST))
109 cpu_relax();
110 cm_write_mod_reg(iclk, OMAP3430_PER_MOD, CM_ICLKEN);
111 cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN);
112 }
113 103
104 c = prcm_clear_mod_irqs(WKUP_MOD, 1);
105 c += prcm_clear_mod_irqs(CORE_MOD, 1);
106 c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
114 if (omap_rev() > OMAP3430_REV_ES1_0) { 107 if (omap_rev() > OMAP3430_REV_ES1_0) {
115 /* USBHOST */ 108 c += prcm_clear_mod_irqs(CORE_MOD, 3);
116 wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST); 109 c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
117 if (wkst) {
118 iclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
119 CM_ICLKEN);
120 fclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
121 CM_FCLKEN);
122 cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
123 CM_ICLKEN);
124 cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
125 CM_FCLKEN);
126 prm_write_mod_reg(wkst, OMAP3430ES2_USBHOST_MOD,
127 PM_WKST);
128 while (prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
129 PM_WKST))
130 cpu_relax();
131 cm_write_mod_reg(iclk, OMAP3430ES2_USBHOST_MOD,
132 CM_ICLKEN);
133 cm_write_mod_reg(fclk, OMAP3430ES2_USBHOST_MOD,
134 CM_FCLKEN);
135 }
136 } 110 }
137 111
138 irqstatus_mpu = prm_read_mod_reg(OCP_MOD, 112 return c;
139 OMAP3_PRM_IRQSTATUS_MPU_OFFSET); 113}
140 prm_write_mod_reg(irqstatus_mpu, OCP_MOD, 114
141 OMAP3_PRM_IRQSTATUS_MPU_OFFSET); 115/*
116 * PRCM Interrupt Handler
117 *
118 * The PRM_IRQSTATUS_MPU register indicates if there are any pending
119 * interrupts from the PRCM for the MPU. These bits must be cleared in
120 * order to clear the PRCM interrupt. The PRCM interrupt handler is
121 * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
122 * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
123 * register indicates that a wake-up event is pending for the MPU and
124 * this bit can only be cleared if the all the wake-up events latched
125 * in the various PM_WKST_x registers have been cleared. The interrupt
126 * handler is implemented using a do-while loop so that if a wake-up
127 * event occurred during the processing of the prcm interrupt handler
128 * (setting a bit in the corresponding PM_WKST_x register and thus
129 * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
130 * this would be handled.
131 */
132static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
133{
134 u32 irqstatus_mpu;
135 int c = 0;
136
137 do {
138 irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
139 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
140
141 if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) {
142 c = _prcm_int_handle_wakeup();
143
144 /*
145 * Is the MPU PRCM interrupt handler racing with the
146 * IVA2 PRCM interrupt handler ?
147 */
148 WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup "
149 "but no wakeup sources are marked\n");
150 } else {
151 /* XXX we need to expand our PRCM interrupt handler */
152 WARN(1, "prcm: WARNING: PRCM interrupt received, but "
153 "no code to handle it (%08x)\n", irqstatus_mpu);
154 }
155
156 prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
157 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
142 158
143 while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET)) 159 } while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET));
144 cpu_relax();
145 160
146 return IRQ_HANDLED; 161 return IRQ_HANDLED;
147} 162}
@@ -624,6 +639,17 @@ static void __init prcm_setup_regs(void)
624 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, 639 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
625 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); 640 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
626 641
642 /* Enable wakeups in PER */
643 prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
644 OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
645 OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3,
646 OMAP3430_PER_MOD, PM_WKEN);
647 /* and allow them to wake up MPU */
648 prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
649 OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
650 OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3,
651 OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
652
627 /* Don't attach IVA interrupts */ 653 /* Don't attach IVA interrupts */
628 prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); 654 prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
629 prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); 655 prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 2594cbff3947..f00289abd30f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -273,35 +273,50 @@ struct powerdomain *pwrdm_lookup(const char *name)
273} 273}
274 274
275/** 275/**
276 * pwrdm_for_each - call function on each registered clockdomain 276 * pwrdm_for_each_nolock - call function on each registered clockdomain
277 * @fn: callback function * 277 * @fn: callback function *
278 * 278 *
279 * Call the supplied function for each registered powerdomain. The 279 * Call the supplied function for each registered powerdomain. The
280 * callback function can return anything but 0 to bail out early from 280 * callback function can return anything but 0 to bail out early from
281 * the iterator. The callback function is called with the pwrdm_rwlock 281 * the iterator. Returns the last return value of the callback function, which
282 * held for reading, so no powerdomain structure manipulation 282 * should be 0 for success or anything else to indicate failure; or -EINVAL if
283 * functions should be called from the callback, although hardware 283 * the function pointer is null.
284 * powerdomain control functions are fine. Returns the last return
285 * value of the callback function, which should be 0 for success or
286 * anything else to indicate failure; or -EINVAL if the function
287 * pointer is null.
288 */ 284 */
289int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), 285int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
290 void *user) 286 void *user)
291{ 287{
292 struct powerdomain *temp_pwrdm; 288 struct powerdomain *temp_pwrdm;
293 unsigned long flags;
294 int ret = 0; 289 int ret = 0;
295 290
296 if (!fn) 291 if (!fn)
297 return -EINVAL; 292 return -EINVAL;
298 293
299 read_lock_irqsave(&pwrdm_rwlock, flags);
300 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { 294 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
301 ret = (*fn)(temp_pwrdm, user); 295 ret = (*fn)(temp_pwrdm, user);
302 if (ret) 296 if (ret)
303 break; 297 break;
304 } 298 }
299
300 return ret;
301}
302
303/**
304 * pwrdm_for_each - call function on each registered clockdomain
305 * @fn: callback function *
306 *
307 * This function is the same as 'pwrdm_for_each_nolock()', but keeps the
308 * &pwrdm_rwlock locked for reading, so no powerdomain structure manipulation
309 * functions should be called from the callback, although hardware powerdomain
310 * control functions are fine.
311 */
312int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
313 void *user)
314{
315 unsigned long flags;
316 int ret;
317
318 read_lock_irqsave(&pwrdm_rwlock, flags);
319 ret = pwrdm_for_each_nolock(fn, user);
305 read_unlock_irqrestore(&pwrdm_rwlock, flags); 320 read_unlock_irqrestore(&pwrdm_rwlock, flags);
306 321
307 return ret; 322 return ret;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ae2186892c85..54dfeb5d5667 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -109,16 +109,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
109 .regshift = 2, 109 .regshift = 2,
110 .uartclk = OMAP24XX_BASE_BAUD * 16, 110 .uartclk = OMAP24XX_BASE_BAUD * 16,
111 }, { 111 }, {
112#ifdef CONFIG_ARCH_OMAP4
113 .membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
114 .mapbase = OMAP_UART4_BASE,
115 .irq = 70,
116 .flags = UPF_BOOT_AUTOCONF,
117 .iotype = UPIO_MEM,
118 .regshift = 2,
119 .uartclk = OMAP24XX_BASE_BAUD * 16,
120 }, {
121#endif
122 .flags = 0 112 .flags = 0
123 } 113 }
124}; 114};
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