diff options
Diffstat (limited to 'arch/arm/mach-omap2')
35 files changed, 285 insertions, 407 deletions
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index a39fc4bbd2b8..130ab00c09a2 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/usb/otg.h> | 20 | #include <linux/usb/otg.h> |
21 | #include <linux/spi/spi.h> | 21 | #include <linux/spi/spi.h> |
22 | #include <linux/i2c/twl.h> | 22 | #include <linux/i2c/twl.h> |
23 | #include <linux/mfd/twl6040.h> | ||
23 | #include <linux/gpio_keys.h> | 24 | #include <linux/gpio_keys.h> |
24 | #include <linux/regulator/machine.h> | 25 | #include <linux/regulator/machine.h> |
25 | #include <linux/regulator/fixed.h> | 26 | #include <linux/regulator/fixed.h> |
@@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = { | |||
560 | }, | 561 | }, |
561 | }; | 562 | }; |
562 | 563 | ||
563 | static struct twl4030_codec_data twl6040_codec = { | 564 | static struct twl6040_codec_data twl6040_codec = { |
564 | /* single-step ramp for headset and handsfree */ | 565 | /* single-step ramp for headset and handsfree */ |
565 | .hs_left_step = 0x0f, | 566 | .hs_left_step = 0x0f, |
566 | .hs_right_step = 0x0f, | 567 | .hs_right_step = 0x0f, |
@@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = { | |||
568 | .hf_right_step = 0x1d, | 569 | .hf_right_step = 0x1d, |
569 | }; | 570 | }; |
570 | 571 | ||
571 | static struct twl4030_vibra_data twl6040_vibra = { | 572 | static struct twl6040_vibra_data twl6040_vibra = { |
572 | .vibldrv_res = 8, | 573 | .vibldrv_res = 8, |
573 | .vibrdrv_res = 3, | 574 | .vibrdrv_res = 3, |
574 | .viblmotor_res = 10, | 575 | .viblmotor_res = 10, |
@@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = { | |||
577 | .vddvibr_uV = 0, /* fixed volt supply - VBAT */ | 578 | .vddvibr_uV = 0, /* fixed volt supply - VBAT */ |
578 | }; | 579 | }; |
579 | 580 | ||
580 | static struct twl4030_audio_data twl6040_audio = { | 581 | static struct twl6040_platform_data twl6040_data = { |
581 | .codec = &twl6040_codec, | 582 | .codec = &twl6040_codec, |
582 | .vibra = &twl6040_vibra, | 583 | .vibra = &twl6040_vibra, |
583 | .audpwron_gpio = 127, | 584 | .audpwron_gpio = 127, |
584 | .naudint_irq = OMAP44XX_IRQ_SYS_2N, | ||
585 | .irq_base = TWL6040_CODEC_IRQ_BASE, | 585 | .irq_base = TWL6040_CODEC_IRQ_BASE, |
586 | }; | 586 | }; |
587 | 587 | ||
588 | static struct twl4030_platform_data sdp4430_twldata = { | 588 | static struct twl4030_platform_data sdp4430_twldata = { |
589 | .audio = &twl6040_audio, | ||
590 | /* Regulators */ | 589 | /* Regulators */ |
591 | .vusim = &sdp4430_vusim, | 590 | .vusim = &sdp4430_vusim, |
592 | .vaux1 = &sdp4430_vaux1, | 591 | .vaux1 = &sdp4430_vaux1, |
@@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void) | |||
617 | TWL_COMMON_REGULATOR_VCXIO | | 616 | TWL_COMMON_REGULATOR_VCXIO | |
618 | TWL_COMMON_REGULATOR_VUSB | | 617 | TWL_COMMON_REGULATOR_VUSB | |
619 | TWL_COMMON_REGULATOR_CLK32KG); | 618 | TWL_COMMON_REGULATOR_CLK32KG); |
620 | omap4_pmic_init("twl6030", &sdp4430_twldata); | 619 | omap4_pmic_init("twl6030", &sdp4430_twldata, |
620 | &twl6040_data, OMAP44XX_IRQ_SYS_2N); | ||
621 | omap_register_i2c_bus(2, 400, NULL, 0); | 621 | omap_register_i2c_bus(2, 400, NULL, 0); |
622 | omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, | 622 | omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, |
623 | ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); | 623 | ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 41b0a2fe0b04..909a8b91b564 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <linux/i2c/at24.h> | 27 | #include <linux/i2c/at24.h> |
28 | #include <linux/i2c/twl.h> | 28 | #include <linux/i2c/twl.h> |
29 | #include <linux/regulator/fixed.h> | ||
29 | #include <linux/regulator/machine.h> | 30 | #include <linux/regulator/machine.h> |
30 | #include <linux/mmc/host.h> | 31 | #include <linux/mmc/host.h> |
31 | 32 | ||
@@ -81,8 +82,23 @@ static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = { | |||
81 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | 82 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, |
82 | }; | 83 | }; |
83 | 84 | ||
85 | static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = { | ||
86 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
87 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
88 | }; | ||
89 | |||
90 | static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = { | ||
91 | REGULATOR_SUPPLY("vddvario", "smsc911x.1"), | ||
92 | REGULATOR_SUPPLY("vdd33a", "smsc911x.1"), | ||
93 | }; | ||
94 | |||
84 | static void __init cm_t35_init_ethernet(void) | 95 | static void __init cm_t35_init_ethernet(void) |
85 | { | 96 | { |
97 | regulator_register_fixed(0, cm_t35_smsc911x_supplies, | ||
98 | ARRAY_SIZE(cm_t35_smsc911x_supplies)); | ||
99 | regulator_register_fixed(1, sb_t35_smsc911x_supplies, | ||
100 | ARRAY_SIZE(sb_t35_smsc911x_supplies)); | ||
101 | |||
86 | gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); | 102 | gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); |
87 | gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); | 103 | gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); |
88 | } | 104 | } |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 74e1687b5170..098d183a0086 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = { | |||
137 | 137 | ||
138 | static void __init omap4_i2c_init(void) | 138 | static void __init omap4_i2c_init(void) |
139 | { | 139 | { |
140 | omap4_pmic_init("twl6030", &sdp4430_twldata); | 140 | omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0); |
141 | } | 141 | } |
142 | 142 | ||
143 | static void __init omap4_init(void) | 143 | static void __init omap4_init(void) |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index e558800adfdf..930c0d380435 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -634,8 +634,14 @@ static void __init igep_wlan_bt_init(void) | |||
634 | static inline void __init igep_wlan_bt_init(void) { } | 634 | static inline void __init igep_wlan_bt_init(void) { } |
635 | #endif | 635 | #endif |
636 | 636 | ||
637 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
638 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
639 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
640 | }; | ||
641 | |||
637 | static void __init igep_init(void) | 642 | static void __init igep_init(void) |
638 | { | 643 | { |
644 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
639 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 645 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
640 | 646 | ||
641 | /* Get IGEP2 hardware revision */ | 647 | /* Get IGEP2 hardware revision */ |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d50a562adfa0..1b6049567ab4 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/spi/spi.h> | 24 | #include <linux/spi/spi.h> |
25 | #include <linux/regulator/fixed.h> | ||
25 | #include <linux/regulator/machine.h> | 26 | #include <linux/regulator/machine.h> |
26 | #include <linux/i2c/twl.h> | 27 | #include <linux/i2c/twl.h> |
27 | #include <linux/io.h> | 28 | #include <linux/io.h> |
@@ -410,8 +411,14 @@ static struct mtd_partition ldp_nand_partitions[] = { | |||
410 | 411 | ||
411 | }; | 412 | }; |
412 | 413 | ||
414 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
415 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
416 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
417 | }; | ||
418 | |||
413 | static void __init omap_ldp_init(void) | 419 | static void __init omap_ldp_init(void) |
414 | { | 420 | { |
421 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
415 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 422 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
416 | ldp_init_smsc911x(); | 423 | ldp_init_smsc911x(); |
417 | omap_i2c_init(); | 424 | omap_i2c_init(); |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 4c90f078abe1..49df12735b41 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -114,15 +114,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = { | |||
114 | 114 | ||
115 | static inline void __init omap3evm_init_smsc911x(void) | 115 | static inline void __init omap3evm_init_smsc911x(void) |
116 | { | 116 | { |
117 | struct clk *l3ck; | ||
118 | unsigned int rate; | ||
119 | |||
120 | l3ck = clk_get(NULL, "l3_ck"); | ||
121 | if (IS_ERR(l3ck)) | ||
122 | rate = 100000000; | ||
123 | else | ||
124 | rate = clk_get_rate(l3ck); | ||
125 | |||
126 | /* Configure ethernet controller reset gpio */ | 117 | /* Configure ethernet controller reset gpio */ |
127 | if (cpu_is_omap3430()) { | 118 | if (cpu_is_omap3430()) { |
128 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) | 119 | if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) |
@@ -632,9 +623,15 @@ static void __init omap3_evm_wl12xx_init(void) | |||
632 | #endif | 623 | #endif |
633 | } | 624 | } |
634 | 625 | ||
626 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
627 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
628 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
629 | }; | ||
630 | |||
635 | static void __init omap3_evm_init(void) | 631 | static void __init omap3_evm_init(void) |
636 | { | 632 | { |
637 | omap3_evm_get_revision(); | 633 | omap3_evm_get_revision(); |
634 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
638 | 635 | ||
639 | if (cpu_is_omap3630()) | 636 | if (cpu_is_omap3630()) |
640 | omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB); | 637 | omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB); |
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 4a7d8c8a75da..9b3c141ff51b 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | 25 | ||
26 | #include <linux/regulator/fixed.h> | ||
26 | #include <linux/regulator/machine.h> | 27 | #include <linux/regulator/machine.h> |
27 | 28 | ||
28 | #include <linux/i2c/twl.h> | 29 | #include <linux/i2c/twl.h> |
@@ -188,8 +189,14 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
188 | }; | 189 | }; |
189 | #endif | 190 | #endif |
190 | 191 | ||
192 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
193 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
194 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
195 | }; | ||
196 | |||
191 | static void __init omap3logic_init(void) | 197 | static void __init omap3logic_init(void) |
192 | { | 198 | { |
199 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
193 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 200 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
194 | omap3torpedo_fix_pbias_voltage(); | 201 | omap3torpedo_fix_pbias_voltage(); |
195 | omap3logic_i2c_init(); | 202 | omap3logic_i2c_init(); |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 641004380795..4dffc95bddd2 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/input.h> | 24 | #include <linux/input.h> |
25 | #include <linux/gpio_keys.h> | 25 | #include <linux/gpio_keys.h> |
26 | 26 | ||
27 | #include <linux/regulator/fixed.h> | ||
27 | #include <linux/regulator/machine.h> | 28 | #include <linux/regulator/machine.h> |
28 | #include <linux/i2c/twl.h> | 29 | #include <linux/i2c/twl.h> |
29 | #include <linux/mmc/host.h> | 30 | #include <linux/mmc/host.h> |
@@ -72,15 +73,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = { | |||
72 | 73 | ||
73 | static inline void __init omap3stalker_init_eth(void) | 74 | static inline void __init omap3stalker_init_eth(void) |
74 | { | 75 | { |
75 | struct clk *l3ck; | ||
76 | unsigned int rate; | ||
77 | |||
78 | l3ck = clk_get(NULL, "l3_ck"); | ||
79 | if (IS_ERR(l3ck)) | ||
80 | rate = 100000000; | ||
81 | else | ||
82 | rate = clk_get_rate(l3ck); | ||
83 | |||
84 | omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); | 76 | omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); |
85 | gpmc_smsc911x_init(&smsc911x_cfg); | 77 | gpmc_smsc911x_init(&smsc911x_cfg); |
86 | } | 78 | } |
@@ -419,8 +411,14 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
419 | }; | 411 | }; |
420 | #endif | 412 | #endif |
421 | 413 | ||
414 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
415 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
416 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
417 | }; | ||
418 | |||
422 | static void __init omap3_stalker_init(void) | 419 | static void __init omap3_stalker_init(void) |
423 | { | 420 | { |
421 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
424 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); | 422 | omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); |
425 | omap_board_config = omap3_stalker_config; | 423 | omap_board_config = omap3_stalker_config; |
426 | omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); | 424 | omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index d8c0e89f0126..1b782ba53433 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/usb/otg.h> | 26 | #include <linux/usb/otg.h> |
27 | #include <linux/i2c/twl.h> | 27 | #include <linux/i2c/twl.h> |
28 | #include <linux/mfd/twl6040.h> | ||
28 | #include <linux/regulator/machine.h> | 29 | #include <linux/regulator/machine.h> |
29 | #include <linux/regulator/fixed.h> | 30 | #include <linux/regulator/fixed.h> |
30 | #include <linux/wl12xx.h> | 31 | #include <linux/wl12xx.h> |
@@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
284 | return 0; | 285 | return 0; |
285 | } | 286 | } |
286 | 287 | ||
287 | static struct twl4030_codec_data twl6040_codec = { | 288 | static struct twl6040_codec_data twl6040_codec = { |
288 | /* single-step ramp for headset and handsfree */ | 289 | /* single-step ramp for headset and handsfree */ |
289 | .hs_left_step = 0x0f, | 290 | .hs_left_step = 0x0f, |
290 | .hs_right_step = 0x0f, | 291 | .hs_right_step = 0x0f, |
@@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = { | |||
292 | .hf_right_step = 0x1d, | 293 | .hf_right_step = 0x1d, |
293 | }; | 294 | }; |
294 | 295 | ||
295 | static struct twl4030_audio_data twl6040_audio = { | 296 | static struct twl6040_platform_data twl6040_data = { |
296 | .codec = &twl6040_codec, | 297 | .codec = &twl6040_codec, |
297 | .audpwron_gpio = 127, | 298 | .audpwron_gpio = 127, |
298 | .naudint_irq = OMAP44XX_IRQ_SYS_2N, | ||
299 | .irq_base = TWL6040_CODEC_IRQ_BASE, | 299 | .irq_base = TWL6040_CODEC_IRQ_BASE, |
300 | }; | 300 | }; |
301 | 301 | ||
302 | /* Panda board uses the common PMIC configuration */ | 302 | /* Panda board uses the common PMIC configuration */ |
303 | static struct twl4030_platform_data omap4_panda_twldata = { | 303 | static struct twl4030_platform_data omap4_panda_twldata; |
304 | .audio = &twl6040_audio, | ||
305 | }; | ||
306 | 304 | ||
307 | /* | 305 | /* |
308 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM | 306 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM |
@@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void) | |||
326 | TWL_COMMON_REGULATOR_VCXIO | | 324 | TWL_COMMON_REGULATOR_VCXIO | |
327 | TWL_COMMON_REGULATOR_VUSB | | 325 | TWL_COMMON_REGULATOR_VUSB | |
328 | TWL_COMMON_REGULATOR_CLK32KG); | 326 | TWL_COMMON_REGULATOR_CLK32KG); |
329 | omap4_pmic_init("twl6030", &omap4_panda_twldata); | 327 | omap4_pmic_init("twl6030", &omap4_panda_twldata, |
328 | &twl6040_data, OMAP44XX_IRQ_SYS_2N); | ||
330 | omap_register_i2c_bus(2, 400, NULL, 0); | 329 | omap_register_i2c_bus(2, 400, NULL, 0); |
331 | /* | 330 | /* |
332 | * Bus 3 is attached to the DVI port where devices like the pico DLP | 331 | * Bus 3 is attached to the DVI port where devices like the pico DLP |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 668533e2a379..33aa3910b09e 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -498,10 +498,18 @@ static struct gpio overo_bt_gpios[] __initdata = { | |||
498 | { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, | 498 | { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, |
499 | }; | 499 | }; |
500 | 500 | ||
501 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
502 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
503 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
504 | REGULATOR_SUPPLY("vddvario", "smsc911x.1"), | ||
505 | REGULATOR_SUPPLY("vdd33a", "smsc911x.1"), | ||
506 | }; | ||
507 | |||
501 | static void __init overo_init(void) | 508 | static void __init overo_init(void) |
502 | { | 509 | { |
503 | int ret; | 510 | int ret; |
504 | 511 | ||
512 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
505 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 513 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
506 | omap_hsmmc_init(mmc); | 514 | omap_hsmmc_init(mmc); |
507 | overo_i2c_init(); | 515 | overo_i2c_init(); |
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index 1e8540eabde9..f64f44173061 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c | |||
@@ -14,6 +14,9 @@ | |||
14 | #include <linux/smsc911x.h> | 14 | #include <linux/smsc911x.h> |
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | 16 | ||
17 | #include <linux/regulator/fixed.h> | ||
18 | #include <linux/regulator/machine.h> | ||
19 | |||
17 | #include <plat/gpmc.h> | 20 | #include <plat/gpmc.h> |
18 | #include <plat/gpmc-smsc911x.h> | 21 | #include <plat/gpmc-smsc911x.h> |
19 | 22 | ||
@@ -117,11 +120,17 @@ static struct platform_device *zoom_devices[] __initdata = { | |||
117 | &zoom_debugboard_serial_device, | 120 | &zoom_debugboard_serial_device, |
118 | }; | 121 | }; |
119 | 122 | ||
123 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
124 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
125 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
126 | }; | ||
127 | |||
120 | int __init zoom_debugboard_init(void) | 128 | int __init zoom_debugboard_init(void) |
121 | { | 129 | { |
122 | if (!omap_zoom_debugboard_detect()) | 130 | if (!omap_zoom_debugboard_detect()) |
123 | return 0; | 131 | return 0; |
124 | 132 | ||
133 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
125 | zoom_init_smsc911x(); | 134 | zoom_init_smsc911x(); |
126 | zoom_init_quaduart(); | 135 | zoom_init_quaduart(); |
127 | return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); | 136 | return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); |
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 7072e0d651b1..3d9d746b221a 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |||
@@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
165 | 165 | ||
166 | return 0; | 166 | return 0; |
167 | } | 167 | } |
168 | |||
169 | #ifdef CONFIG_CPU_FREQ | ||
170 | /* | ||
171 | * Walk PRCM rate table and fillout cpufreq freq_table | ||
172 | * XXX This should be replaced by an OPP layer in the near future | ||
173 | */ | ||
174 | static struct cpufreq_frequency_table *freq_table; | ||
175 | |||
176 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | ||
177 | { | ||
178 | const struct prcm_config *prcm; | ||
179 | int i = 0; | ||
180 | int tbl_sz = 0; | ||
181 | |||
182 | if (!cpu_is_omap24xx()) | ||
183 | return; | ||
184 | |||
185 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
186 | if (!(prcm->flags & cpu_mask)) | ||
187 | continue; | ||
188 | if (prcm->xtal_speed != sclk->rate) | ||
189 | continue; | ||
190 | |||
191 | /* don't put bypass rates in table */ | ||
192 | if (prcm->dpll_speed == prcm->xtal_speed) | ||
193 | continue; | ||
194 | |||
195 | tbl_sz++; | ||
196 | } | ||
197 | |||
198 | /* | ||
199 | * XXX Ensure that we're doing what CPUFreq expects for this error | ||
200 | * case and the following one | ||
201 | */ | ||
202 | if (tbl_sz == 0) { | ||
203 | pr_warning("%s: no matching entries in rate_table\n", | ||
204 | __func__); | ||
205 | return; | ||
206 | } | ||
207 | |||
208 | /* Include the CPUFREQ_TABLE_END terminator entry */ | ||
209 | tbl_sz++; | ||
210 | |||
211 | freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz, | ||
212 | GFP_ATOMIC); | ||
213 | if (!freq_table) { | ||
214 | pr_err("%s: could not kzalloc frequency table\n", __func__); | ||
215 | return; | ||
216 | } | ||
217 | |||
218 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
219 | if (!(prcm->flags & cpu_mask)) | ||
220 | continue; | ||
221 | if (prcm->xtal_speed != sclk->rate) | ||
222 | continue; | ||
223 | |||
224 | /* don't put bypass rates in table */ | ||
225 | if (prcm->dpll_speed == prcm->xtal_speed) | ||
226 | continue; | ||
227 | |||
228 | freq_table[i].index = i; | ||
229 | freq_table[i].frequency = prcm->mpu_speed / 1000; | ||
230 | i++; | ||
231 | } | ||
232 | |||
233 | freq_table[i].index = i; | ||
234 | freq_table[i].frequency = CPUFREQ_TABLE_END; | ||
235 | |||
236 | *table = &freq_table[0]; | ||
237 | } | ||
238 | |||
239 | void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
240 | { | ||
241 | if (!cpu_is_omap24xx()) | ||
242 | return; | ||
243 | |||
244 | kfree(freq_table); | ||
245 | } | ||
246 | |||
247 | #endif | ||
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index f57ed5baeccf..d9f4931513f9 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = { | |||
536 | .clk_set_rate = omap2_clk_set_rate, | 536 | .clk_set_rate = omap2_clk_set_rate, |
537 | .clk_set_parent = omap2_clk_set_parent, | 537 | .clk_set_parent = omap2_clk_set_parent, |
538 | .clk_disable_unused = omap2_clk_disable_unused, | 538 | .clk_disable_unused = omap2_clk_disable_unused, |
539 | #ifdef CONFIG_CPU_FREQ | ||
540 | /* These will be removed when the OPP code is integrated */ | ||
541 | .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, | ||
542 | .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, | ||
543 | #endif | ||
544 | }; | 539 | }; |
545 | 540 | ||
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index b8c2a686481c..a1bb23a23351 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[]; | |||
146 | extern const struct clksel_rate gfx_l3_rates[]; | 146 | extern const struct clksel_rate gfx_l3_rates[]; |
147 | extern const struct clksel_rate dsp_ick_rates[]; | 147 | extern const struct clksel_rate dsp_ick_rates[]; |
148 | 148 | ||
149 | #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) | ||
150 | extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | ||
151 | extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
152 | #else | ||
153 | #define omap2_clk_init_cpufreq_table 0 | ||
154 | #define omap2_clk_exit_cpufreq_table 0 | ||
155 | #endif | ||
156 | |||
157 | extern const struct clkops clkops_omap2_iclk_dflt_wait; | 149 | extern const struct clkops clkops_omap2_iclk_dflt_wait; |
158 | extern const struct clkops clkops_omap2_iclk_dflt; | 150 | extern const struct clkops clkops_omap2_iclk_dflt; |
159 | extern const struct clkops clkops_omap2_iclk_idle_only; | 151 | extern const struct clkops clkops_omap2_iclk_idle_only; |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 480fb8f09aed..f4a626f7c79e 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -747,7 +747,7 @@ static struct clk dpll4_m3_ck = { | |||
747 | .parent = &dpll4_ck, | 747 | .parent = &dpll4_ck, |
748 | .init = &omap2_init_clksel_parent, | 748 | .init = &omap2_init_clksel_parent, |
749 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), | 749 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), |
750 | .clksel_mask = OMAP3430_CLKSEL_TV_MASK, | 750 | .clksel_mask = OMAP3630_CLKSEL_TV_MASK, |
751 | .clksel = dpll4_clksel, | 751 | .clksel = dpll4_clksel, |
752 | .clkdm_name = "dpll4_clkdm", | 752 | .clkdm_name = "dpll4_clkdm", |
753 | .recalc = &omap2_clksel_recalc, | 753 | .recalc = &omap2_clksel_recalc, |
@@ -832,7 +832,7 @@ static struct clk dpll4_m4_ck = { | |||
832 | .parent = &dpll4_ck, | 832 | .parent = &dpll4_ck, |
833 | .init = &omap2_init_clksel_parent, | 833 | .init = &omap2_init_clksel_parent, |
834 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), | 834 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), |
835 | .clksel_mask = OMAP3430_CLKSEL_DSS1_MASK, | 835 | .clksel_mask = OMAP3630_CLKSEL_DSS1_MASK, |
836 | .clksel = dpll4_clksel, | 836 | .clksel = dpll4_clksel, |
837 | .clkdm_name = "dpll4_clkdm", | 837 | .clkdm_name = "dpll4_clkdm", |
838 | .recalc = &omap2_clksel_recalc, | 838 | .recalc = &omap2_clksel_recalc, |
@@ -859,7 +859,7 @@ static struct clk dpll4_m5_ck = { | |||
859 | .parent = &dpll4_ck, | 859 | .parent = &dpll4_ck, |
860 | .init = &omap2_init_clksel_parent, | 860 | .init = &omap2_init_clksel_parent, |
861 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), | 861 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), |
862 | .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, | 862 | .clksel_mask = OMAP3630_CLKSEL_CAM_MASK, |
863 | .clksel = dpll4_clksel, | 863 | .clksel = dpll4_clksel, |
864 | .clkdm_name = "dpll4_clkdm", | 864 | .clkdm_name = "dpll4_clkdm", |
865 | .set_rate = &omap2_clksel_set_rate, | 865 | .set_rate = &omap2_clksel_set_rate, |
@@ -886,7 +886,7 @@ static struct clk dpll4_m6_ck = { | |||
886 | .parent = &dpll4_ck, | 886 | .parent = &dpll4_ck, |
887 | .init = &omap2_init_clksel_parent, | 887 | .init = &omap2_init_clksel_parent, |
888 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), | 888 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), |
889 | .clksel_mask = OMAP3430_DIV_DPLL4_MASK, | 889 | .clksel_mask = OMAP3630_DIV_DPLL4_MASK, |
890 | .clksel = dpll4_clksel, | 890 | .clksel = dpll4_clksel, |
891 | .clkdm_name = "dpll4_clkdm", | 891 | .clkdm_name = "dpll4_clkdm", |
892 | .recalc = &omap2_clksel_recalc, | 892 | .recalc = &omap2_clksel_recalc, |
@@ -1394,6 +1394,7 @@ static struct clk cpefuse_fck = { | |||
1394 | .name = "cpefuse_fck", | 1394 | .name = "cpefuse_fck", |
1395 | .ops = &clkops_omap2_dflt, | 1395 | .ops = &clkops_omap2_dflt, |
1396 | .parent = &sys_ck, | 1396 | .parent = &sys_ck, |
1397 | .clkdm_name = "core_l4_clkdm", | ||
1397 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1398 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1398 | .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, | 1399 | .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, |
1399 | .recalc = &followparent_recalc, | 1400 | .recalc = &followparent_recalc, |
@@ -1403,6 +1404,7 @@ static struct clk ts_fck = { | |||
1403 | .name = "ts_fck", | 1404 | .name = "ts_fck", |
1404 | .ops = &clkops_omap2_dflt, | 1405 | .ops = &clkops_omap2_dflt, |
1405 | .parent = &omap_32k_fck, | 1406 | .parent = &omap_32k_fck, |
1407 | .clkdm_name = "core_l4_clkdm", | ||
1406 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1408 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1407 | .enable_bit = OMAP3430ES2_EN_TS_SHIFT, | 1409 | .enable_bit = OMAP3430ES2_EN_TS_SHIFT, |
1408 | .recalc = &followparent_recalc, | 1410 | .recalc = &followparent_recalc, |
@@ -1412,6 +1414,7 @@ static struct clk usbtll_fck = { | |||
1412 | .name = "usbtll_fck", | 1414 | .name = "usbtll_fck", |
1413 | .ops = &clkops_omap2_dflt_wait, | 1415 | .ops = &clkops_omap2_dflt_wait, |
1414 | .parent = &dpll5_m2_ck, | 1416 | .parent = &dpll5_m2_ck, |
1417 | .clkdm_name = "core_l4_clkdm", | ||
1415 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1418 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1416 | .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, | 1419 | .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, |
1417 | .recalc = &followparent_recalc, | 1420 | .recalc = &followparent_recalc, |
@@ -1617,6 +1620,7 @@ static struct clk fshostusb_fck = { | |||
1617 | .name = "fshostusb_fck", | 1620 | .name = "fshostusb_fck", |
1618 | .ops = &clkops_omap2_dflt_wait, | 1621 | .ops = &clkops_omap2_dflt_wait, |
1619 | .parent = &core_48m_fck, | 1622 | .parent = &core_48m_fck, |
1623 | .clkdm_name = "core_l4_clkdm", | ||
1620 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1624 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1621 | .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT, | 1625 | .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT, |
1622 | .recalc = &followparent_recalc, | 1626 | .recalc = &followparent_recalc, |
@@ -2043,6 +2047,7 @@ static struct clk omapctrl_ick = { | |||
2043 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), | 2047 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), |
2044 | .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT, | 2048 | .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT, |
2045 | .flags = ENABLE_ON_INIT, | 2049 | .flags = ENABLE_ON_INIT, |
2050 | .clkdm_name = "core_l4_clkdm", | ||
2046 | .recalc = &followparent_recalc, | 2051 | .recalc = &followparent_recalc, |
2047 | }; | 2052 | }; |
2048 | 2053 | ||
@@ -2094,6 +2099,7 @@ static struct clk usb_l4_ick = { | |||
2094 | .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), | 2099 | .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), |
2095 | .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK, | 2100 | .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK, |
2096 | .clksel = usb_l4_clksel, | 2101 | .clksel = usb_l4_clksel, |
2102 | .clkdm_name = "core_l4_clkdm", | ||
2097 | .recalc = &omap2_clksel_recalc, | 2103 | .recalc = &omap2_clksel_recalc, |
2098 | }; | 2104 | }; |
2099 | 2105 | ||
@@ -3467,8 +3473,8 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3467 | CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX), | 3473 | CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX), |
3468 | CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX), | 3474 | CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX), |
3469 | CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX), | 3475 | CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX), |
3470 | CLK("davinci_emac", "emac_clk", &emac_ick, CK_AM35XX), | 3476 | CLK("davinci_emac", NULL, &emac_ick, CK_AM35XX), |
3471 | CLK("davinci_emac", "phy_clk", &emac_fck, CK_AM35XX), | 3477 | CLK("davinci_mdio.0", NULL, &emac_fck, CK_AM35XX), |
3472 | CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX), | 3478 | CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX), |
3473 | CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX), | 3479 | CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX), |
3474 | CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX), | 3480 | CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX), |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c03c1108468e..fa6ea65ad44b 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = { | |||
957 | .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), | 957 | .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), |
958 | .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB, | 958 | .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB, |
959 | .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB, | 959 | .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB, |
960 | .mult_mask = OMAP4430_DPLL_MULT_MASK, | 960 | .mult_mask = OMAP4430_DPLL_MULT_USB_MASK, |
961 | .div1_mask = OMAP4430_DPLL_DIV_MASK, | 961 | .div1_mask = OMAP4430_DPLL_DIV_0_7_MASK, |
962 | .enable_mask = OMAP4430_DPLL_EN_MASK, | 962 | .enable_mask = OMAP4430_DPLL_EN_MASK, |
963 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | 963 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, |
964 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | 964 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, |
@@ -978,6 +978,7 @@ static struct clk dpll_usb_ck = { | |||
978 | .recalc = &omap3_dpll_recalc, | 978 | .recalc = &omap3_dpll_recalc, |
979 | .round_rate = &omap2_dpll_round_rate, | 979 | .round_rate = &omap2_dpll_round_rate, |
980 | .set_rate = &omap3_noncore_dpll_set_rate, | 980 | .set_rate = &omap3_noncore_dpll_set_rate, |
981 | .clkdm_name = "l3_init_clkdm", | ||
981 | }; | 982 | }; |
982 | 983 | ||
983 | static struct clk dpll_usb_clkdcoldo_ck = { | 984 | static struct clk dpll_usb_clkdcoldo_ck = { |
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 9299ac291d28..bd7ed13515cc 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | |||
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = { | |||
390 | .prcm_partition = OMAP4430_PRM_PARTITION, | 390 | .prcm_partition = OMAP4430_PRM_PARTITION, |
391 | .cm_inst = OMAP4430_PRM_EMU_CM_INST, | 391 | .cm_inst = OMAP4430_PRM_EMU_CM_INST, |
392 | .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, | 392 | .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, |
393 | .flags = CLKDM_CAN_HWSUP, | 393 | .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP, |
394 | }; | 394 | }; |
395 | 395 | ||
396 | static struct clockdomain l3_dma_44xx_clkdm = { | 396 | static struct clockdomain l3_dma_44xx_clkdm = { |
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c index 5e5880d6d099..b6c77be3e8f7 100644 --- a/arch/arm/mach-omap2/gpmc-smsc911x.c +++ b/arch/arm/mach-omap2/gpmc-smsc911x.c | |||
@@ -19,15 +19,11 @@ | |||
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <linux/smsc911x.h> | 21 | #include <linux/smsc911x.h> |
22 | #include <linux/regulator/fixed.h> | ||
23 | #include <linux/regulator/machine.h> | ||
24 | 22 | ||
25 | #include <plat/board.h> | 23 | #include <plat/board.h> |
26 | #include <plat/gpmc.h> | 24 | #include <plat/gpmc.h> |
27 | #include <plat/gpmc-smsc911x.h> | 25 | #include <plat/gpmc-smsc911x.h> |
28 | 26 | ||
29 | static struct omap_smsc911x_platform_data *gpmc_cfg; | ||
30 | |||
31 | static struct resource gpmc_smsc911x_resources[] = { | 27 | static struct resource gpmc_smsc911x_resources[] = { |
32 | [0] = { | 28 | [0] = { |
33 | .flags = IORESOURCE_MEM, | 29 | .flags = IORESOURCE_MEM, |
@@ -41,51 +37,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = { | |||
41 | .phy_interface = PHY_INTERFACE_MODE_MII, | 37 | .phy_interface = PHY_INTERFACE_MODE_MII, |
42 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 38 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
43 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | 39 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, |
44 | .flags = SMSC911X_USE_16BIT, | ||
45 | }; | ||
46 | |||
47 | static struct regulator_consumer_supply gpmc_smsc911x_supply[] = { | ||
48 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | ||
49 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | ||
50 | }; | ||
51 | |||
52 | /* Generic regulator definition to satisfy smsc911x */ | ||
53 | static struct regulator_init_data gpmc_smsc911x_reg_init_data = { | ||
54 | .constraints = { | ||
55 | .min_uV = 3300000, | ||
56 | .max_uV = 3300000, | ||
57 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
58 | | REGULATOR_MODE_STANDBY, | ||
59 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
60 | | REGULATOR_CHANGE_STATUS, | ||
61 | }, | ||
62 | .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply), | ||
63 | .consumer_supplies = gpmc_smsc911x_supply, | ||
64 | }; | ||
65 | |||
66 | static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = { | ||
67 | .supply_name = "gpmc_smsc911x", | ||
68 | .microvolts = 3300000, | ||
69 | .gpio = -EINVAL, | ||
70 | .startup_delay = 0, | ||
71 | .enable_high = 0, | ||
72 | .enabled_at_boot = 1, | ||
73 | .init_data = &gpmc_smsc911x_reg_init_data, | ||
74 | }; | ||
75 | |||
76 | /* | ||
77 | * Platform device id of 42 is a temporary fix to avoid conflicts | ||
78 | * with other reg-fixed-voltage devices. The real fix should | ||
79 | * involve the driver core providing a way of dynamically | ||
80 | * assigning a unique id on registration for platform devices | ||
81 | * in the same name space. | ||
82 | */ | ||
83 | static struct platform_device gpmc_smsc911x_regulator = { | ||
84 | .name = "reg-fixed-voltage", | ||
85 | .id = 42, | ||
86 | .dev = { | ||
87 | .platform_data = &gpmc_smsc911x_fixed_reg_data, | ||
88 | }, | ||
89 | }; | 40 | }; |
90 | 41 | ||
91 | /* | 42 | /* |
@@ -93,23 +44,12 @@ static struct platform_device gpmc_smsc911x_regulator = { | |||
93 | * assume that pin multiplexing is done in the board-*.c file, | 44 | * assume that pin multiplexing is done in the board-*.c file, |
94 | * or in the bootloader. | 45 | * or in the bootloader. |
95 | */ | 46 | */ |
96 | void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) | 47 | void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg) |
97 | { | 48 | { |
98 | struct platform_device *pdev; | 49 | struct platform_device *pdev; |
99 | unsigned long cs_mem_base; | 50 | unsigned long cs_mem_base; |
100 | int ret; | 51 | int ret; |
101 | 52 | ||
102 | gpmc_cfg = board_data; | ||
103 | |||
104 | if (!gpmc_cfg->id) { | ||
105 | ret = platform_device_register(&gpmc_smsc911x_regulator); | ||
106 | if (ret < 0) { | ||
107 | pr_err("Unable to register smsc911x regulators: %d\n", | ||
108 | ret); | ||
109 | return; | ||
110 | } | ||
111 | } | ||
112 | |||
113 | if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { | 53 | if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { |
114 | pr_err("Failed to request GPMC mem region\n"); | 54 | pr_err("Failed to request GPMC mem region\n"); |
115 | return; | 55 | return; |
@@ -139,8 +79,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) | |||
139 | gpio_set_value(gpmc_cfg->gpio_reset, 1); | 79 | gpio_set_value(gpmc_cfg->gpio_reset, 1); |
140 | } | 80 | } |
141 | 81 | ||
142 | if (gpmc_cfg->flags) | 82 | gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT; |
143 | gpmc_smsc911x_config.flags = gpmc_cfg->flags; | ||
144 | 83 | ||
145 | pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, | 84 | pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, |
146 | gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), | 85 | gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 100db6217f39..b0268eaffe13 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
@@ -506,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, | |||
506 | if (oh->dev_attr != NULL) { | 506 | if (oh->dev_attr != NULL) { |
507 | mmc_dev_attr = oh->dev_attr; | 507 | mmc_dev_attr = oh->dev_attr; |
508 | mmc_data->controller_flags = mmc_dev_attr->flags; | 508 | mmc_data->controller_flags = mmc_dev_attr->flags; |
509 | /* | ||
510 | * erratum 2.1.1.128 doesn't apply if board has | ||
511 | * a transceiver is attached | ||
512 | */ | ||
513 | if (hsmmcinfo->transceiver) | ||
514 | mmc_data->controller_flags &= | ||
515 | ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ; | ||
509 | } | 516 | } |
510 | 517 | ||
511 | pdev = platform_device_alloc(name, ctrl_nr - 1); | 518 | pdev = platform_device_alloc(name, ctrl_nr - 1); |
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h index 4fa72c7cc7cd..1c582a8592b9 100644 --- a/arch/arm/mach-omap2/include/mach/barriers.h +++ b/arch/arm/mach-omap2/include/mach/barriers.h | |||
@@ -22,6 +22,8 @@ | |||
22 | #ifndef __MACH_BARRIERS_H | 22 | #ifndef __MACH_BARRIERS_H |
23 | #define __MACH_BARRIERS_H | 23 | #define __MACH_BARRIERS_H |
24 | 24 | ||
25 | #include <asm/outercache.h> | ||
26 | |||
25 | extern void omap_bus_sync(void); | 27 | extern void omap_bus_sync(void); |
26 | 28 | ||
27 | #define rmb() dsb() | 29 | #define rmb() dsb() |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index eba6cd3816f5..7144ae651d3d 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) | |||
1395 | */ | 1395 | */ |
1396 | static int _ocp_softreset(struct omap_hwmod *oh) | 1396 | static int _ocp_softreset(struct omap_hwmod *oh) |
1397 | { | 1397 | { |
1398 | u32 v; | 1398 | u32 v, softrst_mask; |
1399 | int c = 0; | 1399 | int c = 0; |
1400 | int ret = 0; | 1400 | int ret = 0; |
1401 | 1401 | ||
@@ -1422,16 +1422,21 @@ static int _ocp_softreset(struct omap_hwmod *oh) | |||
1422 | goto dis_opt_clks; | 1422 | goto dis_opt_clks; |
1423 | _write_sysconfig(v, oh); | 1423 | _write_sysconfig(v, oh); |
1424 | 1424 | ||
1425 | if (oh->class->sysc->srst_udelay) | ||
1426 | udelay(oh->class->sysc->srst_udelay); | ||
1427 | |||
1425 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | 1428 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) |
1426 | omap_test_timeout((omap_hwmod_read(oh, | 1429 | omap_test_timeout((omap_hwmod_read(oh, |
1427 | oh->class->sysc->syss_offs) | 1430 | oh->class->sysc->syss_offs) |
1428 | & SYSS_RESETDONE_MASK), | 1431 | & SYSS_RESETDONE_MASK), |
1429 | MAX_MODULE_SOFTRESET_WAIT, c); | 1432 | MAX_MODULE_SOFTRESET_WAIT, c); |
1430 | else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) | 1433 | else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { |
1434 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); | ||
1431 | omap_test_timeout(!(omap_hwmod_read(oh, | 1435 | omap_test_timeout(!(omap_hwmod_read(oh, |
1432 | oh->class->sysc->sysc_offs) | 1436 | oh->class->sysc->sysc_offs) |
1433 | & SYSC_TYPE2_SOFTRESET_MASK), | 1437 | & softrst_mask), |
1434 | MAX_MODULE_SOFTRESET_WAIT, c); | 1438 | MAX_MODULE_SOFTRESET_WAIT, c); |
1439 | } | ||
1435 | 1440 | ||
1436 | if (c == MAX_MODULE_SOFTRESET_WAIT) | 1441 | if (c == MAX_MODULE_SOFTRESET_WAIT) |
1437 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", | 1442 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
@@ -1477,6 +1482,11 @@ static int _reset(struct omap_hwmod *oh) | |||
1477 | 1482 | ||
1478 | ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh); | 1483 | ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh); |
1479 | 1484 | ||
1485 | if (oh->class->sysc) { | ||
1486 | _update_sysc_cache(oh); | ||
1487 | _enable_sysc(oh); | ||
1488 | } | ||
1489 | |||
1480 | return ret; | 1490 | return ret; |
1481 | } | 1491 | } |
1482 | 1492 | ||
@@ -1786,20 +1796,9 @@ static int _setup(struct omap_hwmod *oh, void *data) | |||
1786 | return 0; | 1796 | return 0; |
1787 | } | 1797 | } |
1788 | 1798 | ||
1789 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) { | 1799 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) |
1790 | _reset(oh); | 1800 | _reset(oh); |
1791 | 1801 | ||
1792 | /* | ||
1793 | * OCP_SYSCONFIG bits need to be reprogrammed after a softreset. | ||
1794 | * The _enable() function should be split to | ||
1795 | * avoid the rewrite of the OCP_SYSCONFIG register. | ||
1796 | */ | ||
1797 | if (oh->class->sysc) { | ||
1798 | _update_sysc_cache(oh); | ||
1799 | _enable_sysc(oh); | ||
1800 | } | ||
1801 | } | ||
1802 | |||
1803 | postsetup_state = oh->_postsetup_state; | 1802 | postsetup_state = oh->_postsetup_state; |
1804 | if (postsetup_state == _HWMOD_STATE_UNKNOWN) | 1803 | if (postsetup_state == _HWMOD_STATE_UNKNOWN) |
1805 | postsetup_state = _HWMOD_STATE_ENABLED; | 1804 | postsetup_state = _HWMOD_STATE_ENABLED; |
@@ -2463,26 +2462,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, | |||
2463 | * @oh: struct omap_hwmod * | 2462 | * @oh: struct omap_hwmod * |
2464 | * | 2463 | * |
2465 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to | 2464 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to |
2466 | * send wakeups to the PRCM. Eventually this should sets PRCM wakeup | 2465 | * send wakeups to the PRCM, and enable I/O ring wakeup events for |
2467 | * registers to cause the PRCM to receive wakeup events from the | 2466 | * this IP block if it has dynamic mux entries. Eventually this |
2468 | * module. Does not set any wakeup routing registers beyond this | 2467 | * should set PRCM wakeup registers to cause the PRCM to receive |
2469 | * point - if the module is to wake up any other module or subsystem, | 2468 | * wakeup events from the module. Does not set any wakeup routing |
2470 | * that must be set separately. Called by omap_device code. Returns | 2469 | * registers beyond this point - if the module is to wake up any other |
2471 | * -EINVAL on error or 0 upon success. | 2470 | * module or subsystem, that must be set separately. Called by |
2471 | * omap_device code. Returns -EINVAL on error or 0 upon success. | ||
2472 | */ | 2472 | */ |
2473 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) | 2473 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) |
2474 | { | 2474 | { |
2475 | unsigned long flags; | 2475 | unsigned long flags; |
2476 | u32 v; | 2476 | u32 v; |
2477 | 2477 | ||
2478 | if (!oh->class->sysc || | ||
2479 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
2480 | return -EINVAL; | ||
2481 | |||
2482 | spin_lock_irqsave(&oh->_lock, flags); | 2478 | spin_lock_irqsave(&oh->_lock, flags); |
2483 | v = oh->_sysc_cache; | 2479 | |
2484 | _enable_wakeup(oh, &v); | 2480 | if (oh->class->sysc && |
2485 | _write_sysconfig(v, oh); | 2481 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
2482 | v = oh->_sysc_cache; | ||
2483 | _enable_wakeup(oh, &v); | ||
2484 | _write_sysconfig(v, oh); | ||
2485 | } | ||
2486 | |||
2486 | _set_idle_ioring_wakeup(oh, true); | 2487 | _set_idle_ioring_wakeup(oh, true); |
2487 | spin_unlock_irqrestore(&oh->_lock, flags); | 2488 | spin_unlock_irqrestore(&oh->_lock, flags); |
2488 | 2489 | ||
@@ -2494,26 +2495,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) | |||
2494 | * @oh: struct omap_hwmod * | 2495 | * @oh: struct omap_hwmod * |
2495 | * | 2496 | * |
2496 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module | 2497 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module |
2497 | * from sending wakeups to the PRCM. Eventually this should clear | 2498 | * from sending wakeups to the PRCM, and disable I/O ring wakeup |
2498 | * PRCM wakeup registers to cause the PRCM to ignore wakeup events | 2499 | * events for this IP block if it has dynamic mux entries. Eventually |
2499 | * from the module. Does not set any wakeup routing registers beyond | 2500 | * this should clear PRCM wakeup registers to cause the PRCM to ignore |
2500 | * this point - if the module is to wake up any other module or | 2501 | * wakeup events from the module. Does not set any wakeup routing |
2501 | * subsystem, that must be set separately. Called by omap_device | 2502 | * registers beyond this point - if the module is to wake up any other |
2502 | * code. Returns -EINVAL on error or 0 upon success. | 2503 | * module or subsystem, that must be set separately. Called by |
2504 | * omap_device code. Returns -EINVAL on error or 0 upon success. | ||
2503 | */ | 2505 | */ |
2504 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) | 2506 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) |
2505 | { | 2507 | { |
2506 | unsigned long flags; | 2508 | unsigned long flags; |
2507 | u32 v; | 2509 | u32 v; |
2508 | 2510 | ||
2509 | if (!oh->class->sysc || | ||
2510 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
2511 | return -EINVAL; | ||
2512 | |||
2513 | spin_lock_irqsave(&oh->_lock, flags); | 2511 | spin_lock_irqsave(&oh->_lock, flags); |
2514 | v = oh->_sysc_cache; | 2512 | |
2515 | _disable_wakeup(oh, &v); | 2513 | if (oh->class->sysc && |
2516 | _write_sysconfig(v, oh); | 2514 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
2515 | v = oh->_sysc_cache; | ||
2516 | _disable_wakeup(oh, &v); | ||
2517 | _write_sysconfig(v, oh); | ||
2518 | } | ||
2519 | |||
2517 | _set_idle_ioring_wakeup(oh, false); | 2520 | _set_idle_ioring_wakeup(oh, false); |
2518 | spin_unlock_irqrestore(&oh->_lock, flags); | 2521 | spin_unlock_irqrestore(&oh->_lock, flags); |
2519 | 2522 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a5409ce3f323..a6bde34e443a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | |||
1000 | .flags = OMAP_FIREWALL_L4, | 1000 | .flags = OMAP_FIREWALL_L4, |
1001 | } | 1001 | } |
1002 | }, | 1002 | }, |
1003 | .flags = OCPIF_SWSUP_IDLE, | ||
1004 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1003 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1005 | }; | 1004 | }; |
1006 | 1005 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index c4f56cb60d7d..04a3885f4475 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { | |||
1049 | .slave = &omap2430_dss_venc_hwmod, | 1049 | .slave = &omap2430_dss_venc_hwmod, |
1050 | .clk = "dss_ick", | 1050 | .clk = "dss_ick", |
1051 | .addr = omap2_dss_venc_addrs, | 1051 | .addr = omap2_dss_venc_addrs, |
1052 | .flags = OCPIF_SWSUP_IDLE, | ||
1053 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1052 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1054 | }; | 1053 | }; |
1055 | 1054 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 34b9766d1d23..db86ce90c69f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | |||
1676 | .flags = OMAP_FIREWALL_L4, | 1676 | .flags = OMAP_FIREWALL_L4, |
1677 | } | 1677 | } |
1678 | }, | 1678 | }, |
1679 | .flags = OCPIF_SWSUP_IDLE, | ||
1680 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 1679 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
1681 | }; | 1680 | }; |
1682 | 1681 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 08daa5e0eb5f..6abc75753e42 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | |||
2594 | static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { | 2594 | static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { |
2595 | .rev_offs = 0x0000, | 2595 | .rev_offs = 0x0000, |
2596 | .sysc_offs = 0x0010, | 2596 | .sysc_offs = 0x0010, |
2597 | /* | ||
2598 | * ISS needs 100 OCP clk cycles delay after a softreset before | ||
2599 | * accessing sysconfig again. | ||
2600 | * The lowest frequency at the moment for L3 bus is 100 MHz, so | ||
2601 | * 1usec delay is needed. Add an x2 margin to be safe (2 usecs). | ||
2602 | * | ||
2603 | * TODO: Indicate errata when available. | ||
2604 | */ | ||
2605 | .srst_udelay = 2, | ||
2597 | .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | | 2606 | .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | |
2598 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), | 2607 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), |
2599 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | 2608 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | |
@@ -2996,6 +3005,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { | |||
2996 | &omap44xx_l4_abe__mcbsp1_dma, | 3005 | &omap44xx_l4_abe__mcbsp1_dma, |
2997 | }; | 3006 | }; |
2998 | 3007 | ||
3008 | static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { | ||
3009 | { .role = "pad_fck", .clk = "pad_clks_ck" }, | ||
3010 | { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, | ||
3011 | }; | ||
3012 | |||
2999 | static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | 3013 | static struct omap_hwmod omap44xx_mcbsp1_hwmod = { |
3000 | .name = "mcbsp1", | 3014 | .name = "mcbsp1", |
3001 | .class = &omap44xx_mcbsp_hwmod_class, | 3015 | .class = &omap44xx_mcbsp_hwmod_class, |
@@ -3012,6 +3026,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | |||
3012 | }, | 3026 | }, |
3013 | .slaves = omap44xx_mcbsp1_slaves, | 3027 | .slaves = omap44xx_mcbsp1_slaves, |
3014 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), | 3028 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), |
3029 | .opt_clks = mcbsp1_opt_clks, | ||
3030 | .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks), | ||
3015 | }; | 3031 | }; |
3016 | 3032 | ||
3017 | /* mcbsp2 */ | 3033 | /* mcbsp2 */ |
@@ -3071,6 +3087,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { | |||
3071 | &omap44xx_l4_abe__mcbsp2_dma, | 3087 | &omap44xx_l4_abe__mcbsp2_dma, |
3072 | }; | 3088 | }; |
3073 | 3089 | ||
3090 | static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { | ||
3091 | { .role = "pad_fck", .clk = "pad_clks_ck" }, | ||
3092 | { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, | ||
3093 | }; | ||
3094 | |||
3074 | static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | 3095 | static struct omap_hwmod omap44xx_mcbsp2_hwmod = { |
3075 | .name = "mcbsp2", | 3096 | .name = "mcbsp2", |
3076 | .class = &omap44xx_mcbsp_hwmod_class, | 3097 | .class = &omap44xx_mcbsp_hwmod_class, |
@@ -3087,6 +3108,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | |||
3087 | }, | 3108 | }, |
3088 | .slaves = omap44xx_mcbsp2_slaves, | 3109 | .slaves = omap44xx_mcbsp2_slaves, |
3089 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), | 3110 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), |
3111 | .opt_clks = mcbsp2_opt_clks, | ||
3112 | .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks), | ||
3090 | }; | 3113 | }; |
3091 | 3114 | ||
3092 | /* mcbsp3 */ | 3115 | /* mcbsp3 */ |
@@ -3146,6 +3169,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { | |||
3146 | &omap44xx_l4_abe__mcbsp3_dma, | 3169 | &omap44xx_l4_abe__mcbsp3_dma, |
3147 | }; | 3170 | }; |
3148 | 3171 | ||
3172 | static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { | ||
3173 | { .role = "pad_fck", .clk = "pad_clks_ck" }, | ||
3174 | { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, | ||
3175 | }; | ||
3176 | |||
3149 | static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | 3177 | static struct omap_hwmod omap44xx_mcbsp3_hwmod = { |
3150 | .name = "mcbsp3", | 3178 | .name = "mcbsp3", |
3151 | .class = &omap44xx_mcbsp_hwmod_class, | 3179 | .class = &omap44xx_mcbsp_hwmod_class, |
@@ -3162,6 +3190,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | |||
3162 | }, | 3190 | }, |
3163 | .slaves = omap44xx_mcbsp3_slaves, | 3191 | .slaves = omap44xx_mcbsp3_slaves, |
3164 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), | 3192 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), |
3193 | .opt_clks = mcbsp3_opt_clks, | ||
3194 | .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks), | ||
3165 | }; | 3195 | }; |
3166 | 3196 | ||
3167 | /* mcbsp4 */ | 3197 | /* mcbsp4 */ |
@@ -3200,6 +3230,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { | |||
3200 | &omap44xx_l4_per__mcbsp4, | 3230 | &omap44xx_l4_per__mcbsp4, |
3201 | }; | 3231 | }; |
3202 | 3232 | ||
3233 | static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { | ||
3234 | { .role = "pad_fck", .clk = "pad_clks_ck" }, | ||
3235 | { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, | ||
3236 | }; | ||
3237 | |||
3203 | static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | 3238 | static struct omap_hwmod omap44xx_mcbsp4_hwmod = { |
3204 | .name = "mcbsp4", | 3239 | .name = "mcbsp4", |
3205 | .class = &omap44xx_mcbsp_hwmod_class, | 3240 | .class = &omap44xx_mcbsp_hwmod_class, |
@@ -3216,6 +3251,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | |||
3216 | }, | 3251 | }, |
3217 | .slaves = omap44xx_mcbsp4_slaves, | 3252 | .slaves = omap44xx_mcbsp4_slaves, |
3218 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), | 3253 | .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), |
3254 | .opt_clks = mcbsp4_opt_clks, | ||
3255 | .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks), | ||
3219 | }; | 3256 | }; |
3220 | 3257 | ||
3221 | /* | 3258 | /* |
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index 9262a6b47702..de6d46451746 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c | |||
@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, | |||
64 | } | 64 | } |
65 | oh = omap_hwmod_lookup(opp_def->hwmod_name); | 65 | oh = omap_hwmod_lookup(opp_def->hwmod_name); |
66 | if (!oh || !oh->od) { | 66 | if (!oh || !oh->od) { |
67 | pr_warn("%s: no hwmod or odev for %s, [%d] " | 67 | pr_debug("%s: no hwmod or odev for %s, [%d] " |
68 | "cannot add OPPs.\n", __func__, | 68 | "cannot add OPPs.\n", __func__, |
69 | opp_def->hwmod_name, i); | 69 | opp_def->hwmod_name, i); |
70 | return -EINVAL; | 70 | continue; |
71 | } | 71 | } |
72 | dev = &oh->od->pdev->dev; | 72 | dev = &oh->od->pdev->dev; |
73 | 73 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 238defc6f6df..703bd1099259 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -153,8 +153,7 @@ static void omap3_save_secure_ram_context(void) | |||
153 | pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); | 153 | pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); |
154 | /* Following is for error tracking, it should not happen */ | 154 | /* Following is for error tracking, it should not happen */ |
155 | if (ret) { | 155 | if (ret) { |
156 | printk(KERN_ERR "save_secure_sram() returns %08x\n", | 156 | pr_err("save_secure_sram() returns %08x\n", ret); |
157 | ret); | ||
158 | while (1) | 157 | while (1) |
159 | ; | 158 | ; |
160 | } | 159 | } |
@@ -289,7 +288,7 @@ void omap_sram_idle(void) | |||
289 | break; | 288 | break; |
290 | default: | 289 | default: |
291 | /* Invalid state */ | 290 | /* Invalid state */ |
292 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); | 291 | pr_err("Invalid mpu state in sram_idle\n"); |
293 | return; | 292 | return; |
294 | } | 293 | } |
295 | 294 | ||
@@ -439,18 +438,17 @@ restore: | |||
439 | list_for_each_entry(pwrst, &pwrst_list, node) { | 438 | list_for_each_entry(pwrst, &pwrst_list, node) { |
440 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); | 439 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); |
441 | if (state > pwrst->next_state) { | 440 | if (state > pwrst->next_state) { |
442 | printk(KERN_INFO "Powerdomain (%s) didn't enter " | 441 | pr_info("Powerdomain (%s) didn't enter " |
443 | "target state %d\n", | 442 | "target state %d\n", |
444 | pwrst->pwrdm->name, pwrst->next_state); | 443 | pwrst->pwrdm->name, pwrst->next_state); |
445 | ret = -1; | 444 | ret = -1; |
446 | } | 445 | } |
447 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); | 446 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); |
448 | } | 447 | } |
449 | if (ret) | 448 | if (ret) |
450 | printk(KERN_ERR "Could not enter target state in pm_suspend\n"); | 449 | pr_err("Could not enter target state in pm_suspend\n"); |
451 | else | 450 | else |
452 | printk(KERN_INFO "Successfully put all powerdomains " | 451 | pr_info("Successfully put all powerdomains to target state\n"); |
453 | "to target state\n"); | ||
454 | 452 | ||
455 | return ret; | 453 | return ret; |
456 | } | 454 | } |
@@ -734,21 +732,22 @@ static int __init omap3_pm_init(void) | |||
734 | 732 | ||
735 | if (ret) { | 733 | if (ret) { |
736 | pr_err("pm: Failed to request pm_io irq\n"); | 734 | pr_err("pm: Failed to request pm_io irq\n"); |
737 | goto err1; | 735 | goto err2; |
738 | } | 736 | } |
739 | 737 | ||
740 | ret = pwrdm_for_each(pwrdms_setup, NULL); | 738 | ret = pwrdm_for_each(pwrdms_setup, NULL); |
741 | if (ret) { | 739 | if (ret) { |
742 | printk(KERN_ERR "Failed to setup powerdomains\n"); | 740 | pr_err("Failed to setup powerdomains\n"); |
743 | goto err2; | 741 | goto err3; |
744 | } | 742 | } |
745 | 743 | ||
746 | (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); | 744 | (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); |
747 | 745 | ||
748 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); | 746 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); |
749 | if (mpu_pwrdm == NULL) { | 747 | if (mpu_pwrdm == NULL) { |
750 | printk(KERN_ERR "Failed to get mpu_pwrdm\n"); | 748 | pr_err("Failed to get mpu_pwrdm\n"); |
751 | goto err2; | 749 | ret = -EINVAL; |
750 | goto err3; | ||
752 | } | 751 | } |
753 | 752 | ||
754 | neon_pwrdm = pwrdm_lookup("neon_pwrdm"); | 753 | neon_pwrdm = pwrdm_lookup("neon_pwrdm"); |
@@ -781,8 +780,8 @@ static int __init omap3_pm_init(void) | |||
781 | omap3_secure_ram_storage = | 780 | omap3_secure_ram_storage = |
782 | kmalloc(0x803F, GFP_KERNEL); | 781 | kmalloc(0x803F, GFP_KERNEL); |
783 | if (!omap3_secure_ram_storage) | 782 | if (!omap3_secure_ram_storage) |
784 | printk(KERN_ERR "Memory allocation failed when" | 783 | pr_err("Memory allocation failed when " |
785 | "allocating for secure sram context\n"); | 784 | "allocating for secure sram context\n"); |
786 | 785 | ||
787 | local_irq_disable(); | 786 | local_irq_disable(); |
788 | local_fiq_disable(); | 787 | local_fiq_disable(); |
@@ -796,14 +795,17 @@ static int __init omap3_pm_init(void) | |||
796 | } | 795 | } |
797 | 796 | ||
798 | omap3_save_scratchpad_contents(); | 797 | omap3_save_scratchpad_contents(); |
799 | err1: | ||
800 | return ret; | 798 | return ret; |
801 | err2: | 799 | |
802 | free_irq(INT_34XX_PRCM_MPU_IRQ, NULL); | 800 | err3: |
803 | list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) { | 801 | list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) { |
804 | list_del(&pwrst->node); | 802 | list_del(&pwrst->node); |
805 | kfree(pwrst); | 803 | kfree(pwrst); |
806 | } | 804 | } |
805 | free_irq(omap_prcm_event_to_irq("io"), omap3_pm_init); | ||
806 | err2: | ||
807 | free_irq(omap_prcm_event_to_irq("wkup"), NULL); | ||
808 | err1: | ||
807 | return ret; | 809 | return ret; |
808 | } | 810 | } |
809 | 811 | ||
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 9ccaadc2cf07..885625352429 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -144,7 +144,7 @@ static void omap_default_idle(void) | |||
144 | static int __init omap4_pm_init(void) | 144 | static int __init omap4_pm_init(void) |
145 | { | 145 | { |
146 | int ret; | 146 | int ret; |
147 | struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm; | 147 | struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup; |
148 | struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; | 148 | struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; |
149 | 149 | ||
150 | if (!cpu_is_omap44xx()) | 150 | if (!cpu_is_omap44xx()) |
@@ -168,14 +168,19 @@ static int __init omap4_pm_init(void) | |||
168 | * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as | 168 | * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as |
169 | * expected. The hardware recommendation is to enable static | 169 | * expected. The hardware recommendation is to enable static |
170 | * dependencies for these to avoid system lock ups or random crashes. | 170 | * dependencies for these to avoid system lock ups or random crashes. |
171 | * The L4 wakeup depedency is added to workaround the OCP sync hardware | ||
172 | * BUG with 32K synctimer which lead to incorrect timer value read | ||
173 | * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which | ||
174 | * are part of L4 wakeup clockdomain. | ||
171 | */ | 175 | */ |
172 | mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); | 176 | mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); |
173 | emif_clkdm = clkdm_lookup("l3_emif_clkdm"); | 177 | emif_clkdm = clkdm_lookup("l3_emif_clkdm"); |
174 | l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); | 178 | l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); |
175 | l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); | 179 | l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); |
176 | l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); | 180 | l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); |
181 | l4wkup = clkdm_lookup("l4_wkup_clkdm"); | ||
177 | ducati_clkdm = clkdm_lookup("ducati_clkdm"); | 182 | ducati_clkdm = clkdm_lookup("ducati_clkdm"); |
178 | if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || | 183 | if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) || |
179 | (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) | 184 | (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) |
180 | goto err2; | 185 | goto err2; |
181 | 186 | ||
@@ -183,6 +188,7 @@ static int __init omap4_pm_init(void) | |||
183 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); | 188 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); |
184 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); | 189 | ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); |
185 | ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); | 190 | ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); |
191 | ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup); | ||
186 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); | 192 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); |
187 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); | 193 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); |
188 | if (ret) { | 194 | if (ret) { |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 8a18d1bd61c8..96ad3dbeac34 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
972 | 972 | ||
973 | int pwrdm_state_switch(struct powerdomain *pwrdm) | 973 | int pwrdm_state_switch(struct powerdomain *pwrdm) |
974 | { | 974 | { |
975 | return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | 975 | int ret; |
976 | |||
977 | ret = pwrdm_wait_transition(pwrdm); | ||
978 | if (!ret) | ||
979 | ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | ||
980 | |||
981 | return ret; | ||
976 | } | 982 | } |
977 | 983 | ||
978 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) | 984 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index eac623c7c3d8..f106d21ff581 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs) | |||
147 | u32 mask, st; | 147 | u32 mask, st; |
148 | 148 | ||
149 | /* XXX read mask from RAM? */ | 149 | /* XXX read mask from RAM? */ |
150 | mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs); | 150 | mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, |
151 | st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs); | 151 | irqen_offs); |
152 | st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs); | ||
152 | 153 | ||
153 | return mask & st; | 154 | return mask & st; |
154 | } | 155 | } |
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events) | |||
180 | */ | 181 | */ |
181 | void omap44xx_prm_ocp_barrier(void) | 182 | void omap44xx_prm_ocp_barrier(void) |
182 | { | 183 | { |
183 | omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | 184 | omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, |
184 | OMAP4_REVISION_PRM_OFFSET); | 185 | OMAP4_REVISION_PRM_OFFSET); |
185 | } | 186 | } |
186 | 187 | ||
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void) | |||
198 | void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) | 199 | void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) |
199 | { | 200 | { |
200 | saved_mask[0] = | 201 | saved_mask[0] = |
201 | omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | 202 | omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, |
202 | OMAP4_PRM_IRQSTATUS_MPU_OFFSET); | 203 | OMAP4_PRM_IRQSTATUS_MPU_OFFSET); |
203 | saved_mask[1] = | 204 | saved_mask[1] = |
204 | omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | 205 | omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, |
205 | OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); | 206 | OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); |
206 | 207 | ||
207 | omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, | 208 | omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, |
208 | OMAP4_PRM_IRQENABLE_MPU_OFFSET); | 209 | OMAP4_PRM_IRQENABLE_MPU_OFFSET); |
209 | omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, | 210 | omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, |
210 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); | 211 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); |
211 | 212 | ||
212 | /* OCP barrier */ | 213 | /* OCP barrier */ |
213 | omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | 214 | omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, |
214 | OMAP4_REVISION_PRM_OFFSET); | 215 | OMAP4_REVISION_PRM_OFFSET); |
215 | } | 216 | } |
216 | 217 | ||
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) | |||
226 | */ | 227 | */ |
227 | void omap44xx_prm_restore_irqen(u32 *saved_mask) | 228 | void omap44xx_prm_restore_irqen(u32 *saved_mask) |
228 | { | 229 | { |
229 | omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST, | 230 | omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST, |
230 | OMAP4_PRM_IRQENABLE_MPU_OFFSET); | 231 | OMAP4_PRM_IRQENABLE_MPU_OFFSET); |
231 | omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, | 232 | omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST, |
232 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); | 233 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); |
233 | } | 234 | } |
234 | 235 | ||
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 873b51d494ea..d28f848897d6 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -290,7 +290,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) | |||
290 | goto err; | 290 | goto err; |
291 | } | 291 | } |
292 | 292 | ||
293 | for (i = 0; i <= irq_setup->nr_regs; i++) { | 293 | for (i = 0; i < irq_setup->nr_regs; i++) { |
294 | gc = irq_alloc_generic_chip("PRCM", 1, | 294 | gc = irq_alloc_generic_chip("PRCM", 1, |
295 | irq_setup->base_irq + i * 32, prm_base, | 295 | irq_setup->base_irq + i * 32, prm_base, |
296 | handle_level_irq); | 296 | handle_level_irq); |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0cdd359a128e..9fc2f44188cb 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev) | |||
108 | static void omap_uart_set_smartidle(struct platform_device *pdev) | 108 | static void omap_uart_set_smartidle(struct platform_device *pdev) |
109 | { | 109 | { |
110 | struct omap_device *od = to_omap_device(pdev); | 110 | struct omap_device *od = to_omap_device(pdev); |
111 | u8 idlemode; | ||
111 | 112 | ||
112 | omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); | 113 | if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
114 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; | ||
115 | else | ||
116 | idlemode = HWMOD_IDLEMODE_SMART; | ||
117 | |||
118 | omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode); | ||
113 | } | 119 | } |
114 | 120 | ||
115 | #else | 121 | #else |
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {} | |||
120 | #endif /* CONFIG_PM */ | 126 | #endif /* CONFIG_PM */ |
121 | 127 | ||
122 | #ifdef CONFIG_OMAP_MUX | 128 | #ifdef CONFIG_OMAP_MUX |
123 | static struct omap_device_pad default_uart1_pads[] __initdata = { | ||
124 | { | ||
125 | .name = "uart1_cts.uart1_cts", | ||
126 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
127 | }, | ||
128 | { | ||
129 | .name = "uart1_rts.uart1_rts", | ||
130 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
131 | }, | ||
132 | { | ||
133 | .name = "uart1_tx.uart1_tx", | ||
134 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
135 | }, | ||
136 | { | ||
137 | .name = "uart1_rx.uart1_rx", | ||
138 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
139 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
140 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static struct omap_device_pad default_uart2_pads[] __initdata = { | ||
145 | { | ||
146 | .name = "uart2_cts.uart2_cts", | ||
147 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
148 | }, | ||
149 | { | ||
150 | .name = "uart2_rts.uart2_rts", | ||
151 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
152 | }, | ||
153 | { | ||
154 | .name = "uart2_tx.uart2_tx", | ||
155 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
156 | }, | ||
157 | { | ||
158 | .name = "uart2_rx.uart2_rx", | ||
159 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
160 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
161 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
162 | }, | ||
163 | }; | ||
164 | |||
165 | static struct omap_device_pad default_uart3_pads[] __initdata = { | ||
166 | { | ||
167 | .name = "uart3_cts_rctx.uart3_cts_rctx", | ||
168 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | ||
169 | }, | ||
170 | { | ||
171 | .name = "uart3_rts_sd.uart3_rts_sd", | ||
172 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
173 | }, | ||
174 | { | ||
175 | .name = "uart3_tx_irtx.uart3_tx_irtx", | ||
176 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
177 | }, | ||
178 | { | ||
179 | .name = "uart3_rx_irrx.uart3_rx_irrx", | ||
180 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
181 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
182 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
183 | }, | ||
184 | }; | ||
185 | |||
186 | static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = { | ||
187 | { | ||
188 | .name = "gpmc_wait2.uart4_tx", | ||
189 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
190 | }, | ||
191 | { | ||
192 | .name = "gpmc_wait3.uart4_rx", | ||
193 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
194 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | ||
195 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | ||
196 | }, | ||
197 | }; | ||
198 | |||
199 | static struct omap_device_pad default_omap4_uart4_pads[] __initdata = { | ||
200 | { | ||
201 | .name = "uart4_tx.uart4_tx", | ||
202 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | ||
203 | }, | ||
204 | { | ||
205 | .name = "uart4_rx.uart4_rx", | ||
206 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | ||
207 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
208 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | ||
209 | }, | ||
210 | }; | ||
211 | |||
212 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) | 129 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) |
213 | { | 130 | { |
214 | switch (bdata->id) { | ||
215 | case 0: | ||
216 | bdata->pads = default_uart1_pads; | ||
217 | bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads); | ||
218 | break; | ||
219 | case 1: | ||
220 | bdata->pads = default_uart2_pads; | ||
221 | bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads); | ||
222 | break; | ||
223 | case 2: | ||
224 | bdata->pads = default_uart3_pads; | ||
225 | bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads); | ||
226 | break; | ||
227 | case 3: | ||
228 | if (cpu_is_omap44xx()) { | ||
229 | bdata->pads = default_omap4_uart4_pads; | ||
230 | bdata->pads_cnt = | ||
231 | ARRAY_SIZE(default_omap4_uart4_pads); | ||
232 | } else if (cpu_is_omap3630()) { | ||
233 | bdata->pads = default_omap36xx_uart4_pads; | ||
234 | bdata->pads_cnt = | ||
235 | ARRAY_SIZE(default_omap36xx_uart4_pads); | ||
236 | } | ||
237 | break; | ||
238 | default: | ||
239 | break; | ||
240 | } | ||
241 | } | 131 | } |
242 | #else | 132 | #else |
243 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} | 133 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 4b57757bf9d1..7a7b89304c48 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
@@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = { | |||
37 | .flags = I2C_CLIENT_WAKE, | 37 | .flags = I2C_CLIENT_WAKE, |
38 | }; | 38 | }; |
39 | 39 | ||
40 | static struct i2c_board_info __initdata omap4_i2c1_board_info[] = { | ||
41 | { | ||
42 | .addr = 0x48, | ||
43 | .flags = I2C_CLIENT_WAKE, | ||
44 | }, | ||
45 | { | ||
46 | I2C_BOARD_INFO("twl6040", 0x4b), | ||
47 | }, | ||
48 | }; | ||
49 | |||
40 | void __init omap_pmic_init(int bus, u32 clkrate, | 50 | void __init omap_pmic_init(int bus, u32 clkrate, |
41 | const char *pmic_type, int pmic_irq, | 51 | const char *pmic_type, int pmic_irq, |
42 | struct twl4030_platform_data *pmic_data) | 52 | struct twl4030_platform_data *pmic_data) |
@@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate, | |||
49 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | 59 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); |
50 | } | 60 | } |
51 | 61 | ||
62 | void __init omap4_pmic_init(const char *pmic_type, | ||
63 | struct twl4030_platform_data *pmic_data, | ||
64 | struct twl6040_platform_data *twl6040_data, int twl6040_irq) | ||
65 | { | ||
66 | /* PMIC part*/ | ||
67 | strncpy(omap4_i2c1_board_info[0].type, pmic_type, | ||
68 | sizeof(omap4_i2c1_board_info[0].type)); | ||
69 | omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; | ||
70 | omap4_i2c1_board_info[0].platform_data = pmic_data; | ||
71 | |||
72 | /* TWL6040 audio IC part */ | ||
73 | omap4_i2c1_board_info[1].irq = twl6040_irq; | ||
74 | omap4_i2c1_board_info[1].platform_data = twl6040_data; | ||
75 | |||
76 | omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2); | ||
77 | |||
78 | } | ||
79 | |||
52 | void __init omap_pmic_late_init(void) | 80 | void __init omap_pmic_late_init(void) |
53 | { | 81 | { |
54 | /* Init the OMAP TWL parameters (if PMIC has been registerd) */ | 82 | /* Init the OMAP TWL parameters (if PMIC has been registerd) */ |
55 | if (!pmic_i2c_board_info.irq) | 83 | if (pmic_i2c_board_info.irq) |
56 | return; | 84 | omap3_twl_init(); |
57 | 85 | if (omap4_i2c1_board_info[0].irq) | |
58 | omap3_twl_init(); | 86 | omap4_twl_init(); |
59 | omap4_twl_init(); | ||
60 | } | 87 | } |
61 | 88 | ||
62 | #if defined(CONFIG_ARCH_OMAP3) | 89 | #if defined(CONFIG_ARCH_OMAP3) |
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h index 275dde8cb27a..09627483a57f 100644 --- a/arch/arm/mach-omap2/twl-common.h +++ b/arch/arm/mach-omap2/twl-common.h | |||
@@ -29,6 +29,7 @@ | |||
29 | 29 | ||
30 | 30 | ||
31 | struct twl4030_platform_data; | 31 | struct twl4030_platform_data; |
32 | struct twl6040_platform_data; | ||
32 | 33 | ||
33 | void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | 34 | void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, |
34 | struct twl4030_platform_data *pmic_data); | 35 | struct twl4030_platform_data *pmic_data); |
@@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type, | |||
46 | omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); | 47 | omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); |
47 | } | 48 | } |
48 | 49 | ||
49 | static inline void omap4_pmic_init(const char *pmic_type, | 50 | void omap4_pmic_init(const char *pmic_type, |
50 | struct twl4030_platform_data *pmic_data) | 51 | struct twl4030_platform_data *pmic_data, |
51 | { | 52 | struct twl6040_platform_data *audio_data, int twl6040_irq); |
52 | /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ | ||
53 | omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
54 | } | ||
55 | 53 | ||
56 | void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | 54 | void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, |
57 | u32 pdata_flags, u32 regulators_flags); | 55 | u32 pdata_flags, u32 regulators_flags); |
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c index f51348dafafd..dde8a11f47d5 100644 --- a/arch/arm/mach-omap2/usb-host.c +++ b/arch/arm/mach-omap2/usb-host.c | |||
@@ -54,7 +54,7 @@ static struct omap_device_pm_latency omap_uhhtll_latency[] = { | |||
54 | /* | 54 | /* |
55 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST | 55 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST |
56 | */ | 56 | */ |
57 | static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | 57 | static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) |
58 | { | 58 | { |
59 | switch (port_mode[0]) { | 59 | switch (port_mode[0]) { |
60 | case OMAP_EHCI_PORT_MODE_PHY: | 60 | case OMAP_EHCI_PORT_MODE_PHY: |
@@ -197,7 +197,8 @@ static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |||
197 | return; | 197 | return; |
198 | } | 198 | } |
199 | 199 | ||
200 | static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | 200 | static |
201 | void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | ||
201 | { | 202 | { |
202 | switch (port_mode[0]) { | 203 | switch (port_mode[0]) { |
203 | case OMAP_EHCI_PORT_MODE_PHY: | 204 | case OMAP_EHCI_PORT_MODE_PHY: |
@@ -315,7 +316,7 @@ static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |||
315 | } | 316 | } |
316 | } | 317 | } |
317 | 318 | ||
318 | static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | 319 | static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) |
319 | { | 320 | { |
320 | switch (port_mode[0]) { | 321 | switch (port_mode[0]) { |
321 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | 322 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: |
@@ -412,7 +413,8 @@ static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |||
412 | } | 413 | } |
413 | } | 414 | } |
414 | 415 | ||
415 | static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | 416 | static |
417 | void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | ||
416 | { | 418 | { |
417 | switch (port_mode[0]) { | 419 | switch (port_mode[0]) { |
418 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | 420 | case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: |