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Diffstat (limited to 'arch/arm/mach-omap2/timer-gp.c')
-rw-r--r--arch/arm/mach-omap2/timer-gp.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index e2338c0aebcf..74fbed8491f2 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -37,7 +37,7 @@
37#include <linux/clockchips.h> 37#include <linux/clockchips.h>
38 38
39#include <asm/mach/time.h> 39#include <asm/mach/time.h>
40#include <mach/dmtimer.h> 40#include <plat/dmtimer.h>
41#include <asm/localtimer.h> 41#include <asm/localtimer.h>
42 42
43/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ 43/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
@@ -47,6 +47,7 @@ static struct omap_dm_timer *gptimer;
47static struct clock_event_device clockevent_gpt; 47static struct clock_event_device clockevent_gpt;
48static u8 __initdata gptimer_id = 1; 48static u8 __initdata gptimer_id = 1;
49static u8 __initdata inited; 49static u8 __initdata inited;
50struct omap_dm_timer *gptimer_wakeup;
50 51
51static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) 52static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
52{ 53{
@@ -84,8 +85,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
84 case CLOCK_EVT_MODE_PERIODIC: 85 case CLOCK_EVT_MODE_PERIODIC:
85 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; 86 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
86 period -= 1; 87 period -= 1;
87 if (cpu_is_omap44xx())
88 period = 0xff; /* FIXME: */
89 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); 88 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
90 break; 89 break;
91 case CLOCK_EVT_MODE_ONESHOT: 90 case CLOCK_EVT_MODE_ONESHOT:
@@ -134,6 +133,7 @@ static void __init omap2_gp_clockevent_init(void)
134 133
135 gptimer = omap_dm_timer_request_specific(gptimer_id); 134 gptimer = omap_dm_timer_request_specific(gptimer_id);
136 BUG_ON(gptimer == NULL); 135 BUG_ON(gptimer == NULL);
136 gptimer_wakeup = gptimer;
137 137
138#if defined(CONFIG_OMAP_32K_TIMER) 138#if defined(CONFIG_OMAP_32K_TIMER)
139 src = OMAP_TIMER_SRC_32_KHZ; 139 src = OMAP_TIMER_SRC_32_KHZ;
@@ -148,9 +148,6 @@ static void __init omap2_gp_clockevent_init(void)
148 "timer-gp: omap_dm_timer_set_source() failed\n"); 148 "timer-gp: omap_dm_timer_set_source() failed\n");
149 149
150 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); 150 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
151 if (cpu_is_omap44xx())
152 /* Assuming 32kHz clk is driving GPT1 */
153 tick_rate = 32768; /* FIXME: */
154 151
155 pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", 152 pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
156 gptimer_id, tick_rate); 153 gptimer_id, tick_rate);
@@ -231,7 +228,8 @@ static void __init omap2_gp_clocksource_init(void)
231static void __init omap2_gp_timer_init(void) 228static void __init omap2_gp_timer_init(void)
232{ 229{
233#ifdef CONFIG_LOCAL_TIMERS 230#ifdef CONFIG_LOCAL_TIMERS
234 twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); 231 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
232 BUG_ON(!twd_base);
235#endif 233#endif
236 omap_dm_timer_init(); 234 omap_dm_timer_init();
237 235