diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_twl.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_twl.c | 73 |
1 files changed, 14 insertions, 59 deletions
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 2bf35dc091be..fefd40166624 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c | |||
@@ -31,16 +31,6 @@ | |||
31 | #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 | 31 | #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 |
32 | #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 | 32 | #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 |
33 | 33 | ||
34 | #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 | ||
35 | #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 | ||
36 | #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 | ||
37 | #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c | ||
38 | |||
39 | #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 | ||
40 | #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c | ||
41 | #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 | ||
42 | #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 | ||
43 | |||
44 | #define OMAP4_SRI2C_SLAVE_ADDR 0x12 | 34 | #define OMAP4_SRI2C_SLAVE_ADDR 0x12 |
45 | #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 | 35 | #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 |
46 | #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 | 36 | #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 |
@@ -54,13 +44,6 @@ | |||
54 | #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 | 44 | #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 |
55 | #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 | 45 | #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 |
56 | 46 | ||
57 | #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA | ||
58 | #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39 | ||
59 | #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA | ||
60 | #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D | ||
61 | #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA | ||
62 | #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28 | ||
63 | |||
64 | static bool is_offset_valid; | 47 | static bool is_offset_valid; |
65 | static u8 smps_offset; | 48 | static u8 smps_offset; |
66 | /* | 49 | /* |
@@ -159,16 +142,11 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) | |||
159 | static struct omap_voltdm_pmic omap3_mpu_pmic = { | 142 | static struct omap_voltdm_pmic omap3_mpu_pmic = { |
160 | .slew_rate = 4000, | 143 | .slew_rate = 4000, |
161 | .step_size = 12500, | 144 | .step_size = 12500, |
162 | .on_volt = 1200000, | ||
163 | .onlp_volt = 1000000, | ||
164 | .ret_volt = 975000, | ||
165 | .off_volt = 600000, | ||
166 | .volt_setup_time = 0xfff, | ||
167 | .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, | 145 | .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, |
168 | .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, | 146 | .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, |
169 | .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, | 147 | .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, |
170 | .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN, | 148 | .vddmin = 600000, |
171 | .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, | 149 | .vddmax = 1450000, |
172 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | 150 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, |
173 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | 151 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, |
174 | .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, | 152 | .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, |
@@ -180,16 +158,11 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { | |||
180 | static struct omap_voltdm_pmic omap3_core_pmic = { | 158 | static struct omap_voltdm_pmic omap3_core_pmic = { |
181 | .slew_rate = 4000, | 159 | .slew_rate = 4000, |
182 | .step_size = 12500, | 160 | .step_size = 12500, |
183 | .on_volt = 1200000, | ||
184 | .onlp_volt = 1000000, | ||
185 | .ret_volt = 975000, | ||
186 | .off_volt = 600000, | ||
187 | .volt_setup_time = 0xfff, | ||
188 | .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, | 161 | .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, |
189 | .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, | 162 | .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, |
190 | .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, | 163 | .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, |
191 | .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN, | 164 | .vddmin = 600000, |
192 | .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, | 165 | .vddmax = 1450000, |
193 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | 166 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, |
194 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | 167 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, |
195 | .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, | 168 | .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, |
@@ -201,21 +174,17 @@ static struct omap_voltdm_pmic omap3_core_pmic = { | |||
201 | static struct omap_voltdm_pmic omap4_mpu_pmic = { | 174 | static struct omap_voltdm_pmic omap4_mpu_pmic = { |
202 | .slew_rate = 4000, | 175 | .slew_rate = 4000, |
203 | .step_size = 12660, | 176 | .step_size = 12660, |
204 | .on_volt = 1375000, | ||
205 | .onlp_volt = 1375000, | ||
206 | .ret_volt = 830000, | ||
207 | .off_volt = 0, | ||
208 | .volt_setup_time = 0, | ||
209 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | 177 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, |
210 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | 178 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, |
211 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, | 179 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, |
212 | .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN, | 180 | .vddmin = 0, |
213 | .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, | 181 | .vddmax = 2100000, |
214 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | 182 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, |
215 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | 183 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, |
216 | .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, | 184 | .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, |
217 | .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, | 185 | .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, |
218 | .i2c_high_speed = true, | 186 | .i2c_high_speed = true, |
187 | .i2c_pad_load = 3, | ||
219 | .vsel_to_uv = twl6030_vsel_to_uv, | 188 | .vsel_to_uv = twl6030_vsel_to_uv, |
220 | .uv_to_vsel = twl6030_uv_to_vsel, | 189 | .uv_to_vsel = twl6030_uv_to_vsel, |
221 | }; | 190 | }; |
@@ -223,21 +192,17 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { | |||
223 | static struct omap_voltdm_pmic omap4_iva_pmic = { | 192 | static struct omap_voltdm_pmic omap4_iva_pmic = { |
224 | .slew_rate = 4000, | 193 | .slew_rate = 4000, |
225 | .step_size = 12660, | 194 | .step_size = 12660, |
226 | .on_volt = 1188000, | ||
227 | .onlp_volt = 1188000, | ||
228 | .ret_volt = 830000, | ||
229 | .off_volt = 0, | ||
230 | .volt_setup_time = 0, | ||
231 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | 195 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, |
232 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | 196 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, |
233 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, | 197 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, |
234 | .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN, | 198 | .vddmin = 0, |
235 | .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, | 199 | .vddmax = 2100000, |
236 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | 200 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, |
237 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | 201 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, |
238 | .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, | 202 | .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, |
239 | .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, | 203 | .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, |
240 | .i2c_high_speed = true, | 204 | .i2c_high_speed = true, |
205 | .i2c_pad_load = 3, | ||
241 | .vsel_to_uv = twl6030_vsel_to_uv, | 206 | .vsel_to_uv = twl6030_vsel_to_uv, |
242 | .uv_to_vsel = twl6030_uv_to_vsel, | 207 | .uv_to_vsel = twl6030_uv_to_vsel, |
243 | }; | 208 | }; |
@@ -245,20 +210,17 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { | |||
245 | static struct omap_voltdm_pmic omap4_core_pmic = { | 210 | static struct omap_voltdm_pmic omap4_core_pmic = { |
246 | .slew_rate = 4000, | 211 | .slew_rate = 4000, |
247 | .step_size = 12660, | 212 | .step_size = 12660, |
248 | .on_volt = 1200000, | ||
249 | .onlp_volt = 1200000, | ||
250 | .ret_volt = 830000, | ||
251 | .off_volt = 0, | ||
252 | .volt_setup_time = 0, | ||
253 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | 213 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, |
254 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | 214 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, |
255 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, | 215 | .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, |
256 | .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN, | 216 | .vddmin = 0, |
257 | .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, | 217 | .vddmax = 2100000, |
258 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | 218 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, |
259 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | 219 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, |
260 | .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, | 220 | .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, |
261 | .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, | 221 | .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, |
222 | .i2c_high_speed = true, | ||
223 | .i2c_pad_load = 3, | ||
262 | .vsel_to_uv = twl6030_vsel_to_uv, | 224 | .vsel_to_uv = twl6030_vsel_to_uv, |
263 | .uv_to_vsel = twl6030_uv_to_vsel, | 225 | .uv_to_vsel = twl6030_uv_to_vsel, |
264 | }; | 226 | }; |
@@ -289,13 +251,6 @@ int __init omap3_twl_init(void) | |||
289 | if (!cpu_is_omap34xx()) | 251 | if (!cpu_is_omap34xx()) |
290 | return -ENODEV; | 252 | return -ENODEV; |
291 | 253 | ||
292 | if (cpu_is_omap3630()) { | ||
293 | omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; | ||
294 | omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; | ||
295 | omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; | ||
296 | omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; | ||
297 | } | ||
298 | |||
299 | /* | 254 | /* |
300 | * The smartreflex bit on twl4030 specifies if the setting of voltage | 255 | * The smartreflex bit on twl4030 specifies if the setting of voltage |
301 | * is done over the I2C_SR path. Since this setting is independent of | 256 | * is done over the I2C_SR path. Since this setting is independent of |