diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 7695e5d43316..daaf165af696 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <plat/mmc.h> | 30 | #include <plat/mmc.h> |
31 | #include <plat/i2c.h> | 31 | #include <plat/i2c.h> |
32 | #include <plat/dmtimer.h> | 32 | #include <plat/dmtimer.h> |
33 | #include <plat/common.h> | ||
33 | 34 | ||
34 | #include "omap_hwmod_common_data.h" | 35 | #include "omap_hwmod_common_data.h" |
35 | 36 | ||
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = { | |||
1187 | static struct omap_hwmod_class omap44xx_dss_hwmod_class = { | 1188 | static struct omap_hwmod_class omap44xx_dss_hwmod_class = { |
1188 | .name = "dss", | 1189 | .name = "dss", |
1189 | .sysc = &omap44xx_dss_sysc, | 1190 | .sysc = &omap44xx_dss_sysc, |
1191 | .reset = omap_dss_reset, | ||
1190 | }; | 1192 | }; |
1191 | 1193 | ||
1192 | /* dss */ | 1194 | /* dss */ |
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = { | |||
1240 | static struct omap_hwmod_opt_clk dss_opt_clks[] = { | 1242 | static struct omap_hwmod_opt_clk dss_opt_clks[] = { |
1241 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | 1243 | { .role = "sys_clk", .clk = "dss_sys_clk" }, |
1242 | { .role = "tv_clk", .clk = "dss_tv_clk" }, | 1244 | { .role = "tv_clk", .clk = "dss_tv_clk" }, |
1243 | { .role = "dss_clk", .clk = "dss_dss_clk" }, | 1245 | { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, |
1244 | { .role = "video_clk", .clk = "dss_48mhz_clk" }, | ||
1245 | }; | 1246 | }; |
1246 | 1247 | ||
1247 | static struct omap_hwmod omap44xx_dss_hwmod = { | 1248 | static struct omap_hwmod omap44xx_dss_hwmod = { |
1248 | .name = "dss_core", | 1249 | .name = "dss_core", |
1250 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1249 | .class = &omap44xx_dss_hwmod_class, | 1251 | .class = &omap44xx_dss_hwmod_class, |
1250 | .clkdm_name = "l3_dss_clkdm", | 1252 | .clkdm_name = "l3_dss_clkdm", |
1251 | .main_clk = "dss_dss_clk", | 1253 | .main_clk = "dss_dss_clk", |
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { | |||
1325 | { } | 1327 | { } |
1326 | }; | 1328 | }; |
1327 | 1329 | ||
1330 | static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = { | ||
1331 | .manager_count = 3, | ||
1332 | .has_framedonetv_irq = 1 | ||
1333 | }; | ||
1334 | |||
1328 | /* l4_per -> dss_dispc */ | 1335 | /* l4_per -> dss_dispc */ |
1329 | static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { | 1336 | static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { |
1330 | .master = &omap44xx_l4_per_hwmod, | 1337 | .master = &omap44xx_l4_per_hwmod, |
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { | |||
1340 | &omap44xx_l4_per__dss_dispc, | 1347 | &omap44xx_l4_per__dss_dispc, |
1341 | }; | 1348 | }; |
1342 | 1349 | ||
1343 | static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { | ||
1344 | { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
1345 | { .role = "tv_clk", .clk = "dss_tv_clk" }, | ||
1346 | { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, | ||
1347 | }; | ||
1348 | |||
1349 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | 1350 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { |
1350 | .name = "dss_dispc", | 1351 | .name = "dss_dispc", |
1351 | .class = &omap44xx_dispc_hwmod_class, | 1352 | .class = &omap44xx_dispc_hwmod_class, |
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | |||
1359 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | 1360 | .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, |
1360 | }, | 1361 | }, |
1361 | }, | 1362 | }, |
1362 | .opt_clks = dss_dispc_opt_clks, | ||
1363 | .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), | ||
1364 | .slaves = omap44xx_dss_dispc_slaves, | 1363 | .slaves = omap44xx_dss_dispc_slaves, |
1365 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), | 1364 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), |
1365 | .dev_attr = &omap44xx_dss_dispc_dev_attr | ||
1366 | }; | 1366 | }; |
1367 | 1367 | ||
1368 | /* | 1368 | /* |
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | |||
1624 | .clkdm_name = "l3_dss_clkdm", | 1624 | .clkdm_name = "l3_dss_clkdm", |
1625 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | 1625 | .mpu_irqs = omap44xx_dss_hdmi_irqs, |
1626 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | 1626 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, |
1627 | .main_clk = "dss_dss_clk", | 1627 | .main_clk = "dss_48mhz_clk", |
1628 | .prcm = { | 1628 | .prcm = { |
1629 | .omap4 = { | 1629 | .omap4 = { |
1630 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | 1630 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, |
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { | |||
1785 | .name = "dss_venc", | 1785 | .name = "dss_venc", |
1786 | .class = &omap44xx_venc_hwmod_class, | 1786 | .class = &omap44xx_venc_hwmod_class, |
1787 | .clkdm_name = "l3_dss_clkdm", | 1787 | .clkdm_name = "l3_dss_clkdm", |
1788 | .main_clk = "dss_dss_clk", | 1788 | .main_clk = "dss_tv_clk", |
1789 | .prcm = { | 1789 | .prcm = { |
1790 | .omap4 = { | 1790 | .omap4 = { |
1791 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | 1791 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, |