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Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c412
1 files changed, 336 insertions, 76 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 5d5df49749df..6201422c0606 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -123,9 +123,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
123static struct omap_hwmod omap44xx_dmm_hwmod = { 123static struct omap_hwmod omap44xx_dmm_hwmod = {
124 .name = "dmm", 124 .name = "dmm",
125 .class = &omap44xx_dmm_hwmod_class, 125 .class = &omap44xx_dmm_hwmod_class,
126 .mpu_irqs = omap44xx_dmm_irqs, 126 .clkdm_name = "l3_emif_clkdm",
127 .prcm = {
128 .omap4 = {
129 .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET,
130 .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET,
131 },
132 },
127 .slaves = omap44xx_dmm_slaves, 133 .slaves = omap44xx_dmm_slaves,
128 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), 134 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
135 .mpu_irqs = omap44xx_dmm_irqs,
129 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 136 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
130}; 137};
131 138
@@ -173,6 +180,13 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {
173static struct omap_hwmod omap44xx_emif_fw_hwmod = { 180static struct omap_hwmod omap44xx_emif_fw_hwmod = {
174 .name = "emif_fw", 181 .name = "emif_fw",
175 .class = &omap44xx_emif_fw_hwmod_class, 182 .class = &omap44xx_emif_fw_hwmod_class,
183 .clkdm_name = "l3_emif_clkdm",
184 .prcm = {
185 .omap4 = {
186 .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET,
187 .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET,
188 },
189 },
176 .slaves = omap44xx_emif_fw_slaves, 190 .slaves = omap44xx_emif_fw_slaves,
177 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), 191 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
178 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 192 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -212,6 +226,14 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
212static struct omap_hwmod omap44xx_l3_instr_hwmod = { 226static struct omap_hwmod omap44xx_l3_instr_hwmod = {
213 .name = "l3_instr", 227 .name = "l3_instr",
214 .class = &omap44xx_l3_hwmod_class, 228 .class = &omap44xx_l3_hwmod_class,
229 .clkdm_name = "l3_instr_clkdm",
230 .prcm = {
231 .omap4 = {
232 .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
233 .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET,
234 .modulemode = MODULEMODE_HWCTRL,
235 },
236 },
215 .slaves = omap44xx_l3_instr_slaves, 237 .slaves = omap44xx_l3_instr_slaves,
216 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), 238 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
217 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -304,7 +326,14 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
304static struct omap_hwmod omap44xx_l3_main_1_hwmod = { 326static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
305 .name = "l3_main_1", 327 .name = "l3_main_1",
306 .class = &omap44xx_l3_hwmod_class, 328 .class = &omap44xx_l3_hwmod_class,
329 .clkdm_name = "l3_1_clkdm",
307 .mpu_irqs = omap44xx_l3_main_1_irqs, 330 .mpu_irqs = omap44xx_l3_main_1_irqs,
331 .prcm = {
332 .omap4 = {
333 .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET,
334 .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET,
335 },
336 },
308 .slaves = omap44xx_l3_main_1_slaves, 337 .slaves = omap44xx_l3_main_1_slaves,
309 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), 338 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
310 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 339 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -400,6 +429,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
400static struct omap_hwmod omap44xx_l3_main_2_hwmod = { 429static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
401 .name = "l3_main_2", 430 .name = "l3_main_2",
402 .class = &omap44xx_l3_hwmod_class, 431 .class = &omap44xx_l3_hwmod_class,
432 .clkdm_name = "l3_2_clkdm",
433 .prcm = {
434 .omap4 = {
435 .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET,
436 .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET,
437 },
438 },
403 .slaves = omap44xx_l3_main_2_slaves, 439 .slaves = omap44xx_l3_main_2_slaves,
404 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), 440 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
405 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 441 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -450,6 +486,14 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {
450static struct omap_hwmod omap44xx_l3_main_3_hwmod = { 486static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
451 .name = "l3_main_3", 487 .name = "l3_main_3",
452 .class = &omap44xx_l3_hwmod_class, 488 .class = &omap44xx_l3_hwmod_class,
489 .clkdm_name = "l3_instr_clkdm",
490 .prcm = {
491 .omap4 = {
492 .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET,
493 .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET,
494 .modulemode = MODULEMODE_HWCTRL,
495 },
496 },
453 .slaves = omap44xx_l3_main_3_slaves, 497 .slaves = omap44xx_l3_main_3_slaves,
454 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), 498 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
455 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 499 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -507,6 +551,12 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
507static struct omap_hwmod omap44xx_l4_abe_hwmod = { 551static struct omap_hwmod omap44xx_l4_abe_hwmod = {
508 .name = "l4_abe", 552 .name = "l4_abe",
509 .class = &omap44xx_l4_hwmod_class, 553 .class = &omap44xx_l4_hwmod_class,
554 .clkdm_name = "abe_clkdm",
555 .prcm = {
556 .omap4 = {
557 .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,
558 },
559 },
510 .slaves = omap44xx_l4_abe_slaves, 560 .slaves = omap44xx_l4_abe_slaves,
511 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), 561 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
512 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 562 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -529,6 +579,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {
529static struct omap_hwmod omap44xx_l4_cfg_hwmod = { 579static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
530 .name = "l4_cfg", 580 .name = "l4_cfg",
531 .class = &omap44xx_l4_hwmod_class, 581 .class = &omap44xx_l4_hwmod_class,
582 .clkdm_name = "l4_cfg_clkdm",
583 .prcm = {
584 .omap4 = {
585 .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
586 .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
587 },
588 },
532 .slaves = omap44xx_l4_cfg_slaves, 589 .slaves = omap44xx_l4_cfg_slaves,
533 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), 590 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
534 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 591 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -551,6 +608,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {
551static struct omap_hwmod omap44xx_l4_per_hwmod = { 608static struct omap_hwmod omap44xx_l4_per_hwmod = {
552 .name = "l4_per", 609 .name = "l4_per",
553 .class = &omap44xx_l4_hwmod_class, 610 .class = &omap44xx_l4_hwmod_class,
611 .clkdm_name = "l4_per_clkdm",
612 .prcm = {
613 .omap4 = {
614 .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET,
615 .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET,
616 },
617 },
554 .slaves = omap44xx_l4_per_slaves, 618 .slaves = omap44xx_l4_per_slaves,
555 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), 619 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
556 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 620 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -573,6 +637,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {
573static struct omap_hwmod omap44xx_l4_wkup_hwmod = { 637static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
574 .name = "l4_wkup", 638 .name = "l4_wkup",
575 .class = &omap44xx_l4_hwmod_class, 639 .class = &omap44xx_l4_hwmod_class,
640 .clkdm_name = "l4_wkup_clkdm",
641 .prcm = {
642 .omap4 = {
643 .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET,
644 .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET,
645 },
646 },
576 .slaves = omap44xx_l4_wkup_slaves, 647 .slaves = omap44xx_l4_wkup_slaves,
577 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), 648 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
578 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 649 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -603,6 +674,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
603static struct omap_hwmod omap44xx_mpu_private_hwmod = { 674static struct omap_hwmod omap44xx_mpu_private_hwmod = {
604 .name = "mpu_private", 675 .name = "mpu_private",
605 .class = &omap44xx_mpu_bus_hwmod_class, 676 .class = &omap44xx_mpu_bus_hwmod_class,
677 .clkdm_name = "mpuss_clkdm",
606 .slaves = omap44xx_mpu_private_slaves, 678 .slaves = omap44xx_mpu_private_slaves,
607 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), 679 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
608 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 680 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -741,12 +813,15 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = {
741static struct omap_hwmod omap44xx_aess_hwmod = { 813static struct omap_hwmod omap44xx_aess_hwmod = {
742 .name = "aess", 814 .name = "aess",
743 .class = &omap44xx_aess_hwmod_class, 815 .class = &omap44xx_aess_hwmod_class,
816 .clkdm_name = "abe_clkdm",
744 .mpu_irqs = omap44xx_aess_irqs, 817 .mpu_irqs = omap44xx_aess_irqs,
745 .sdma_reqs = omap44xx_aess_sdma_reqs, 818 .sdma_reqs = omap44xx_aess_sdma_reqs,
746 .main_clk = "aess_fck", 819 .main_clk = "aess_fck",
747 .prcm = { 820 .prcm = {
748 .omap4 = { 821 .omap4 = {
749 .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, 822 .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET,
823 .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET,
824 .modulemode = MODULEMODE_SWCTRL,
750 }, 825 },
751 }, 826 },
752 .slaves = omap44xx_aess_slaves, 827 .slaves = omap44xx_aess_slaves,
@@ -773,9 +848,10 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
773static struct omap_hwmod omap44xx_bandgap_hwmod = { 848static struct omap_hwmod omap44xx_bandgap_hwmod = {
774 .name = "bandgap", 849 .name = "bandgap",
775 .class = &omap44xx_bandgap_hwmod_class, 850 .class = &omap44xx_bandgap_hwmod_class,
851 .clkdm_name = "l4_wkup_clkdm",
776 .prcm = { 852 .prcm = {
777 .omap4 = { 853 .omap4 = {
778 .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, 854 .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,
779 }, 855 },
780 }, 856 },
781 .opt_clks = bandgap_opt_clks, 857 .opt_clks = bandgap_opt_clks,
@@ -830,11 +906,13 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
830static struct omap_hwmod omap44xx_counter_32k_hwmod = { 906static struct omap_hwmod omap44xx_counter_32k_hwmod = {
831 .name = "counter_32k", 907 .name = "counter_32k",
832 .class = &omap44xx_counter_hwmod_class, 908 .class = &omap44xx_counter_hwmod_class,
909 .clkdm_name = "l4_wkup_clkdm",
833 .flags = HWMOD_SWSUP_SIDLE, 910 .flags = HWMOD_SWSUP_SIDLE,
834 .main_clk = "sys_32k_ck", 911 .main_clk = "sys_32k_ck",
835 .prcm = { 912 .prcm = {
836 .omap4 = { 913 .omap4 = {
837 .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, 914 .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
915 .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,
838 }, 916 },
839 }, 917 },
840 .slaves = omap44xx_counter_32k_slaves, 918 .slaves = omap44xx_counter_32k_slaves,
@@ -913,11 +991,13 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
913static struct omap_hwmod omap44xx_dma_system_hwmod = { 991static struct omap_hwmod omap44xx_dma_system_hwmod = {
914 .name = "dma_system", 992 .name = "dma_system",
915 .class = &omap44xx_dma_hwmod_class, 993 .class = &omap44xx_dma_hwmod_class,
994 .clkdm_name = "l3_dma_clkdm",
916 .mpu_irqs = omap44xx_dma_system_irqs, 995 .mpu_irqs = omap44xx_dma_system_irqs,
917 .main_clk = "l3_div_ck", 996 .main_clk = "l3_div_ck",
918 .prcm = { 997 .prcm = {
919 .omap4 = { 998 .omap4 = {
920 .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL, 999 .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET,
1000 .context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET,
921 }, 1001 },
922 }, 1002 },
923 .dev_attr = &dma_dev_attr, 1003 .dev_attr = &dma_dev_attr,
@@ -1005,12 +1085,15 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = {
1005static struct omap_hwmod omap44xx_dmic_hwmod = { 1085static struct omap_hwmod omap44xx_dmic_hwmod = {
1006 .name = "dmic", 1086 .name = "dmic",
1007 .class = &omap44xx_dmic_hwmod_class, 1087 .class = &omap44xx_dmic_hwmod_class,
1088 .clkdm_name = "abe_clkdm",
1008 .mpu_irqs = omap44xx_dmic_irqs, 1089 .mpu_irqs = omap44xx_dmic_irqs,
1009 .sdma_reqs = omap44xx_dmic_sdma_reqs, 1090 .sdma_reqs = omap44xx_dmic_sdma_reqs,
1010 .main_clk = "dmic_fck", 1091 .main_clk = "dmic_fck",
1011 .prcm = { 1092 .prcm = {
1012 .omap4 = { 1093 .omap4 = {
1013 .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, 1094 .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET,
1095 .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET,
1096 .modulemode = MODULEMODE_SWCTRL,
1014 }, 1097 },
1015 }, 1098 },
1016 .slaves = omap44xx_dmic_slaves, 1099 .slaves = omap44xx_dmic_slaves,
@@ -1072,12 +1155,13 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = {
1072static struct omap_hwmod omap44xx_dsp_c0_hwmod = { 1155static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
1073 .name = "dsp_c0", 1156 .name = "dsp_c0",
1074 .class = &omap44xx_dsp_hwmod_class, 1157 .class = &omap44xx_dsp_hwmod_class,
1158 .clkdm_name = "tesla_clkdm",
1075 .flags = HWMOD_INIT_NO_RESET, 1159 .flags = HWMOD_INIT_NO_RESET,
1076 .rst_lines = omap44xx_dsp_c0_resets, 1160 .rst_lines = omap44xx_dsp_c0_resets,
1077 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), 1161 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets),
1078 .prcm = { 1162 .prcm = {
1079 .omap4 = { 1163 .omap4 = {
1080 .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, 1164 .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
1081 }, 1165 },
1082 }, 1166 },
1083 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1086,14 +1170,17 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
1086static struct omap_hwmod omap44xx_dsp_hwmod = { 1170static struct omap_hwmod omap44xx_dsp_hwmod = {
1087 .name = "dsp", 1171 .name = "dsp",
1088 .class = &omap44xx_dsp_hwmod_class, 1172 .class = &omap44xx_dsp_hwmod_class,
1173 .clkdm_name = "tesla_clkdm",
1089 .mpu_irqs = omap44xx_dsp_irqs, 1174 .mpu_irqs = omap44xx_dsp_irqs,
1090 .rst_lines = omap44xx_dsp_resets, 1175 .rst_lines = omap44xx_dsp_resets,
1091 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), 1176 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
1092 .main_clk = "dsp_fck", 1177 .main_clk = "dsp_fck",
1093 .prcm = { 1178 .prcm = {
1094 .omap4 = { 1179 .omap4 = {
1095 .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, 1180 .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
1096 .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, 1181 .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
1182 .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET,
1183 .modulemode = MODULEMODE_HWCTRL,
1097 }, 1184 },
1098 }, 1185 },
1099 .slaves = omap44xx_dsp_slaves, 1186 .slaves = omap44xx_dsp_slaves,
@@ -1177,10 +1264,12 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1177static struct omap_hwmod omap44xx_dss_hwmod = { 1264static struct omap_hwmod omap44xx_dss_hwmod = {
1178 .name = "dss_core", 1265 .name = "dss_core",
1179 .class = &omap44xx_dss_hwmod_class, 1266 .class = &omap44xx_dss_hwmod_class,
1267 .clkdm_name = "l3_dss_clkdm",
1180 .main_clk = "dss_dss_clk", 1268 .main_clk = "dss_dss_clk",
1181 .prcm = { 1269 .prcm = {
1182 .omap4 = { 1270 .omap4 = {
1183 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1271 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1272 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1184 }, 1273 },
1185 }, 1274 },
1186 .opt_clks = dss_opt_clks, 1275 .opt_clks = dss_opt_clks,
@@ -1278,13 +1367,14 @@ static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
1278static struct omap_hwmod omap44xx_dss_dispc_hwmod = { 1367static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1279 .name = "dss_dispc", 1368 .name = "dss_dispc",
1280 .class = &omap44xx_dispc_hwmod_class, 1369 .class = &omap44xx_dispc_hwmod_class,
1281 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1370 .clkdm_name = "l3_dss_clkdm",
1282 .mpu_irqs = omap44xx_dss_dispc_irqs, 1371 .mpu_irqs = omap44xx_dss_dispc_irqs,
1283 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, 1372 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
1284 .main_clk = "dss_dss_clk", 1373 .main_clk = "dss_dss_clk",
1285 .prcm = { 1374 .prcm = {
1286 .omap4 = { 1375 .omap4 = {
1287 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1376 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1377 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1288 }, 1378 },
1289 }, 1379 },
1290 .opt_clks = dss_dispc_opt_clks, 1380 .opt_clks = dss_dispc_opt_clks,
@@ -1376,12 +1466,14 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1376static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { 1466static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1377 .name = "dss_dsi1", 1467 .name = "dss_dsi1",
1378 .class = &omap44xx_dsi_hwmod_class, 1468 .class = &omap44xx_dsi_hwmod_class,
1469 .clkdm_name = "l3_dss_clkdm",
1379 .mpu_irqs = omap44xx_dss_dsi1_irqs, 1470 .mpu_irqs = omap44xx_dss_dsi1_irqs,
1380 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, 1471 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
1381 .main_clk = "dss_dss_clk", 1472 .main_clk = "dss_dss_clk",
1382 .prcm = { 1473 .prcm = {
1383 .omap4 = { 1474 .omap4 = {
1384 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1475 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1476 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1385 }, 1477 },
1386 }, 1478 },
1387 .opt_clks = dss_dsi1_opt_clks, 1479 .opt_clks = dss_dsi1_opt_clks,
@@ -1452,12 +1544,14 @@ static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {
1452static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { 1544static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1453 .name = "dss_dsi2", 1545 .name = "dss_dsi2",
1454 .class = &omap44xx_dsi_hwmod_class, 1546 .class = &omap44xx_dsi_hwmod_class,
1547 .clkdm_name = "l3_dss_clkdm",
1455 .mpu_irqs = omap44xx_dss_dsi2_irqs, 1548 .mpu_irqs = omap44xx_dss_dsi2_irqs,
1456 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, 1549 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
1457 .main_clk = "dss_dss_clk", 1550 .main_clk = "dss_dss_clk",
1458 .prcm = { 1551 .prcm = {
1459 .omap4 = { 1552 .omap4 = {
1460 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1553 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1554 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1461 }, 1555 },
1462 }, 1556 },
1463 .opt_clks = dss_dsi2_opt_clks, 1557 .opt_clks = dss_dsi2_opt_clks,
@@ -1548,12 +1642,14 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
1548static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { 1642static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1549 .name = "dss_hdmi", 1643 .name = "dss_hdmi",
1550 .class = &omap44xx_hdmi_hwmod_class, 1644 .class = &omap44xx_hdmi_hwmod_class,
1645 .clkdm_name = "l3_dss_clkdm",
1551 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1646 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1552 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1647 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1553 .main_clk = "dss_dss_clk", 1648 .main_clk = "dss_dss_clk",
1554 .prcm = { 1649 .prcm = {
1555 .omap4 = { 1650 .omap4 = {
1556 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1651 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1652 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1557 }, 1653 },
1558 }, 1654 },
1559 .opt_clks = dss_hdmi_opt_clks, 1655 .opt_clks = dss_hdmi_opt_clks,
@@ -1639,11 +1735,13 @@ static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1639static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { 1735static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
1640 .name = "dss_rfbi", 1736 .name = "dss_rfbi",
1641 .class = &omap44xx_rfbi_hwmod_class, 1737 .class = &omap44xx_rfbi_hwmod_class,
1738 .clkdm_name = "l3_dss_clkdm",
1642 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, 1739 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
1643 .main_clk = "dss_dss_clk", 1740 .main_clk = "dss_dss_clk",
1644 .prcm = { 1741 .prcm = {
1645 .omap4 = { 1742 .omap4 = {
1646 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1743 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1744 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1647 }, 1745 },
1648 }, 1746 },
1649 .opt_clks = dss_rfbi_opt_clks, 1747 .opt_clks = dss_rfbi_opt_clks,
@@ -1709,10 +1807,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
1709static struct omap_hwmod omap44xx_dss_venc_hwmod = { 1807static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1710 .name = "dss_venc", 1808 .name = "dss_venc",
1711 .class = &omap44xx_venc_hwmod_class, 1809 .class = &omap44xx_venc_hwmod_class,
1810 .clkdm_name = "l3_dss_clkdm",
1712 .main_clk = "dss_dss_clk", 1811 .main_clk = "dss_dss_clk",
1713 .prcm = { 1812 .prcm = {
1714 .omap4 = { 1813 .omap4 = {
1715 .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, 1814 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
1815 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1716 }, 1816 },
1717 }, 1817 },
1718 .slaves = omap44xx_dss_venc_slaves, 1818 .slaves = omap44xx_dss_venc_slaves,
@@ -1786,11 +1886,14 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
1786static struct omap_hwmod omap44xx_gpio1_hwmod = { 1886static struct omap_hwmod omap44xx_gpio1_hwmod = {
1787 .name = "gpio1", 1887 .name = "gpio1",
1788 .class = &omap44xx_gpio_hwmod_class, 1888 .class = &omap44xx_gpio_hwmod_class,
1889 .clkdm_name = "l4_wkup_clkdm",
1789 .mpu_irqs = omap44xx_gpio1_irqs, 1890 .mpu_irqs = omap44xx_gpio1_irqs,
1790 .main_clk = "gpio1_ick", 1891 .main_clk = "gpio1_ick",
1791 .prcm = { 1892 .prcm = {
1792 .omap4 = { 1893 .omap4 = {
1793 .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL, 1894 .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET,
1895 .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET,
1896 .modulemode = MODULEMODE_HWCTRL,
1794 }, 1897 },
1795 }, 1898 },
1796 .opt_clks = gpio1_opt_clks, 1899 .opt_clks = gpio1_opt_clks,
@@ -1838,12 +1941,15 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
1838static struct omap_hwmod omap44xx_gpio2_hwmod = { 1941static struct omap_hwmod omap44xx_gpio2_hwmod = {
1839 .name = "gpio2", 1942 .name = "gpio2",
1840 .class = &omap44xx_gpio_hwmod_class, 1943 .class = &omap44xx_gpio_hwmod_class,
1944 .clkdm_name = "l4_per_clkdm",
1841 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1945 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1842 .mpu_irqs = omap44xx_gpio2_irqs, 1946 .mpu_irqs = omap44xx_gpio2_irqs,
1843 .main_clk = "gpio2_ick", 1947 .main_clk = "gpio2_ick",
1844 .prcm = { 1948 .prcm = {
1845 .omap4 = { 1949 .omap4 = {
1846 .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL, 1950 .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET,
1951 .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET,
1952 .modulemode = MODULEMODE_HWCTRL,
1847 }, 1953 },
1848 }, 1954 },
1849 .opt_clks = gpio2_opt_clks, 1955 .opt_clks = gpio2_opt_clks,
@@ -1891,12 +1997,15 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
1891static struct omap_hwmod omap44xx_gpio3_hwmod = { 1997static struct omap_hwmod omap44xx_gpio3_hwmod = {
1892 .name = "gpio3", 1998 .name = "gpio3",
1893 .class = &omap44xx_gpio_hwmod_class, 1999 .class = &omap44xx_gpio_hwmod_class,
2000 .clkdm_name = "l4_per_clkdm",
1894 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2001 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1895 .mpu_irqs = omap44xx_gpio3_irqs, 2002 .mpu_irqs = omap44xx_gpio3_irqs,
1896 .main_clk = "gpio3_ick", 2003 .main_clk = "gpio3_ick",
1897 .prcm = { 2004 .prcm = {
1898 .omap4 = { 2005 .omap4 = {
1899 .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL, 2006 .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET,
2007 .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET,
2008 .modulemode = MODULEMODE_HWCTRL,
1900 }, 2009 },
1901 }, 2010 },
1902 .opt_clks = gpio3_opt_clks, 2011 .opt_clks = gpio3_opt_clks,
@@ -1944,12 +2053,15 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
1944static struct omap_hwmod omap44xx_gpio4_hwmod = { 2053static struct omap_hwmod omap44xx_gpio4_hwmod = {
1945 .name = "gpio4", 2054 .name = "gpio4",
1946 .class = &omap44xx_gpio_hwmod_class, 2055 .class = &omap44xx_gpio_hwmod_class,
2056 .clkdm_name = "l4_per_clkdm",
1947 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2057 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1948 .mpu_irqs = omap44xx_gpio4_irqs, 2058 .mpu_irqs = omap44xx_gpio4_irqs,
1949 .main_clk = "gpio4_ick", 2059 .main_clk = "gpio4_ick",
1950 .prcm = { 2060 .prcm = {
1951 .omap4 = { 2061 .omap4 = {
1952 .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL, 2062 .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET,
2063 .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET,
2064 .modulemode = MODULEMODE_HWCTRL,
1953 }, 2065 },
1954 }, 2066 },
1955 .opt_clks = gpio4_opt_clks, 2067 .opt_clks = gpio4_opt_clks,
@@ -1997,12 +2109,15 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
1997static struct omap_hwmod omap44xx_gpio5_hwmod = { 2109static struct omap_hwmod omap44xx_gpio5_hwmod = {
1998 .name = "gpio5", 2110 .name = "gpio5",
1999 .class = &omap44xx_gpio_hwmod_class, 2111 .class = &omap44xx_gpio_hwmod_class,
2112 .clkdm_name = "l4_per_clkdm",
2000 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2113 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2001 .mpu_irqs = omap44xx_gpio5_irqs, 2114 .mpu_irqs = omap44xx_gpio5_irqs,
2002 .main_clk = "gpio5_ick", 2115 .main_clk = "gpio5_ick",
2003 .prcm = { 2116 .prcm = {
2004 .omap4 = { 2117 .omap4 = {
2005 .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL, 2118 .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET,
2119 .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET,
2120 .modulemode = MODULEMODE_HWCTRL,
2006 }, 2121 },
2007 }, 2122 },
2008 .opt_clks = gpio5_opt_clks, 2123 .opt_clks = gpio5_opt_clks,
@@ -2050,12 +2165,15 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
2050static struct omap_hwmod omap44xx_gpio6_hwmod = { 2165static struct omap_hwmod omap44xx_gpio6_hwmod = {
2051 .name = "gpio6", 2166 .name = "gpio6",
2052 .class = &omap44xx_gpio_hwmod_class, 2167 .class = &omap44xx_gpio_hwmod_class,
2168 .clkdm_name = "l4_per_clkdm",
2053 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2169 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2054 .mpu_irqs = omap44xx_gpio6_irqs, 2170 .mpu_irqs = omap44xx_gpio6_irqs,
2055 .main_clk = "gpio6_ick", 2171 .main_clk = "gpio6_ick",
2056 .prcm = { 2172 .prcm = {
2057 .omap4 = { 2173 .omap4 = {
2058 .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL, 2174 .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET,
2175 .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET,
2176 .modulemode = MODULEMODE_HWCTRL,
2059 }, 2177 },
2060 }, 2178 },
2061 .opt_clks = gpio6_opt_clks, 2179 .opt_clks = gpio6_opt_clks,
@@ -2129,11 +2247,14 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = {
2129static struct omap_hwmod omap44xx_hsi_hwmod = { 2247static struct omap_hwmod omap44xx_hsi_hwmod = {
2130 .name = "hsi", 2248 .name = "hsi",
2131 .class = &omap44xx_hsi_hwmod_class, 2249 .class = &omap44xx_hsi_hwmod_class,
2250 .clkdm_name = "l3_init_clkdm",
2132 .mpu_irqs = omap44xx_hsi_irqs, 2251 .mpu_irqs = omap44xx_hsi_irqs,
2133 .main_clk = "hsi_fck", 2252 .main_clk = "hsi_fck",
2134 .prcm = { 2253 .prcm = {
2135 .omap4 = { 2254 .omap4 = {
2136 .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, 2255 .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET,
2256 .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET,
2257 .modulemode = MODULEMODE_HWCTRL,
2137 }, 2258 },
2138 }, 2259 },
2139 .slaves = omap44xx_hsi_slaves, 2260 .slaves = omap44xx_hsi_slaves,
@@ -2209,13 +2330,16 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
2209static struct omap_hwmod omap44xx_i2c1_hwmod = { 2330static struct omap_hwmod omap44xx_i2c1_hwmod = {
2210 .name = "i2c1", 2331 .name = "i2c1",
2211 .class = &omap44xx_i2c_hwmod_class, 2332 .class = &omap44xx_i2c_hwmod_class,
2333 .clkdm_name = "l4_per_clkdm",
2212 .flags = HWMOD_16BIT_REG, 2334 .flags = HWMOD_16BIT_REG,
2213 .mpu_irqs = omap44xx_i2c1_irqs, 2335 .mpu_irqs = omap44xx_i2c1_irqs,
2214 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2336 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2215 .main_clk = "i2c1_fck", 2337 .main_clk = "i2c1_fck",
2216 .prcm = { 2338 .prcm = {
2217 .omap4 = { 2339 .omap4 = {
2218 .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, 2340 .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET,
2341 .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET,
2342 .modulemode = MODULEMODE_SWCTRL,
2219 }, 2343 },
2220 }, 2344 },
2221 .slaves = omap44xx_i2c1_slaves, 2345 .slaves = omap44xx_i2c1_slaves,
@@ -2263,13 +2387,16 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
2263static struct omap_hwmod omap44xx_i2c2_hwmod = { 2387static struct omap_hwmod omap44xx_i2c2_hwmod = {
2264 .name = "i2c2", 2388 .name = "i2c2",
2265 .class = &omap44xx_i2c_hwmod_class, 2389 .class = &omap44xx_i2c_hwmod_class,
2390 .clkdm_name = "l4_per_clkdm",
2266 .flags = HWMOD_16BIT_REG, 2391 .flags = HWMOD_16BIT_REG,
2267 .mpu_irqs = omap44xx_i2c2_irqs, 2392 .mpu_irqs = omap44xx_i2c2_irqs,
2268 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2393 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2269 .main_clk = "i2c2_fck", 2394 .main_clk = "i2c2_fck",
2270 .prcm = { 2395 .prcm = {
2271 .omap4 = { 2396 .omap4 = {
2272 .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, 2397 .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET,
2398 .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET,
2399 .modulemode = MODULEMODE_SWCTRL,
2273 }, 2400 },
2274 }, 2401 },
2275 .slaves = omap44xx_i2c2_slaves, 2402 .slaves = omap44xx_i2c2_slaves,
@@ -2317,13 +2444,16 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
2317static struct omap_hwmod omap44xx_i2c3_hwmod = { 2444static struct omap_hwmod omap44xx_i2c3_hwmod = {
2318 .name = "i2c3", 2445 .name = "i2c3",
2319 .class = &omap44xx_i2c_hwmod_class, 2446 .class = &omap44xx_i2c_hwmod_class,
2447 .clkdm_name = "l4_per_clkdm",
2320 .flags = HWMOD_16BIT_REG, 2448 .flags = HWMOD_16BIT_REG,
2321 .mpu_irqs = omap44xx_i2c3_irqs, 2449 .mpu_irqs = omap44xx_i2c3_irqs,
2322 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2450 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2323 .main_clk = "i2c3_fck", 2451 .main_clk = "i2c3_fck",
2324 .prcm = { 2452 .prcm = {
2325 .omap4 = { 2453 .omap4 = {
2326 .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, 2454 .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET,
2455 .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET,
2456 .modulemode = MODULEMODE_SWCTRL,
2327 }, 2457 },
2328 }, 2458 },
2329 .slaves = omap44xx_i2c3_slaves, 2459 .slaves = omap44xx_i2c3_slaves,
@@ -2371,13 +2501,16 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
2371static struct omap_hwmod omap44xx_i2c4_hwmod = { 2501static struct omap_hwmod omap44xx_i2c4_hwmod = {
2372 .name = "i2c4", 2502 .name = "i2c4",
2373 .class = &omap44xx_i2c_hwmod_class, 2503 .class = &omap44xx_i2c_hwmod_class,
2504 .clkdm_name = "l4_per_clkdm",
2374 .flags = HWMOD_16BIT_REG, 2505 .flags = HWMOD_16BIT_REG,
2375 .mpu_irqs = omap44xx_i2c4_irqs, 2506 .mpu_irqs = omap44xx_i2c4_irqs,
2376 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2507 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2377 .main_clk = "i2c4_fck", 2508 .main_clk = "i2c4_fck",
2378 .prcm = { 2509 .prcm = {
2379 .omap4 = { 2510 .omap4 = {
2380 .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, 2511 .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET,
2512 .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET,
2513 .modulemode = MODULEMODE_SWCTRL,
2381 }, 2514 },
2382 }, 2515 },
2383 .slaves = omap44xx_i2c4_slaves, 2516 .slaves = omap44xx_i2c4_slaves,
@@ -2435,12 +2568,13 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = {
2435static struct omap_hwmod omap44xx_ipu_c0_hwmod = { 2568static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
2436 .name = "ipu_c0", 2569 .name = "ipu_c0",
2437 .class = &omap44xx_ipu_hwmod_class, 2570 .class = &omap44xx_ipu_hwmod_class,
2571 .clkdm_name = "ducati_clkdm",
2438 .flags = HWMOD_INIT_NO_RESET, 2572 .flags = HWMOD_INIT_NO_RESET,
2439 .rst_lines = omap44xx_ipu_c0_resets, 2573 .rst_lines = omap44xx_ipu_c0_resets,
2440 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), 2574 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets),
2441 .prcm = { 2575 .prcm = {
2442 .omap4 = { 2576 .omap4 = {
2443 .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, 2577 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
2444 }, 2578 },
2445 }, 2579 },
2446 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2580 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -2450,12 +2584,13 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
2450static struct omap_hwmod omap44xx_ipu_c1_hwmod = { 2584static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
2451 .name = "ipu_c1", 2585 .name = "ipu_c1",
2452 .class = &omap44xx_ipu_hwmod_class, 2586 .class = &omap44xx_ipu_hwmod_class,
2587 .clkdm_name = "ducati_clkdm",
2453 .flags = HWMOD_INIT_NO_RESET, 2588 .flags = HWMOD_INIT_NO_RESET,
2454 .rst_lines = omap44xx_ipu_c1_resets, 2589 .rst_lines = omap44xx_ipu_c1_resets,
2455 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), 2590 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets),
2456 .prcm = { 2591 .prcm = {
2457 .omap4 = { 2592 .omap4 = {
2458 .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, 2593 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
2459 }, 2594 },
2460 }, 2595 },
2461 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2596 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -2464,14 +2599,17 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
2464static struct omap_hwmod omap44xx_ipu_hwmod = { 2599static struct omap_hwmod omap44xx_ipu_hwmod = {
2465 .name = "ipu", 2600 .name = "ipu",
2466 .class = &omap44xx_ipu_hwmod_class, 2601 .class = &omap44xx_ipu_hwmod_class,
2602 .clkdm_name = "ducati_clkdm",
2467 .mpu_irqs = omap44xx_ipu_irqs, 2603 .mpu_irqs = omap44xx_ipu_irqs,
2468 .rst_lines = omap44xx_ipu_resets, 2604 .rst_lines = omap44xx_ipu_resets,
2469 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), 2605 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
2470 .main_clk = "ipu_fck", 2606 .main_clk = "ipu_fck",
2471 .prcm = { 2607 .prcm = {
2472 .omap4 = { 2608 .omap4 = {
2473 .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, 2609 .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
2474 .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, 2610 .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
2611 .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET,
2612 .modulemode = MODULEMODE_HWCTRL,
2475 }, 2613 },
2476 }, 2614 },
2477 .slaves = omap44xx_ipu_slaves, 2615 .slaves = omap44xx_ipu_slaves,
@@ -2551,12 +2689,15 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = {
2551static struct omap_hwmod omap44xx_iss_hwmod = { 2689static struct omap_hwmod omap44xx_iss_hwmod = {
2552 .name = "iss", 2690 .name = "iss",
2553 .class = &omap44xx_iss_hwmod_class, 2691 .class = &omap44xx_iss_hwmod_class,
2692 .clkdm_name = "iss_clkdm",
2554 .mpu_irqs = omap44xx_iss_irqs, 2693 .mpu_irqs = omap44xx_iss_irqs,
2555 .sdma_reqs = omap44xx_iss_sdma_reqs, 2694 .sdma_reqs = omap44xx_iss_sdma_reqs,
2556 .main_clk = "iss_fck", 2695 .main_clk = "iss_fck",
2557 .prcm = { 2696 .prcm = {
2558 .omap4 = { 2697 .omap4 = {
2559 .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, 2698 .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET,
2699 .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET,
2700 .modulemode = MODULEMODE_SWCTRL,
2560 }, 2701 },
2561 }, 2702 },
2562 .opt_clks = iss_opt_clks, 2703 .opt_clks = iss_opt_clks,
@@ -2631,12 +2772,13 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = {
2631static struct omap_hwmod omap44xx_iva_seq0_hwmod = { 2772static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
2632 .name = "iva_seq0", 2773 .name = "iva_seq0",
2633 .class = &omap44xx_iva_hwmod_class, 2774 .class = &omap44xx_iva_hwmod_class,
2775 .clkdm_name = "ivahd_clkdm",
2634 .flags = HWMOD_INIT_NO_RESET, 2776 .flags = HWMOD_INIT_NO_RESET,
2635 .rst_lines = omap44xx_iva_seq0_resets, 2777 .rst_lines = omap44xx_iva_seq0_resets,
2636 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), 2778 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets),
2637 .prcm = { 2779 .prcm = {
2638 .omap4 = { 2780 .omap4 = {
2639 .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, 2781 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
2640 }, 2782 },
2641 }, 2783 },
2642 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2784 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -2646,12 +2788,13 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
2646static struct omap_hwmod omap44xx_iva_seq1_hwmod = { 2788static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
2647 .name = "iva_seq1", 2789 .name = "iva_seq1",
2648 .class = &omap44xx_iva_hwmod_class, 2790 .class = &omap44xx_iva_hwmod_class,
2791 .clkdm_name = "ivahd_clkdm",
2649 .flags = HWMOD_INIT_NO_RESET, 2792 .flags = HWMOD_INIT_NO_RESET,
2650 .rst_lines = omap44xx_iva_seq1_resets, 2793 .rst_lines = omap44xx_iva_seq1_resets,
2651 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), 2794 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets),
2652 .prcm = { 2795 .prcm = {
2653 .omap4 = { 2796 .omap4 = {
2654 .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, 2797 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
2655 }, 2798 },
2656 }, 2799 },
2657 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -2660,14 +2803,17 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
2660static struct omap_hwmod omap44xx_iva_hwmod = { 2803static struct omap_hwmod omap44xx_iva_hwmod = {
2661 .name = "iva", 2804 .name = "iva",
2662 .class = &omap44xx_iva_hwmod_class, 2805 .class = &omap44xx_iva_hwmod_class,
2806 .clkdm_name = "ivahd_clkdm",
2663 .mpu_irqs = omap44xx_iva_irqs, 2807 .mpu_irqs = omap44xx_iva_irqs,
2664 .rst_lines = omap44xx_iva_resets, 2808 .rst_lines = omap44xx_iva_resets,
2665 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), 2809 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
2666 .main_clk = "iva_fck", 2810 .main_clk = "iva_fck",
2667 .prcm = { 2811 .prcm = {
2668 .omap4 = { 2812 .omap4 = {
2669 .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, 2813 .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET,
2670 .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, 2814 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
2815 .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET,
2816 .modulemode = MODULEMODE_HWCTRL,
2671 }, 2817 },
2672 }, 2818 },
2673 .slaves = omap44xx_iva_slaves, 2819 .slaves = omap44xx_iva_slaves,
@@ -2732,11 +2878,14 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = {
2732static struct omap_hwmod omap44xx_kbd_hwmod = { 2878static struct omap_hwmod omap44xx_kbd_hwmod = {
2733 .name = "kbd", 2879 .name = "kbd",
2734 .class = &omap44xx_kbd_hwmod_class, 2880 .class = &omap44xx_kbd_hwmod_class,
2881 .clkdm_name = "l4_wkup_clkdm",
2735 .mpu_irqs = omap44xx_kbd_irqs, 2882 .mpu_irqs = omap44xx_kbd_irqs,
2736 .main_clk = "kbd_fck", 2883 .main_clk = "kbd_fck",
2737 .prcm = { 2884 .prcm = {
2738 .omap4 = { 2885 .omap4 = {
2739 .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, 2886 .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET,
2887 .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET,
2888 .modulemode = MODULEMODE_SWCTRL,
2740 }, 2889 },
2741 }, 2890 },
2742 .slaves = omap44xx_kbd_slaves, 2891 .slaves = omap44xx_kbd_slaves,
@@ -2797,10 +2946,12 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {
2797static struct omap_hwmod omap44xx_mailbox_hwmod = { 2946static struct omap_hwmod omap44xx_mailbox_hwmod = {
2798 .name = "mailbox", 2947 .name = "mailbox",
2799 .class = &omap44xx_mailbox_hwmod_class, 2948 .class = &omap44xx_mailbox_hwmod_class,
2949 .clkdm_name = "l4_cfg_clkdm",
2800 .mpu_irqs = omap44xx_mailbox_irqs, 2950 .mpu_irqs = omap44xx_mailbox_irqs,
2801 .prcm = { 2951 .prcm = {
2802 .omap4 = { 2952 .omap4 = {
2803 .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, 2953 .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET,
2954 .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET,
2804 }, 2955 },
2805 }, 2956 },
2806 .slaves = omap44xx_mailbox_slaves, 2957 .slaves = omap44xx_mailbox_slaves,
@@ -2887,12 +3038,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
2887static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 3038static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2888 .name = "mcbsp1", 3039 .name = "mcbsp1",
2889 .class = &omap44xx_mcbsp_hwmod_class, 3040 .class = &omap44xx_mcbsp_hwmod_class,
3041 .clkdm_name = "abe_clkdm",
2890 .mpu_irqs = omap44xx_mcbsp1_irqs, 3042 .mpu_irqs = omap44xx_mcbsp1_irqs,
2891 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, 3043 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
2892 .main_clk = "mcbsp1_fck", 3044 .main_clk = "mcbsp1_fck",
2893 .prcm = { 3045 .prcm = {
2894 .omap4 = { 3046 .omap4 = {
2895 .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, 3047 .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET,
3048 .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET,
3049 .modulemode = MODULEMODE_SWCTRL,
2896 }, 3050 },
2897 }, 3051 },
2898 .slaves = omap44xx_mcbsp1_slaves, 3052 .slaves = omap44xx_mcbsp1_slaves,
@@ -2960,12 +3114,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
2960static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 3114static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2961 .name = "mcbsp2", 3115 .name = "mcbsp2",
2962 .class = &omap44xx_mcbsp_hwmod_class, 3116 .class = &omap44xx_mcbsp_hwmod_class,
3117 .clkdm_name = "abe_clkdm",
2963 .mpu_irqs = omap44xx_mcbsp2_irqs, 3118 .mpu_irqs = omap44xx_mcbsp2_irqs,
2964 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, 3119 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
2965 .main_clk = "mcbsp2_fck", 3120 .main_clk = "mcbsp2_fck",
2966 .prcm = { 3121 .prcm = {
2967 .omap4 = { 3122 .omap4 = {
2968 .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, 3123 .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET,
3124 .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET,
3125 .modulemode = MODULEMODE_SWCTRL,
2969 }, 3126 },
2970 }, 3127 },
2971 .slaves = omap44xx_mcbsp2_slaves, 3128 .slaves = omap44xx_mcbsp2_slaves,
@@ -3033,12 +3190,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
3033static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 3190static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3034 .name = "mcbsp3", 3191 .name = "mcbsp3",
3035 .class = &omap44xx_mcbsp_hwmod_class, 3192 .class = &omap44xx_mcbsp_hwmod_class,
3193 .clkdm_name = "abe_clkdm",
3036 .mpu_irqs = omap44xx_mcbsp3_irqs, 3194 .mpu_irqs = omap44xx_mcbsp3_irqs,
3037 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, 3195 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
3038 .main_clk = "mcbsp3_fck", 3196 .main_clk = "mcbsp3_fck",
3039 .prcm = { 3197 .prcm = {
3040 .omap4 = { 3198 .omap4 = {
3041 .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, 3199 .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET,
3200 .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET,
3201 .modulemode = MODULEMODE_SWCTRL,
3042 }, 3202 },
3043 }, 3203 },
3044 .slaves = omap44xx_mcbsp3_slaves, 3204 .slaves = omap44xx_mcbsp3_slaves,
@@ -3085,12 +3245,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
3085static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 3245static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3086 .name = "mcbsp4", 3246 .name = "mcbsp4",
3087 .class = &omap44xx_mcbsp_hwmod_class, 3247 .class = &omap44xx_mcbsp_hwmod_class,
3248 .clkdm_name = "l4_per_clkdm",
3088 .mpu_irqs = omap44xx_mcbsp4_irqs, 3249 .mpu_irqs = omap44xx_mcbsp4_irqs,
3089 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, 3250 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
3090 .main_clk = "mcbsp4_fck", 3251 .main_clk = "mcbsp4_fck",
3091 .prcm = { 3252 .prcm = {
3092 .omap4 = { 3253 .omap4 = {
3093 .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, 3254 .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET,
3255 .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET,
3256 .modulemode = MODULEMODE_SWCTRL,
3094 }, 3257 },
3095 }, 3258 },
3096 .slaves = omap44xx_mcbsp4_slaves, 3259 .slaves = omap44xx_mcbsp4_slaves,
@@ -3177,12 +3340,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = {
3177static struct omap_hwmod omap44xx_mcpdm_hwmod = { 3340static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3178 .name = "mcpdm", 3341 .name = "mcpdm",
3179 .class = &omap44xx_mcpdm_hwmod_class, 3342 .class = &omap44xx_mcpdm_hwmod_class,
3343 .clkdm_name = "abe_clkdm",
3180 .mpu_irqs = omap44xx_mcpdm_irqs, 3344 .mpu_irqs = omap44xx_mcpdm_irqs,
3181 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 3345 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
3182 .main_clk = "mcpdm_fck", 3346 .main_clk = "mcpdm_fck",
3183 .prcm = { 3347 .prcm = {
3184 .omap4 = { 3348 .omap4 = {
3185 .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, 3349 .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET,
3350 .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET,
3351 .modulemode = MODULEMODE_SWCTRL,
3186 }, 3352 },
3187 }, 3353 },
3188 .slaves = omap44xx_mcpdm_slaves, 3354 .slaves = omap44xx_mcpdm_slaves,
@@ -3262,12 +3428,15 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
3262static struct omap_hwmod omap44xx_mcspi1_hwmod = { 3428static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3263 .name = "mcspi1", 3429 .name = "mcspi1",
3264 .class = &omap44xx_mcspi_hwmod_class, 3430 .class = &omap44xx_mcspi_hwmod_class,
3431 .clkdm_name = "l4_per_clkdm",
3265 .mpu_irqs = omap44xx_mcspi1_irqs, 3432 .mpu_irqs = omap44xx_mcspi1_irqs,
3266 .sdma_reqs = omap44xx_mcspi1_sdma_reqs, 3433 .sdma_reqs = omap44xx_mcspi1_sdma_reqs,
3267 .main_clk = "mcspi1_fck", 3434 .main_clk = "mcspi1_fck",
3268 .prcm = { 3435 .prcm = {
3269 .omap4 = { 3436 .omap4 = {
3270 .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, 3437 .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET,
3438 .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET,
3439 .modulemode = MODULEMODE_SWCTRL,
3271 }, 3440 },
3272 }, 3441 },
3273 .dev_attr = &mcspi1_dev_attr, 3442 .dev_attr = &mcspi1_dev_attr,
@@ -3322,12 +3491,15 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
3322static struct omap_hwmod omap44xx_mcspi2_hwmod = { 3491static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3323 .name = "mcspi2", 3492 .name = "mcspi2",
3324 .class = &omap44xx_mcspi_hwmod_class, 3493 .class = &omap44xx_mcspi_hwmod_class,
3494 .clkdm_name = "l4_per_clkdm",
3325 .mpu_irqs = omap44xx_mcspi2_irqs, 3495 .mpu_irqs = omap44xx_mcspi2_irqs,
3326 .sdma_reqs = omap44xx_mcspi2_sdma_reqs, 3496 .sdma_reqs = omap44xx_mcspi2_sdma_reqs,
3327 .main_clk = "mcspi2_fck", 3497 .main_clk = "mcspi2_fck",
3328 .prcm = { 3498 .prcm = {
3329 .omap4 = { 3499 .omap4 = {
3330 .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, 3500 .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET,
3501 .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET,
3502 .modulemode = MODULEMODE_SWCTRL,
3331 }, 3503 },
3332 }, 3504 },
3333 .dev_attr = &mcspi2_dev_attr, 3505 .dev_attr = &mcspi2_dev_attr,
@@ -3382,12 +3554,15 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
3382static struct omap_hwmod omap44xx_mcspi3_hwmod = { 3554static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3383 .name = "mcspi3", 3555 .name = "mcspi3",
3384 .class = &omap44xx_mcspi_hwmod_class, 3556 .class = &omap44xx_mcspi_hwmod_class,
3557 .clkdm_name = "l4_per_clkdm",
3385 .mpu_irqs = omap44xx_mcspi3_irqs, 3558 .mpu_irqs = omap44xx_mcspi3_irqs,
3386 .sdma_reqs = omap44xx_mcspi3_sdma_reqs, 3559 .sdma_reqs = omap44xx_mcspi3_sdma_reqs,
3387 .main_clk = "mcspi3_fck", 3560 .main_clk = "mcspi3_fck",
3388 .prcm = { 3561 .prcm = {
3389 .omap4 = { 3562 .omap4 = {
3390 .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, 3563 .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET,
3564 .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET,
3565 .modulemode = MODULEMODE_SWCTRL,
3391 }, 3566 },
3392 }, 3567 },
3393 .dev_attr = &mcspi3_dev_attr, 3568 .dev_attr = &mcspi3_dev_attr,
@@ -3440,12 +3615,15 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
3440static struct omap_hwmod omap44xx_mcspi4_hwmod = { 3615static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3441 .name = "mcspi4", 3616 .name = "mcspi4",
3442 .class = &omap44xx_mcspi_hwmod_class, 3617 .class = &omap44xx_mcspi_hwmod_class,
3618 .clkdm_name = "l4_per_clkdm",
3443 .mpu_irqs = omap44xx_mcspi4_irqs, 3619 .mpu_irqs = omap44xx_mcspi4_irqs,
3444 .sdma_reqs = omap44xx_mcspi4_sdma_reqs, 3620 .sdma_reqs = omap44xx_mcspi4_sdma_reqs,
3445 .main_clk = "mcspi4_fck", 3621 .main_clk = "mcspi4_fck",
3446 .prcm = { 3622 .prcm = {
3447 .omap4 = { 3623 .omap4 = {
3448 .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, 3624 .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET,
3625 .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET,
3626 .modulemode = MODULEMODE_SWCTRL,
3449 }, 3627 },
3450 }, 3628 },
3451 .dev_attr = &mcspi4_dev_attr, 3629 .dev_attr = &mcspi4_dev_attr,
@@ -3524,12 +3702,15 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
3524static struct omap_hwmod omap44xx_mmc1_hwmod = { 3702static struct omap_hwmod omap44xx_mmc1_hwmod = {
3525 .name = "mmc1", 3703 .name = "mmc1",
3526 .class = &omap44xx_mmc_hwmod_class, 3704 .class = &omap44xx_mmc_hwmod_class,
3705 .clkdm_name = "l3_init_clkdm",
3527 .mpu_irqs = omap44xx_mmc1_irqs, 3706 .mpu_irqs = omap44xx_mmc1_irqs,
3528 .sdma_reqs = omap44xx_mmc1_sdma_reqs, 3707 .sdma_reqs = omap44xx_mmc1_sdma_reqs,
3529 .main_clk = "mmc1_fck", 3708 .main_clk = "mmc1_fck",
3530 .prcm = { 3709 .prcm = {
3531 .omap4 = { 3710 .omap4 = {
3532 .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, 3711 .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET,
3712 .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET,
3713 .modulemode = MODULEMODE_SWCTRL,
3533 }, 3714 },
3534 }, 3715 },
3535 .dev_attr = &mmc1_dev_attr, 3716 .dev_attr = &mmc1_dev_attr,
@@ -3583,12 +3764,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {
3583static struct omap_hwmod omap44xx_mmc2_hwmod = { 3764static struct omap_hwmod omap44xx_mmc2_hwmod = {
3584 .name = "mmc2", 3765 .name = "mmc2",
3585 .class = &omap44xx_mmc_hwmod_class, 3766 .class = &omap44xx_mmc_hwmod_class,
3767 .clkdm_name = "l3_init_clkdm",
3586 .mpu_irqs = omap44xx_mmc2_irqs, 3768 .mpu_irqs = omap44xx_mmc2_irqs,
3587 .sdma_reqs = omap44xx_mmc2_sdma_reqs, 3769 .sdma_reqs = omap44xx_mmc2_sdma_reqs,
3588 .main_clk = "mmc2_fck", 3770 .main_clk = "mmc2_fck",
3589 .prcm = { 3771 .prcm = {
3590 .omap4 = { 3772 .omap4 = {
3591 .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, 3773 .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET,
3774 .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET,
3775 .modulemode = MODULEMODE_SWCTRL,
3592 }, 3776 },
3593 }, 3777 },
3594 .slaves = omap44xx_mmc2_slaves, 3778 .slaves = omap44xx_mmc2_slaves,
@@ -3637,12 +3821,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {
3637static struct omap_hwmod omap44xx_mmc3_hwmod = { 3821static struct omap_hwmod omap44xx_mmc3_hwmod = {
3638 .name = "mmc3", 3822 .name = "mmc3",
3639 .class = &omap44xx_mmc_hwmod_class, 3823 .class = &omap44xx_mmc_hwmod_class,
3824 .clkdm_name = "l4_per_clkdm",
3640 .mpu_irqs = omap44xx_mmc3_irqs, 3825 .mpu_irqs = omap44xx_mmc3_irqs,
3641 .sdma_reqs = omap44xx_mmc3_sdma_reqs, 3826 .sdma_reqs = omap44xx_mmc3_sdma_reqs,
3642 .main_clk = "mmc3_fck", 3827 .main_clk = "mmc3_fck",
3643 .prcm = { 3828 .prcm = {
3644 .omap4 = { 3829 .omap4 = {
3645 .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, 3830 .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET,
3831 .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET,
3832 .modulemode = MODULEMODE_SWCTRL,
3646 }, 3833 },
3647 }, 3834 },
3648 .slaves = omap44xx_mmc3_slaves, 3835 .slaves = omap44xx_mmc3_slaves,
@@ -3689,13 +3876,16 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {
3689static struct omap_hwmod omap44xx_mmc4_hwmod = { 3876static struct omap_hwmod omap44xx_mmc4_hwmod = {
3690 .name = "mmc4", 3877 .name = "mmc4",
3691 .class = &omap44xx_mmc_hwmod_class, 3878 .class = &omap44xx_mmc_hwmod_class,
3879 .clkdm_name = "l4_per_clkdm",
3692 .mpu_irqs = omap44xx_mmc4_irqs, 3880 .mpu_irqs = omap44xx_mmc4_irqs,
3693 3881
3694 .sdma_reqs = omap44xx_mmc4_sdma_reqs, 3882 .sdma_reqs = omap44xx_mmc4_sdma_reqs,
3695 .main_clk = "mmc4_fck", 3883 .main_clk = "mmc4_fck",
3696 .prcm = { 3884 .prcm = {
3697 .omap4 = { 3885 .omap4 = {
3698 .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, 3886 .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET,
3887 .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET,
3888 .modulemode = MODULEMODE_SWCTRL,
3699 }, 3889 },
3700 }, 3890 },
3701 .slaves = omap44xx_mmc4_slaves, 3891 .slaves = omap44xx_mmc4_slaves,
@@ -3742,12 +3932,15 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {
3742static struct omap_hwmod omap44xx_mmc5_hwmod = { 3932static struct omap_hwmod omap44xx_mmc5_hwmod = {
3743 .name = "mmc5", 3933 .name = "mmc5",
3744 .class = &omap44xx_mmc_hwmod_class, 3934 .class = &omap44xx_mmc_hwmod_class,
3935 .clkdm_name = "l4_per_clkdm",
3745 .mpu_irqs = omap44xx_mmc5_irqs, 3936 .mpu_irqs = omap44xx_mmc5_irqs,
3746 .sdma_reqs = omap44xx_mmc5_sdma_reqs, 3937 .sdma_reqs = omap44xx_mmc5_sdma_reqs,
3747 .main_clk = "mmc5_fck", 3938 .main_clk = "mmc5_fck",
3748 .prcm = { 3939 .prcm = {
3749 .omap4 = { 3940 .omap4 = {
3750 .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, 3941 .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET,
3942 .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET,
3943 .modulemode = MODULEMODE_SWCTRL,
3751 }, 3944 },
3752 }, 3945 },
3753 .slaves = omap44xx_mmc5_slaves, 3946 .slaves = omap44xx_mmc5_slaves,
@@ -3782,12 +3975,14 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
3782static struct omap_hwmod omap44xx_mpu_hwmod = { 3975static struct omap_hwmod omap44xx_mpu_hwmod = {
3783 .name = "mpu", 3976 .name = "mpu",
3784 .class = &omap44xx_mpu_hwmod_class, 3977 .class = &omap44xx_mpu_hwmod_class,
3978 .clkdm_name = "mpuss_clkdm",
3785 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, 3979 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
3786 .mpu_irqs = omap44xx_mpu_irqs, 3980 .mpu_irqs = omap44xx_mpu_irqs,
3787 .main_clk = "dpll_mpu_m2_ck", 3981 .main_clk = "dpll_mpu_m2_ck",
3788 .prcm = { 3982 .prcm = {
3789 .omap4 = { 3983 .omap4 = {
3790 .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, 3984 .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET,
3985 .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,
3791 }, 3986 },
3792 }, 3987 },
3793 .masters = omap44xx_mpu_masters, 3988 .masters = omap44xx_mpu_masters,
@@ -3854,13 +4049,16 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
3854static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { 4049static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3855 .name = "smartreflex_core", 4050 .name = "smartreflex_core",
3856 .class = &omap44xx_smartreflex_hwmod_class, 4051 .class = &omap44xx_smartreflex_hwmod_class,
4052 .clkdm_name = "l4_ao_clkdm",
3857 .mpu_irqs = omap44xx_smartreflex_core_irqs, 4053 .mpu_irqs = omap44xx_smartreflex_core_irqs,
3858 4054
3859 .main_clk = "smartreflex_core_fck", 4055 .main_clk = "smartreflex_core_fck",
3860 .vdd_name = "core", 4056 .vdd_name = "core",
3861 .prcm = { 4057 .prcm = {
3862 .omap4 = { 4058 .omap4 = {
3863 .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, 4059 .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET,
4060 .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET,
4061 .modulemode = MODULEMODE_SWCTRL,
3864 }, 4062 },
3865 }, 4063 },
3866 .slaves = omap44xx_smartreflex_core_slaves, 4064 .slaves = omap44xx_smartreflex_core_slaves,
@@ -3901,12 +4099,15 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
3901static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { 4099static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3902 .name = "smartreflex_iva", 4100 .name = "smartreflex_iva",
3903 .class = &omap44xx_smartreflex_hwmod_class, 4101 .class = &omap44xx_smartreflex_hwmod_class,
4102 .clkdm_name = "l4_ao_clkdm",
3904 .mpu_irqs = omap44xx_smartreflex_iva_irqs, 4103 .mpu_irqs = omap44xx_smartreflex_iva_irqs,
3905 .main_clk = "smartreflex_iva_fck", 4104 .main_clk = "smartreflex_iva_fck",
3906 .vdd_name = "iva", 4105 .vdd_name = "iva",
3907 .prcm = { 4106 .prcm = {
3908 .omap4 = { 4107 .omap4 = {
3909 .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, 4108 .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET,
4109 .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET,
4110 .modulemode = MODULEMODE_SWCTRL,
3910 }, 4111 },
3911 }, 4112 },
3912 .slaves = omap44xx_smartreflex_iva_slaves, 4113 .slaves = omap44xx_smartreflex_iva_slaves,
@@ -3947,12 +4148,15 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
3947static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { 4148static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
3948 .name = "smartreflex_mpu", 4149 .name = "smartreflex_mpu",
3949 .class = &omap44xx_smartreflex_hwmod_class, 4150 .class = &omap44xx_smartreflex_hwmod_class,
4151 .clkdm_name = "l4_ao_clkdm",
3950 .mpu_irqs = omap44xx_smartreflex_mpu_irqs, 4152 .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
3951 .main_clk = "smartreflex_mpu_fck", 4153 .main_clk = "smartreflex_mpu_fck",
3952 .vdd_name = "mpu", 4154 .vdd_name = "mpu",
3953 .prcm = { 4155 .prcm = {
3954 .omap4 = { 4156 .omap4 = {
3955 .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, 4157 .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET,
4158 .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET,
4159 .modulemode = MODULEMODE_SWCTRL,
3956 }, 4160 },
3957 }, 4161 },
3958 .slaves = omap44xx_smartreflex_mpu_slaves, 4162 .slaves = omap44xx_smartreflex_mpu_slaves,
@@ -4011,9 +4215,11 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = {
4011static struct omap_hwmod omap44xx_spinlock_hwmod = { 4215static struct omap_hwmod omap44xx_spinlock_hwmod = {
4012 .name = "spinlock", 4216 .name = "spinlock",
4013 .class = &omap44xx_spinlock_hwmod_class, 4217 .class = &omap44xx_spinlock_hwmod_class,
4218 .clkdm_name = "l4_cfg_clkdm",
4014 .prcm = { 4219 .prcm = {
4015 .omap4 = { 4220 .omap4 = {
4016 .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, 4221 .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET,
4222 .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET,
4017 }, 4223 },
4018 }, 4224 },
4019 .slaves = omap44xx_spinlock_slaves, 4225 .slaves = omap44xx_spinlock_slaves,
@@ -4092,11 +4298,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
4092static struct omap_hwmod omap44xx_timer1_hwmod = { 4298static struct omap_hwmod omap44xx_timer1_hwmod = {
4093 .name = "timer1", 4299 .name = "timer1",
4094 .class = &omap44xx_timer_1ms_hwmod_class, 4300 .class = &omap44xx_timer_1ms_hwmod_class,
4301 .clkdm_name = "l4_wkup_clkdm",
4095 .mpu_irqs = omap44xx_timer1_irqs, 4302 .mpu_irqs = omap44xx_timer1_irqs,
4096 .main_clk = "timer1_fck", 4303 .main_clk = "timer1_fck",
4097 .prcm = { 4304 .prcm = {
4098 .omap4 = { 4305 .omap4 = {
4099 .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, 4306 .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
4307 .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET,
4308 .modulemode = MODULEMODE_SWCTRL,
4100 }, 4309 },
4101 }, 4310 },
4102 .slaves = omap44xx_timer1_slaves, 4311 .slaves = omap44xx_timer1_slaves,
@@ -4137,11 +4346,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {
4137static struct omap_hwmod omap44xx_timer2_hwmod = { 4346static struct omap_hwmod omap44xx_timer2_hwmod = {
4138 .name = "timer2", 4347 .name = "timer2",
4139 .class = &omap44xx_timer_1ms_hwmod_class, 4348 .class = &omap44xx_timer_1ms_hwmod_class,
4349 .clkdm_name = "l4_per_clkdm",
4140 .mpu_irqs = omap44xx_timer2_irqs, 4350 .mpu_irqs = omap44xx_timer2_irqs,
4141 .main_clk = "timer2_fck", 4351 .main_clk = "timer2_fck",
4142 .prcm = { 4352 .prcm = {
4143 .omap4 = { 4353 .omap4 = {
4144 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, 4354 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET,
4355 .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET,
4356 .modulemode = MODULEMODE_SWCTRL,
4145 }, 4357 },
4146 }, 4358 },
4147 .slaves = omap44xx_timer2_slaves, 4359 .slaves = omap44xx_timer2_slaves,
@@ -4182,11 +4394,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = {
4182static struct omap_hwmod omap44xx_timer3_hwmod = { 4394static struct omap_hwmod omap44xx_timer3_hwmod = {
4183 .name = "timer3", 4395 .name = "timer3",
4184 .class = &omap44xx_timer_hwmod_class, 4396 .class = &omap44xx_timer_hwmod_class,
4397 .clkdm_name = "l4_per_clkdm",
4185 .mpu_irqs = omap44xx_timer3_irqs, 4398 .mpu_irqs = omap44xx_timer3_irqs,
4186 .main_clk = "timer3_fck", 4399 .main_clk = "timer3_fck",
4187 .prcm = { 4400 .prcm = {
4188 .omap4 = { 4401 .omap4 = {
4189 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, 4402 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET,
4403 .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET,
4404 .modulemode = MODULEMODE_SWCTRL,
4190 }, 4405 },
4191 }, 4406 },
4192 .slaves = omap44xx_timer3_slaves, 4407 .slaves = omap44xx_timer3_slaves,
@@ -4227,11 +4442,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = {
4227static struct omap_hwmod omap44xx_timer4_hwmod = { 4442static struct omap_hwmod omap44xx_timer4_hwmod = {
4228 .name = "timer4", 4443 .name = "timer4",
4229 .class = &omap44xx_timer_hwmod_class, 4444 .class = &omap44xx_timer_hwmod_class,
4445 .clkdm_name = "l4_per_clkdm",
4230 .mpu_irqs = omap44xx_timer4_irqs, 4446 .mpu_irqs = omap44xx_timer4_irqs,
4231 .main_clk = "timer4_fck", 4447 .main_clk = "timer4_fck",
4232 .prcm = { 4448 .prcm = {
4233 .omap4 = { 4449 .omap4 = {
4234 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, 4450 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET,
4451 .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET,
4452 .modulemode = MODULEMODE_SWCTRL,
4235 }, 4453 },
4236 }, 4454 },
4237 .slaves = omap44xx_timer4_slaves, 4455 .slaves = omap44xx_timer4_slaves,
@@ -4291,11 +4509,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = {
4291static struct omap_hwmod omap44xx_timer5_hwmod = { 4509static struct omap_hwmod omap44xx_timer5_hwmod = {
4292 .name = "timer5", 4510 .name = "timer5",
4293 .class = &omap44xx_timer_hwmod_class, 4511 .class = &omap44xx_timer_hwmod_class,
4512 .clkdm_name = "abe_clkdm",
4294 .mpu_irqs = omap44xx_timer5_irqs, 4513 .mpu_irqs = omap44xx_timer5_irqs,
4295 .main_clk = "timer5_fck", 4514 .main_clk = "timer5_fck",
4296 .prcm = { 4515 .prcm = {
4297 .omap4 = { 4516 .omap4 = {
4298 .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL, 4517 .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET,
4518 .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET,
4519 .modulemode = MODULEMODE_SWCTRL,
4299 }, 4520 },
4300 }, 4521 },
4301 .slaves = omap44xx_timer5_slaves, 4522 .slaves = omap44xx_timer5_slaves,
@@ -4355,12 +4576,15 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = {
4355static struct omap_hwmod omap44xx_timer6_hwmod = { 4576static struct omap_hwmod omap44xx_timer6_hwmod = {
4356 .name = "timer6", 4577 .name = "timer6",
4357 .class = &omap44xx_timer_hwmod_class, 4578 .class = &omap44xx_timer_hwmod_class,
4579 .clkdm_name = "abe_clkdm",
4358 .mpu_irqs = omap44xx_timer6_irqs, 4580 .mpu_irqs = omap44xx_timer6_irqs,
4359 4581
4360 .main_clk = "timer6_fck", 4582 .main_clk = "timer6_fck",
4361 .prcm = { 4583 .prcm = {
4362 .omap4 = { 4584 .omap4 = {
4363 .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL, 4585 .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET,
4586 .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET,
4587 .modulemode = MODULEMODE_SWCTRL,
4364 }, 4588 },
4365 }, 4589 },
4366 .slaves = omap44xx_timer6_slaves, 4590 .slaves = omap44xx_timer6_slaves,
@@ -4420,11 +4644,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = {
4420static struct omap_hwmod omap44xx_timer7_hwmod = { 4644static struct omap_hwmod omap44xx_timer7_hwmod = {
4421 .name = "timer7", 4645 .name = "timer7",
4422 .class = &omap44xx_timer_hwmod_class, 4646 .class = &omap44xx_timer_hwmod_class,
4647 .clkdm_name = "abe_clkdm",
4423 .mpu_irqs = omap44xx_timer7_irqs, 4648 .mpu_irqs = omap44xx_timer7_irqs,
4424 .main_clk = "timer7_fck", 4649 .main_clk = "timer7_fck",
4425 .prcm = { 4650 .prcm = {
4426 .omap4 = { 4651 .omap4 = {
4427 .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL, 4652 .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET,
4653 .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET,
4654 .modulemode = MODULEMODE_SWCTRL,
4428 }, 4655 },
4429 }, 4656 },
4430 .slaves = omap44xx_timer7_slaves, 4657 .slaves = omap44xx_timer7_slaves,
@@ -4484,11 +4711,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = {
4484static struct omap_hwmod omap44xx_timer8_hwmod = { 4711static struct omap_hwmod omap44xx_timer8_hwmod = {
4485 .name = "timer8", 4712 .name = "timer8",
4486 .class = &omap44xx_timer_hwmod_class, 4713 .class = &omap44xx_timer_hwmod_class,
4714 .clkdm_name = "abe_clkdm",
4487 .mpu_irqs = omap44xx_timer8_irqs, 4715 .mpu_irqs = omap44xx_timer8_irqs,
4488 .main_clk = "timer8_fck", 4716 .main_clk = "timer8_fck",
4489 .prcm = { 4717 .prcm = {
4490 .omap4 = { 4718 .omap4 = {
4491 .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL, 4719 .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET,
4720 .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET,
4721 .modulemode = MODULEMODE_SWCTRL,
4492 }, 4722 },
4493 }, 4723 },
4494 .slaves = omap44xx_timer8_slaves, 4724 .slaves = omap44xx_timer8_slaves,
@@ -4529,11 +4759,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = {
4529static struct omap_hwmod omap44xx_timer9_hwmod = { 4759static struct omap_hwmod omap44xx_timer9_hwmod = {
4530 .name = "timer9", 4760 .name = "timer9",
4531 .class = &omap44xx_timer_hwmod_class, 4761 .class = &omap44xx_timer_hwmod_class,
4762 .clkdm_name = "l4_per_clkdm",
4532 .mpu_irqs = omap44xx_timer9_irqs, 4763 .mpu_irqs = omap44xx_timer9_irqs,
4533 .main_clk = "timer9_fck", 4764 .main_clk = "timer9_fck",
4534 .prcm = { 4765 .prcm = {
4535 .omap4 = { 4766 .omap4 = {
4536 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, 4767 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET,
4768 .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET,
4769 .modulemode = MODULEMODE_SWCTRL,
4537 }, 4770 },
4538 }, 4771 },
4539 .slaves = omap44xx_timer9_slaves, 4772 .slaves = omap44xx_timer9_slaves,
@@ -4574,11 +4807,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = {
4574static struct omap_hwmod omap44xx_timer10_hwmod = { 4807static struct omap_hwmod omap44xx_timer10_hwmod = {
4575 .name = "timer10", 4808 .name = "timer10",
4576 .class = &omap44xx_timer_1ms_hwmod_class, 4809 .class = &omap44xx_timer_1ms_hwmod_class,
4810 .clkdm_name = "l4_per_clkdm",
4577 .mpu_irqs = omap44xx_timer10_irqs, 4811 .mpu_irqs = omap44xx_timer10_irqs,
4578 .main_clk = "timer10_fck", 4812 .main_clk = "timer10_fck",
4579 .prcm = { 4813 .prcm = {
4580 .omap4 = { 4814 .omap4 = {
4581 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, 4815 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET,
4816 .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET,
4817 .modulemode = MODULEMODE_SWCTRL,
4582 }, 4818 },
4583 }, 4819 },
4584 .slaves = omap44xx_timer10_slaves, 4820 .slaves = omap44xx_timer10_slaves,
@@ -4619,11 +4855,14 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = {
4619static struct omap_hwmod omap44xx_timer11_hwmod = { 4855static struct omap_hwmod omap44xx_timer11_hwmod = {
4620 .name = "timer11", 4856 .name = "timer11",
4621 .class = &omap44xx_timer_hwmod_class, 4857 .class = &omap44xx_timer_hwmod_class,
4858 .clkdm_name = "l4_per_clkdm",
4622 .mpu_irqs = omap44xx_timer11_irqs, 4859 .mpu_irqs = omap44xx_timer11_irqs,
4623 .main_clk = "timer11_fck", 4860 .main_clk = "timer11_fck",
4624 .prcm = { 4861 .prcm = {
4625 .omap4 = { 4862 .omap4 = {
4626 .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, 4863 .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET,
4864 .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET,
4865 .modulemode = MODULEMODE_SWCTRL,
4627 }, 4866 },
4628 }, 4867 },
4629 .slaves = omap44xx_timer11_slaves, 4868 .slaves = omap44xx_timer11_slaves,
@@ -4692,12 +4931,15 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
4692static struct omap_hwmod omap44xx_uart1_hwmod = { 4931static struct omap_hwmod omap44xx_uart1_hwmod = {
4693 .name = "uart1", 4932 .name = "uart1",
4694 .class = &omap44xx_uart_hwmod_class, 4933 .class = &omap44xx_uart_hwmod_class,
4934 .clkdm_name = "l4_per_clkdm",
4695 .mpu_irqs = omap44xx_uart1_irqs, 4935 .mpu_irqs = omap44xx_uart1_irqs,
4696 .sdma_reqs = omap44xx_uart1_sdma_reqs, 4936 .sdma_reqs = omap44xx_uart1_sdma_reqs,
4697 .main_clk = "uart1_fck", 4937 .main_clk = "uart1_fck",
4698 .prcm = { 4938 .prcm = {
4699 .omap4 = { 4939 .omap4 = {
4700 .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, 4940 .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET,
4941 .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET,
4942 .modulemode = MODULEMODE_SWCTRL,
4701 }, 4943 },
4702 }, 4944 },
4703 .slaves = omap44xx_uart1_slaves, 4945 .slaves = omap44xx_uart1_slaves,
@@ -4744,12 +4986,15 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
4744static struct omap_hwmod omap44xx_uart2_hwmod = { 4986static struct omap_hwmod omap44xx_uart2_hwmod = {
4745 .name = "uart2", 4987 .name = "uart2",
4746 .class = &omap44xx_uart_hwmod_class, 4988 .class = &omap44xx_uart_hwmod_class,
4989 .clkdm_name = "l4_per_clkdm",
4747 .mpu_irqs = omap44xx_uart2_irqs, 4990 .mpu_irqs = omap44xx_uart2_irqs,
4748 .sdma_reqs = omap44xx_uart2_sdma_reqs, 4991 .sdma_reqs = omap44xx_uart2_sdma_reqs,
4749 .main_clk = "uart2_fck", 4992 .main_clk = "uart2_fck",
4750 .prcm = { 4993 .prcm = {
4751 .omap4 = { 4994 .omap4 = {
4752 .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, 4995 .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET,
4996 .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET,
4997 .modulemode = MODULEMODE_SWCTRL,
4753 }, 4998 },
4754 }, 4999 },
4755 .slaves = omap44xx_uart2_slaves, 5000 .slaves = omap44xx_uart2_slaves,
@@ -4796,13 +5041,16 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
4796static struct omap_hwmod omap44xx_uart3_hwmod = { 5041static struct omap_hwmod omap44xx_uart3_hwmod = {
4797 .name = "uart3", 5042 .name = "uart3",
4798 .class = &omap44xx_uart_hwmod_class, 5043 .class = &omap44xx_uart_hwmod_class,
5044 .clkdm_name = "l4_per_clkdm",
4799 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, 5045 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
4800 .mpu_irqs = omap44xx_uart3_irqs, 5046 .mpu_irqs = omap44xx_uart3_irqs,
4801 .sdma_reqs = omap44xx_uart3_sdma_reqs, 5047 .sdma_reqs = omap44xx_uart3_sdma_reqs,
4802 .main_clk = "uart3_fck", 5048 .main_clk = "uart3_fck",
4803 .prcm = { 5049 .prcm = {
4804 .omap4 = { 5050 .omap4 = {
4805 .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, 5051 .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET,
5052 .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET,
5053 .modulemode = MODULEMODE_SWCTRL,
4806 }, 5054 },
4807 }, 5055 },
4808 .slaves = omap44xx_uart3_slaves, 5056 .slaves = omap44xx_uart3_slaves,
@@ -4849,12 +5097,15 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
4849static struct omap_hwmod omap44xx_uart4_hwmod = { 5097static struct omap_hwmod omap44xx_uart4_hwmod = {
4850 .name = "uart4", 5098 .name = "uart4",
4851 .class = &omap44xx_uart_hwmod_class, 5099 .class = &omap44xx_uart_hwmod_class,
5100 .clkdm_name = "l4_per_clkdm",
4852 .mpu_irqs = omap44xx_uart4_irqs, 5101 .mpu_irqs = omap44xx_uart4_irqs,
4853 .sdma_reqs = omap44xx_uart4_sdma_reqs, 5102 .sdma_reqs = omap44xx_uart4_sdma_reqs,
4854 .main_clk = "uart4_fck", 5103 .main_clk = "uart4_fck",
4855 .prcm = { 5104 .prcm = {
4856 .omap4 = { 5105 .omap4 = {
4857 .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, 5106 .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET,
5107 .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET,
5108 .modulemode = MODULEMODE_SWCTRL,
4858 }, 5109 },
4859 }, 5110 },
4860 .slaves = omap44xx_uart4_slaves, 5111 .slaves = omap44xx_uart4_slaves,
@@ -4927,12 +5178,15 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {
4927static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { 5178static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
4928 .name = "usb_otg_hs", 5179 .name = "usb_otg_hs",
4929 .class = &omap44xx_usb_otg_hs_hwmod_class, 5180 .class = &omap44xx_usb_otg_hs_hwmod_class,
5181 .clkdm_name = "l3_init_clkdm",
4930 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 5182 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
4931 .mpu_irqs = omap44xx_usb_otg_hs_irqs, 5183 .mpu_irqs = omap44xx_usb_otg_hs_irqs,
4932 .main_clk = "usb_otg_hs_ick", 5184 .main_clk = "usb_otg_hs_ick",
4933 .prcm = { 5185 .prcm = {
4934 .omap4 = { 5186 .omap4 = {
4935 .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, 5187 .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET,
5188 .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET,
5189 .modulemode = MODULEMODE_HWCTRL,
4936 }, 5190 },
4937 }, 5191 },
4938 .opt_clks = usb_otg_hs_opt_clks, 5192 .opt_clks = usb_otg_hs_opt_clks,
@@ -5000,11 +5254,14 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
5000static struct omap_hwmod omap44xx_wd_timer2_hwmod = { 5254static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
5001 .name = "wd_timer2", 5255 .name = "wd_timer2",
5002 .class = &omap44xx_wd_timer_hwmod_class, 5256 .class = &omap44xx_wd_timer_hwmod_class,
5257 .clkdm_name = "l4_wkup_clkdm",
5003 .mpu_irqs = omap44xx_wd_timer2_irqs, 5258 .mpu_irqs = omap44xx_wd_timer2_irqs,
5004 .main_clk = "wd_timer2_fck", 5259 .main_clk = "wd_timer2_fck",
5005 .prcm = { 5260 .prcm = {
5006 .omap4 = { 5261 .omap4 = {
5007 .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, 5262 .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET,
5263 .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET,
5264 .modulemode = MODULEMODE_SWCTRL,
5008 }, 5265 },
5009 }, 5266 },
5010 .slaves = omap44xx_wd_timer2_slaves, 5267 .slaves = omap44xx_wd_timer2_slaves,
@@ -5064,11 +5321,14 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
5064static struct omap_hwmod omap44xx_wd_timer3_hwmod = { 5321static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5065 .name = "wd_timer3", 5322 .name = "wd_timer3",
5066 .class = &omap44xx_wd_timer_hwmod_class, 5323 .class = &omap44xx_wd_timer_hwmod_class,
5324 .clkdm_name = "abe_clkdm",
5067 .mpu_irqs = omap44xx_wd_timer3_irqs, 5325 .mpu_irqs = omap44xx_wd_timer3_irqs,
5068 .main_clk = "wd_timer3_fck", 5326 .main_clk = "wd_timer3_fck",
5069 .prcm = { 5327 .prcm = {
5070 .omap4 = { 5328 .omap4 = {
5071 .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, 5329 .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET,
5330 .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET,
5331 .modulemode = MODULEMODE_SWCTRL,
5072 }, 5332 },
5073 }, 5333 },
5074 .slaves = omap44xx_wd_timer3_slaves, 5334 .slaves = omap44xx_wd_timer3_slaves,
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-08 20:21:37 -0500