diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 54 |
1 files changed, 47 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 5324e8d93bc0..3c8dd928628e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1480,6 +1480,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { | |||
1480 | .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), | 1480 | .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), |
1481 | }; | 1481 | }; |
1482 | 1482 | ||
1483 | /* | ||
1484 | * 'dispc' class | ||
1485 | * display controller | ||
1486 | */ | ||
1487 | |||
1488 | static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = { | ||
1489 | .rev_offs = 0x0000, | ||
1490 | .sysc_offs = 0x0010, | ||
1491 | .syss_offs = 0x0014, | ||
1492 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | | ||
1493 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | | ||
1494 | SYSC_HAS_ENAWAKEUP), | ||
1495 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
1496 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
1497 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
1498 | }; | ||
1499 | |||
1500 | static struct omap_hwmod_class omap3_dispc_hwmod_class = { | ||
1501 | .name = "dispc", | ||
1502 | .sysc = &omap3_dispc_sysc, | ||
1503 | }; | ||
1504 | |||
1483 | /* l4_core -> dss_dispc */ | 1505 | /* l4_core -> dss_dispc */ |
1484 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | 1506 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { |
1485 | .master = &omap3xxx_l4_core_hwmod, | 1507 | .master = &omap3xxx_l4_core_hwmod, |
@@ -1503,7 +1525,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { | |||
1503 | 1525 | ||
1504 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | 1526 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { |
1505 | .name = "dss_dispc", | 1527 | .name = "dss_dispc", |
1506 | .class = &omap2_dispc_hwmod_class, | 1528 | .class = &omap3_dispc_hwmod_class, |
1507 | .mpu_irqs = omap2_dispc_irqs, | 1529 | .mpu_irqs = omap2_dispc_irqs, |
1508 | .main_clk = "dss1_alwon_fck", | 1530 | .main_clk = "dss1_alwon_fck", |
1509 | .prcm = { | 1531 | .prcm = { |
@@ -3523,12 +3545,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | |||
3523 | &omap3xxx_uart2_hwmod, | 3545 | &omap3xxx_uart2_hwmod, |
3524 | &omap3xxx_uart3_hwmod, | 3546 | &omap3xxx_uart3_hwmod, |
3525 | 3547 | ||
3526 | /* dss class */ | ||
3527 | &omap3xxx_dss_dispc_hwmod, | ||
3528 | &omap3xxx_dss_dsi1_hwmod, | ||
3529 | &omap3xxx_dss_rfbi_hwmod, | ||
3530 | &omap3xxx_dss_venc_hwmod, | ||
3531 | |||
3532 | /* i2c class */ | 3548 | /* i2c class */ |
3533 | &omap3xxx_i2c1_hwmod, | 3549 | &omap3xxx_i2c1_hwmod, |
3534 | &omap3xxx_i2c2_hwmod, | 3550 | &omap3xxx_i2c2_hwmod, |
@@ -3635,6 +3651,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = { | |||
3635 | NULL | 3651 | NULL |
3636 | }; | 3652 | }; |
3637 | 3653 | ||
3654 | static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = { | ||
3655 | /* dss class */ | ||
3656 | &omap3xxx_dss_dispc_hwmod, | ||
3657 | &omap3xxx_dss_dsi1_hwmod, | ||
3658 | &omap3xxx_dss_rfbi_hwmod, | ||
3659 | &omap3xxx_dss_venc_hwmod, | ||
3660 | NULL | ||
3661 | }; | ||
3662 | |||
3638 | int __init omap3xxx_hwmod_init(void) | 3663 | int __init omap3xxx_hwmod_init(void) |
3639 | { | 3664 | { |
3640 | int r; | 3665 | int r; |
@@ -3708,6 +3733,21 @@ int __init omap3xxx_hwmod_init(void) | |||
3708 | 3733 | ||
3709 | if (h) | 3734 | if (h) |
3710 | r = omap_hwmod_register(h); | 3735 | r = omap_hwmod_register(h); |
3736 | if (r < 0) | ||
3737 | return r; | ||
3738 | |||
3739 | /* | ||
3740 | * DSS code presumes that dss_core hwmod is handled first, | ||
3741 | * _before_ any other DSS related hwmods so register common | ||
3742 | * DSS hwmods last to ensure that dss_core is already registered. | ||
3743 | * Otherwise some change things may happen, for ex. if dispc | ||
3744 | * is handled before dss_core and DSS is enabled in bootloader | ||
3745 | * DIPSC will be reset with outputs enabled which sometimes leads | ||
3746 | * to unrecoverable L3 error. | ||
3747 | * XXX The long-term fix to this is to ensure modules are set up | ||
3748 | * in dependency order in the hwmod core code. | ||
3749 | */ | ||
3750 | r = omap_hwmod_register(omap3xxx_dss_hwmods); | ||
3711 | 3751 | ||
3712 | return r; | 3752 | return r; |
3713 | } | 3753 | } |