diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index a0116d08cf45..0db8f450bad9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | |||
@@ -58,8 +58,9 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { | |||
58 | .syss_offs = 0x0014, | 58 | .syss_offs = 0x0014, |
59 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | 59 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | |
60 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 60 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
61 | SYSC_HAS_AUTOIDLE), | 61 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
62 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 62 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
63 | .clockact = CLOCKACT_TEST_ICLK, | ||
63 | .sysc_fields = &omap_hwmod_sysc_type1, | 64 | .sysc_fields = &omap_hwmod_sysc_type1, |
64 | }; | 65 | }; |
65 | 66 | ||
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = { | |||
268 | }, | 269 | }, |
269 | .dev_attr = &capability_alwon_dev_attr, | 270 | .dev_attr = &capability_alwon_dev_attr, |
270 | .class = &omap2xxx_timer_hwmod_class, | 271 | .class = &omap2xxx_timer_hwmod_class, |
272 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
271 | }; | 273 | }; |
272 | 274 | ||
273 | /* timer2 */ | 275 | /* timer2 */ |
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = { | |||
286 | }, | 288 | }, |
287 | }, | 289 | }, |
288 | .class = &omap2xxx_timer_hwmod_class, | 290 | .class = &omap2xxx_timer_hwmod_class, |
291 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
289 | }; | 292 | }; |
290 | 293 | ||
291 | /* timer3 */ | 294 | /* timer3 */ |
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = { | |||
304 | }, | 307 | }, |
305 | }, | 308 | }, |
306 | .class = &omap2xxx_timer_hwmod_class, | 309 | .class = &omap2xxx_timer_hwmod_class, |
310 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
307 | }; | 311 | }; |
308 | 312 | ||
309 | /* timer4 */ | 313 | /* timer4 */ |
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = { | |||
322 | }, | 326 | }, |
323 | }, | 327 | }, |
324 | .class = &omap2xxx_timer_hwmod_class, | 328 | .class = &omap2xxx_timer_hwmod_class, |
329 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
325 | }; | 330 | }; |
326 | 331 | ||
327 | /* timer5 */ | 332 | /* timer5 */ |
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = { | |||
341 | }, | 346 | }, |
342 | .dev_attr = &capability_dsp_dev_attr, | 347 | .dev_attr = &capability_dsp_dev_attr, |
343 | .class = &omap2xxx_timer_hwmod_class, | 348 | .class = &omap2xxx_timer_hwmod_class, |
349 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
344 | }; | 350 | }; |
345 | 351 | ||
346 | /* timer6 */ | 352 | /* timer6 */ |
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = { | |||
360 | }, | 366 | }, |
361 | .dev_attr = &capability_dsp_dev_attr, | 367 | .dev_attr = &capability_dsp_dev_attr, |
362 | .class = &omap2xxx_timer_hwmod_class, | 368 | .class = &omap2xxx_timer_hwmod_class, |
369 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
363 | }; | 370 | }; |
364 | 371 | ||
365 | /* timer7 */ | 372 | /* timer7 */ |
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = { | |||
379 | }, | 386 | }, |
380 | .dev_attr = &capability_dsp_dev_attr, | 387 | .dev_attr = &capability_dsp_dev_attr, |
381 | .class = &omap2xxx_timer_hwmod_class, | 388 | .class = &omap2xxx_timer_hwmod_class, |
389 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
382 | }; | 390 | }; |
383 | 391 | ||
384 | /* timer8 */ | 392 | /* timer8 */ |
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = { | |||
398 | }, | 406 | }, |
399 | .dev_attr = &capability_dsp_dev_attr, | 407 | .dev_attr = &capability_dsp_dev_attr, |
400 | .class = &omap2xxx_timer_hwmod_class, | 408 | .class = &omap2xxx_timer_hwmod_class, |
409 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
401 | }; | 410 | }; |
402 | 411 | ||
403 | /* timer9 */ | 412 | /* timer9 */ |
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = { | |||
417 | }, | 426 | }, |
418 | .dev_attr = &capability_pwm_dev_attr, | 427 | .dev_attr = &capability_pwm_dev_attr, |
419 | .class = &omap2xxx_timer_hwmod_class, | 428 | .class = &omap2xxx_timer_hwmod_class, |
429 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
420 | }; | 430 | }; |
421 | 431 | ||
422 | /* timer10 */ | 432 | /* timer10 */ |
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = { | |||
436 | }, | 446 | }, |
437 | .dev_attr = &capability_pwm_dev_attr, | 447 | .dev_attr = &capability_pwm_dev_attr, |
438 | .class = &omap2xxx_timer_hwmod_class, | 448 | .class = &omap2xxx_timer_hwmod_class, |
449 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
439 | }; | 450 | }; |
440 | 451 | ||
441 | /* timer11 */ | 452 | /* timer11 */ |
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = { | |||
455 | }, | 466 | }, |
456 | .dev_attr = &capability_pwm_dev_attr, | 467 | .dev_attr = &capability_pwm_dev_attr, |
457 | .class = &omap2xxx_timer_hwmod_class, | 468 | .class = &omap2xxx_timer_hwmod_class, |
469 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
458 | }; | 470 | }; |
459 | 471 | ||
460 | /* timer12 */ | 472 | /* timer12 */ |
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = { | |||
474 | }, | 486 | }, |
475 | .dev_attr = &capability_pwm_dev_attr, | 487 | .dev_attr = &capability_pwm_dev_attr, |
476 | .class = &omap2xxx_timer_hwmod_class, | 488 | .class = &omap2xxx_timer_hwmod_class, |
489 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
477 | }; | 490 | }; |
478 | 491 | ||
479 | /* wd_timer2 */ | 492 | /* wd_timer2 */ |