diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 73157eef2590..60c817e63c3b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { | |||
831 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | 831 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { |
832 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | 832 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, |
833 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | 833 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, |
834 | { .dma_req = -1 } | ||
834 | }; | 835 | }; |
835 | 836 | ||
836 | static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | 837 | static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { |
@@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | |||
841 | .name = "uart1", | 842 | .name = "uart1", |
842 | .mpu_irqs = omap2_uart1_mpu_irqs, | 843 | .mpu_irqs = omap2_uart1_mpu_irqs, |
843 | .sdma_reqs = uart1_sdma_reqs, | 844 | .sdma_reqs = uart1_sdma_reqs, |
844 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
845 | .main_clk = "uart1_fck", | 845 | .main_clk = "uart1_fck", |
846 | .prcm = { | 846 | .prcm = { |
847 | .omap2 = { | 847 | .omap2 = { |
@@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | |||
863 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | 863 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { |
864 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | 864 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, |
865 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | 865 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, |
866 | { .dma_req = -1 } | ||
866 | }; | 867 | }; |
867 | 868 | ||
868 | static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | 869 | static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { |
@@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | |||
873 | .name = "uart2", | 874 | .name = "uart2", |
874 | .mpu_irqs = omap2_uart2_mpu_irqs, | 875 | .mpu_irqs = omap2_uart2_mpu_irqs, |
875 | .sdma_reqs = uart2_sdma_reqs, | 876 | .sdma_reqs = uart2_sdma_reqs, |
876 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
877 | .main_clk = "uart2_fck", | 877 | .main_clk = "uart2_fck", |
878 | .prcm = { | 878 | .prcm = { |
879 | .omap2 = { | 879 | .omap2 = { |
@@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | |||
895 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | 895 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { |
896 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | 896 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, |
897 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | 897 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, |
898 | { .dma_req = -1 } | ||
898 | }; | 899 | }; |
899 | 900 | ||
900 | static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | 901 | static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { |
@@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { | |||
905 | .name = "uart3", | 906 | .name = "uart3", |
906 | .mpu_irqs = omap2_uart3_mpu_irqs, | 907 | .mpu_irqs = omap2_uart3_mpu_irqs, |
907 | .sdma_reqs = uart3_sdma_reqs, | 908 | .sdma_reqs = uart3_sdma_reqs, |
908 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
909 | .main_clk = "uart3_fck", | 909 | .main_clk = "uart3_fck", |
910 | .prcm = { | 910 | .prcm = { |
911 | .omap2 = { | 911 | .omap2 = { |
@@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { | |||
942 | 942 | ||
943 | static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { | 943 | static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { |
944 | { .name = "dispc", .dma_req = 5 }, | 944 | { .name = "dispc", .dma_req = 5 }, |
945 | { .dma_req = -1 } | ||
945 | }; | 946 | }; |
946 | 947 | ||
947 | /* dss */ | 948 | /* dss */ |
@@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { | |||
980 | .class = &omap2420_dss_hwmod_class, | 981 | .class = &omap2420_dss_hwmod_class, |
981 | .main_clk = "dss1_fck", /* instead of dss_fck */ | 982 | .main_clk = "dss1_fck", /* instead of dss_fck */ |
982 | .sdma_reqs = omap2420_dss_sdma_chs, | 983 | .sdma_reqs = omap2420_dss_sdma_chs, |
983 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), | ||
984 | .prcm = { | 984 | .prcm = { |
985 | .omap2 = { | 985 | .omap2 = { |
986 | .prcm_reg_id = 1, | 986 | .prcm_reg_id = 1, |
@@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | |||
1186 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | 1186 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { |
1187 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | 1187 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, |
1188 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | 1188 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, |
1189 | { .dma_req = -1 } | ||
1189 | }; | 1190 | }; |
1190 | 1191 | ||
1191 | static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | 1192 | static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { |
@@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | |||
1196 | .name = "i2c1", | 1197 | .name = "i2c1", |
1197 | .mpu_irqs = omap2_i2c1_mpu_irqs, | 1198 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
1198 | .sdma_reqs = i2c1_sdma_reqs, | 1199 | .sdma_reqs = i2c1_sdma_reqs, |
1199 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
1200 | .main_clk = "i2c1_fck", | 1200 | .main_clk = "i2c1_fck", |
1201 | .prcm = { | 1201 | .prcm = { |
1202 | .omap2 = { | 1202 | .omap2 = { |
@@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | |||
1220 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | 1220 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { |
1221 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | 1221 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, |
1222 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | 1222 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, |
1223 | { .dma_req = -1 } | ||
1223 | }; | 1224 | }; |
1224 | 1225 | ||
1225 | static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | 1226 | static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { |
@@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { | |||
1230 | .name = "i2c2", | 1231 | .name = "i2c2", |
1231 | .mpu_irqs = omap2_i2c2_mpu_irqs, | 1232 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
1232 | .sdma_reqs = i2c2_sdma_reqs, | 1233 | .sdma_reqs = i2c2_sdma_reqs, |
1233 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
1234 | .main_clk = "i2c2_fck", | 1234 | .main_clk = "i2c2_fck", |
1235 | .prcm = { | 1235 | .prcm = { |
1236 | .omap2 = { | 1236 | .omap2 = { |
@@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | |||
1611 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | 1611 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ |
1612 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | 1612 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ |
1613 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | 1613 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ |
1614 | { .dma_req = -1 } | ||
1614 | }; | 1615 | }; |
1615 | 1616 | ||
1616 | static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { | 1617 | static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { |
@@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | |||
1625 | .name = "mcspi1_hwmod", | 1626 | .name = "mcspi1_hwmod", |
1626 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | 1627 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
1627 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, | 1628 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, |
1628 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), | ||
1629 | .main_clk = "mcspi1_fck", | 1629 | .main_clk = "mcspi1_fck", |
1630 | .prcm = { | 1630 | .prcm = { |
1631 | .omap2 = { | 1631 | .omap2 = { |
@@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | |||
1649 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | 1649 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ |
1650 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | 1650 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ |
1651 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | 1651 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ |
1652 | { .dma_req = -1 } | ||
1652 | }; | 1653 | }; |
1653 | 1654 | ||
1654 | static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { | 1655 | static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { |
@@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { | |||
1663 | .name = "mcspi2_hwmod", | 1664 | .name = "mcspi2_hwmod", |
1664 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | 1665 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
1665 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, | 1666 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, |
1666 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), | ||
1667 | .main_clk = "mcspi2_fck", | 1667 | .main_clk = "mcspi2_fck", |
1668 | .prcm = { | 1668 | .prcm = { |
1669 | .omap2 = { | 1669 | .omap2 = { |
@@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { | |||
1700 | static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | 1700 | static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { |
1701 | { .name = "rx", .dma_req = 32 }, | 1701 | { .name = "rx", .dma_req = 32 }, |
1702 | { .name = "tx", .dma_req = 31 }, | 1702 | { .name = "tx", .dma_req = 31 }, |
1703 | { .dma_req = -1 } | ||
1703 | }; | 1704 | }; |
1704 | 1705 | ||
1705 | /* l4_core -> mcbsp1 */ | 1706 | /* l4_core -> mcbsp1 */ |
@@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | |||
1721 | .class = &omap2420_mcbsp_hwmod_class, | 1722 | .class = &omap2420_mcbsp_hwmod_class, |
1722 | .mpu_irqs = omap2420_mcbsp1_irqs, | 1723 | .mpu_irqs = omap2420_mcbsp1_irqs, |
1723 | .sdma_reqs = omap2420_mcbsp1_sdma_chs, | 1724 | .sdma_reqs = omap2420_mcbsp1_sdma_chs, |
1724 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), | ||
1725 | .main_clk = "mcbsp1_fck", | 1725 | .main_clk = "mcbsp1_fck", |
1726 | .prcm = { | 1726 | .prcm = { |
1727 | .omap2 = { | 1727 | .omap2 = { |
@@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { | |||
1747 | static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | 1747 | static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { |
1748 | { .name = "rx", .dma_req = 34 }, | 1748 | { .name = "rx", .dma_req = 34 }, |
1749 | { .name = "tx", .dma_req = 33 }, | 1749 | { .name = "tx", .dma_req = 33 }, |
1750 | { .dma_req = -1 } | ||
1750 | }; | 1751 | }; |
1751 | 1752 | ||
1752 | /* l4_core -> mcbsp2 */ | 1753 | /* l4_core -> mcbsp2 */ |
@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { | |||
1768 | .class = &omap2420_mcbsp_hwmod_class, | 1769 | .class = &omap2420_mcbsp_hwmod_class, |
1769 | .mpu_irqs = omap2420_mcbsp2_irqs, | 1770 | .mpu_irqs = omap2420_mcbsp2_irqs, |
1770 | .sdma_reqs = omap2420_mcbsp2_sdma_chs, | 1771 | .sdma_reqs = omap2420_mcbsp2_sdma_chs, |
1771 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), | ||
1772 | .main_clk = "mcbsp2_fck", | 1772 | .main_clk = "mcbsp2_fck", |
1773 | .prcm = { | 1773 | .prcm = { |
1774 | .omap2 = { | 1774 | .omap2 = { |