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-rw-r--r--arch/arm/mach-omap2/omap-smp.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index d9727218dd0a..e7a449758ab5 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -67,13 +67,6 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
67 4, 0, 0, 0, 0, 0); 67 4, 0, 0, 0, 0, 0);
68 68
69 /* 69 /*
70 * If any interrupts are already enabled for the primary
71 * core (e.g. timer irq), then they will not have been enabled
72 * for us: do so
73 */
74 gic_secondary_init(0);
75
76 /*
77 * Synchronise with the boot thread. 70 * Synchronise with the boot thread.
78 */ 71 */
79 spin_lock(&boot_lock); 72 spin_lock(&boot_lock);