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-rw-r--r--arch/arm/mach-omap2/omap-smp.c35
1 files changed, 23 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index badfe398038e..7d118b9bdd5f 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -33,6 +33,12 @@
33#include "common.h" 33#include "common.h"
34#include "clockdomain.h" 34#include "clockdomain.h"
35 35
36#define CPU_MASK 0xff0ffff0
37#define CPU_CORTEX_A9 0x410FC090
38#define CPU_CORTEX_A15 0x410FC0F0
39
40#define OMAP5_CORE_COUNT 0x2
41
36/* SCU base address */ 42/* SCU base address */
37static void __iomem *scu_base; 43static void __iomem *scu_base;
38 44
@@ -133,7 +139,6 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
133static void __init wakeup_secondary(void) 139static void __init wakeup_secondary(void)
134{ 140{
135 void __iomem *base = omap_get_wakeupgen_base(); 141 void __iomem *base = omap_get_wakeupgen_base();
136
137 /* 142 /*
138 * Write the address of secondary startup routine into the 143 * Write the address of secondary startup routine into the
139 * AuxCoreBoot1 where ROM code will jump and start executing 144 * AuxCoreBoot1 where ROM code will jump and start executing
@@ -162,16 +167,21 @@ static void __init wakeup_secondary(void)
162 */ 167 */
163void __init smp_init_cpus(void) 168void __init smp_init_cpus(void)
164{ 169{
165 unsigned int i, ncores; 170 unsigned int i = 0, ncores = 1, cpu_id;
166 171
167 /* 172 /* Use ARM cpuid check here, as SoC detection will not work so early */
168 * Currently we can't call ioremap here because 173 cpu_id = read_cpuid(CPUID_ID) & CPU_MASK;
169 * SoC detection won't work until after init_early. 174 if (cpu_id == CPU_CORTEX_A9) {
170 */ 175 /*
171 scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE); 176 * Currently we can't call ioremap here because
172 BUG_ON(!scu_base); 177 * SoC detection won't work until after init_early.
173 178 */
174 ncores = scu_get_core_count(scu_base); 179 scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
180 BUG_ON(!scu_base);
181 ncores = scu_get_core_count(scu_base);
182 } else if (cpu_id == CPU_CORTEX_A15) {
183 ncores = OMAP5_CORE_COUNT;
184 }
175 185
176 /* sanity check */ 186 /* sanity check */
177 if (ncores > nr_cpu_ids) { 187 if (ncores > nr_cpu_ids) {
@@ -193,6 +203,7 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
193 * Initialise the SCU and wake up the secondary core using 203 * Initialise the SCU and wake up the secondary core using
194 * wakeup_secondary(). 204 * wakeup_secondary().
195 */ 205 */
196 scu_enable(scu_base); 206 if (scu_base)
207 scu_enable(scu_base);
197 wakeup_secondary(); 208 wakeup_secondary();
198} 209}