aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/io.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2/io.c')
-rw-r--r--arch/arm/mach-omap2/io.c174
1 files changed, 101 insertions, 73 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 56be87d13edb..87f676acf61d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -22,39 +22,37 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/omapfb.h>
25 26
26#include <asm/tlb.h> 27#include <asm/tlb.h>
27 28
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
29 30
30#include <mach/mux.h> 31#include <plat/mux.h>
31#include <mach/omapfb.h> 32#include <plat/sram.h>
32#include <mach/sram.h> 33#include <plat/sdrc.h>
33#include <mach/sdrc.h> 34#include <plat/gpmc.h>
34#include <mach/gpmc.h> 35#include <plat/serial.h>
35#include <mach/serial.h> 36#include <plat/vram.h>
36 37
37#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ 38#include "clock2xxx.h"
38#include "clock.h" 39#include "clock3xxx.h"
40#include "clock44xx.h"
39 41
40#include <mach/omap-pm.h> 42#include <plat/omap-pm.h>
41#include <mach/powerdomain.h> 43#include <plat/powerdomain.h>
42#include "powerdomains.h" 44#include "powerdomains.h"
43 45
44#include <mach/clockdomain.h> 46#include <plat/clockdomain.h>
45#include "clockdomains.h" 47#include "clockdomains.h"
46#endif 48#include <plat/omap_hwmod.h>
47#include <mach/omap_hwmod.h>
48#include "omap_hwmod_2420.h"
49#include "omap_hwmod_2430.h"
50#include "omap_hwmod_34xx.h"
51 49
52/* 50/*
53 * The machine specific code may provide the extra mapping besides the 51 * The machine specific code may provide the extra mapping besides the
54 * default mapping provided here. 52 * default mapping provided here.
55 */ 53 */
56 54
57#ifdef CONFIG_ARCH_OMAP24XX 55#ifdef CONFIG_ARCH_OMAP2
58static struct map_desc omap24xx_io_desc[] __initdata = { 56static struct map_desc omap24xx_io_desc[] __initdata = {
59 { 57 {
60 .virtual = L3_24XX_VIRT, 58 .virtual = L3_24XX_VIRT,
@@ -73,21 +71,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
73#ifdef CONFIG_ARCH_OMAP2420 71#ifdef CONFIG_ARCH_OMAP2420
74static struct map_desc omap242x_io_desc[] __initdata = { 72static struct map_desc omap242x_io_desc[] __initdata = {
75 { 73 {
76 .virtual = DSP_MEM_24XX_VIRT, 74 .virtual = DSP_MEM_2420_VIRT,
77 .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), 75 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
78 .length = DSP_MEM_24XX_SIZE, 76 .length = DSP_MEM_2420_SIZE,
79 .type = MT_DEVICE 77 .type = MT_DEVICE
80 }, 78 },
81 { 79 {
82 .virtual = DSP_IPI_24XX_VIRT, 80 .virtual = DSP_IPI_2420_VIRT,
83 .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), 81 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
84 .length = DSP_IPI_24XX_SIZE, 82 .length = DSP_IPI_2420_SIZE,
85 .type = MT_DEVICE 83 .type = MT_DEVICE
86 }, 84 },
87 { 85 {
88 .virtual = DSP_MMU_24XX_VIRT, 86 .virtual = DSP_MMU_2420_VIRT,
89 .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), 87 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
90 .length = DSP_MMU_24XX_SIZE, 88 .length = DSP_MMU_2420_SIZE,
91 .type = MT_DEVICE 89 .type = MT_DEVICE
92 }, 90 },
93}; 91};
@@ -124,7 +122,7 @@ static struct map_desc omap243x_io_desc[] __initdata = {
124#endif 122#endif
125#endif 123#endif
126 124
127#ifdef CONFIG_ARCH_OMAP34XX 125#ifdef CONFIG_ARCH_OMAP3
128static struct map_desc omap34xx_io_desc[] __initdata = { 126static struct map_desc omap34xx_io_desc[] __initdata = {
129 { 127 {
130 .virtual = L3_34XX_VIRT, 128 .virtual = L3_34XX_VIRT,
@@ -139,12 +137,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
139 .type = MT_DEVICE 137 .type = MT_DEVICE
140 }, 138 },
141 { 139 {
142 .virtual = L4_WK_34XX_VIRT,
143 .pfn = __phys_to_pfn(L4_WK_34XX_PHYS),
144 .length = L4_WK_34XX_SIZE,
145 .type = MT_DEVICE
146 },
147 {
148 .virtual = OMAP34XX_GPMC_VIRT, 140 .virtual = OMAP34XX_GPMC_VIRT,
149 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), 141 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
150 .length = OMAP34XX_GPMC_SIZE, 142 .length = OMAP34XX_GPMC_SIZE,
@@ -191,18 +183,30 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
191 .type = MT_DEVICE, 183 .type = MT_DEVICE,
192 }, 184 },
193 { 185 {
194 .virtual = L4_WK_44XX_VIRT,
195 .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
196 .length = L4_WK_44XX_SIZE,
197 .type = MT_DEVICE,
198 },
199 {
200 .virtual = OMAP44XX_GPMC_VIRT, 186 .virtual = OMAP44XX_GPMC_VIRT,
201 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS), 187 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
202 .length = OMAP44XX_GPMC_SIZE, 188 .length = OMAP44XX_GPMC_SIZE,
203 .type = MT_DEVICE, 189 .type = MT_DEVICE,
204 }, 190 },
205 { 191 {
192 .virtual = OMAP44XX_EMIF1_VIRT,
193 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
194 .length = OMAP44XX_EMIF1_SIZE,
195 .type = MT_DEVICE,
196 },
197 {
198 .virtual = OMAP44XX_EMIF2_VIRT,
199 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
200 .length = OMAP44XX_EMIF2_SIZE,
201 .type = MT_DEVICE,
202 },
203 {
204 .virtual = OMAP44XX_DMM_VIRT,
205 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
206 .length = OMAP44XX_DMM_SIZE,
207 .type = MT_DEVICE,
208 },
209 {
206 .virtual = L4_PER_44XX_VIRT, 210 .virtual = L4_PER_44XX_VIRT,
207 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS), 211 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
208 .length = L4_PER_44XX_SIZE, 212 .length = L4_PER_44XX_SIZE,
@@ -217,36 +221,54 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
217}; 221};
218#endif 222#endif
219 223
220void __init omap2_map_common_io(void) 224static void __init _omap2_map_common_io(void)
225{
226 /* Normally devicemaps_init() would flush caches and tlb after
227 * mdesc->map_io(), but we must also do it here because of the CPU
228 * revision check below.
229 */
230 local_flush_tlb_all();
231 flush_cache_all();
232
233 omap2_check_revision();
234 omap_sram_init();
235 omapfb_reserve_sdram();
236 omap_vram_reserve_sdram();
237}
238
239#ifdef CONFIG_ARCH_OMAP2420
240void __init omap242x_map_common_io(void)
221{ 241{
222#if defined(CONFIG_ARCH_OMAP2420)
223 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 242 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
224 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); 243 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
244 _omap2_map_common_io();
245}
225#endif 246#endif
226 247
227#if defined(CONFIG_ARCH_OMAP2430) 248#ifdef CONFIG_ARCH_OMAP2430
249void __init omap243x_map_common_io(void)
250{
228 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 251 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
229 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); 252 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
253 _omap2_map_common_io();
254}
230#endif 255#endif
231 256
232#if defined(CONFIG_ARCH_OMAP34XX) 257#ifdef CONFIG_ARCH_OMAP3
258void __init omap34xx_map_common_io(void)
259{
233 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); 260 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
261 _omap2_map_common_io();
262}
234#endif 263#endif
235 264
236#if defined(CONFIG_ARCH_OMAP4) 265#ifdef CONFIG_ARCH_OMAP4
266void __init omap44xx_map_common_io(void)
267{
237 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 268 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
238#endif 269 _omap2_map_common_io();
239 /* Normally devicemaps_init() would flush caches and tlb after
240 * mdesc->map_io(), but we must also do it here because of the CPU
241 * revision check below.
242 */
243 local_flush_tlb_all();
244 flush_cache_all();
245
246 omap2_check_revision();
247 omap_sram_init();
248 omapfb_reserve_sdram();
249} 270}
271#endif
250 272
251/* 273/*
252 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters 274 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
@@ -285,30 +307,36 @@ static int __init _omap2_init_reprogram_sdrc(void)
285void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, 307void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
286 struct omap_sdrc_params *sdrc_cs1) 308 struct omap_sdrc_params *sdrc_cs1)
287{ 309{
288 struct omap_hwmod **hwmods = NULL; 310 pwrdm_init(powerdomains_omap);
311 clkdm_init(clockdomains_omap, clkdm_autodeps);
312 if (cpu_is_omap242x())
313 omap2420_hwmod_init();
314 else if (cpu_is_omap243x())
315 omap2430_hwmod_init();
316 else if (cpu_is_omap34xx())
317 omap3xxx_hwmod_init();
318 omap2_mux_init();
319 /* The OPP tables have to be registered before a clk init */
320 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
289 321
290 if (cpu_is_omap2420()) 322 if (cpu_is_omap2420())
291 hwmods = omap2420_hwmods; 323 omap2420_clk_init();
292 else if (cpu_is_omap2430()) 324 else if (cpu_is_omap2430())
293 hwmods = omap2430_hwmods; 325 omap2430_clk_init();
294 else if (cpu_is_omap34xx()) 326 else if (cpu_is_omap34xx())
295 hwmods = omap34xx_hwmods; 327 omap3xxx_clk_init();
328 else if (cpu_is_omap44xx())
329 omap4xxx_clk_init();
330 else
331 pr_err("Could not init clock framework - unknown CPU\n");
296 332
297#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
298 /* The OPP tables have to be registered before a clk init */
299 omap_hwmod_init(hwmods);
300 omap2_mux_init();
301 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
302 pwrdm_init(powerdomains_omap);
303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
304 omap2_clk_init();
305#endif
306 omap_serial_early_init(); 333 omap_serial_early_init();
307#ifndef CONFIG_ARCH_OMAP4 334 if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */
308 omap_hwmod_late_init(); 335 omap_hwmod_late_init();
309 omap_pm_if_init(); 336 omap_pm_if_init();
310 omap2_sdrc_init(sdrc_cs0, sdrc_cs1); 337 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
311 _omap2_init_reprogram_sdrc(); 338 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
312#endif 339 _omap2_init_reprogram_sdrc();
340 }
313 gpmc_init(); 341 gpmc_init();
314} 342}
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 03:21:55 -0400