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-rw-r--r--arch/arm/mach-omap2/id.c227
1 files changed, 189 insertions, 38 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a98201cc265c..37b8a1a4adf8 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,13 +21,14 @@
21 21
22#include <asm/cputype.h> 22#include <asm/cputype.h>
23 23
24#include <mach/common.h> 24#include <plat/common.h>
25#include <mach/control.h> 25#include <plat/control.h>
26#include <mach/cpu.h> 26#include <plat/cpu.h>
27 27
28static struct omap_chip_id omap_chip; 28static struct omap_chip_id omap_chip;
29static unsigned int omap_revision; 29static unsigned int omap_revision;
30 30
31u32 omap3_features;
31 32
32unsigned int omap_rev(void) 33unsigned int omap_rev(void)
33{ 34{
@@ -52,11 +53,13 @@ int omap_type(void)
52{ 53{
53 u32 val = 0; 54 u32 val = 0;
54 55
55 if (cpu_is_omap24xx()) 56 if (cpu_is_omap24xx()) {
56 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 57 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
57 else if (cpu_is_omap34xx()) 58 } else if (cpu_is_omap34xx()) {
58 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 59 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
59 else { 60 } else if (cpu_is_omap44xx()) {
61 val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
62 } else {
60 pr_err("Cannot detect omap type!\n"); 63 pr_err("Cannot detect omap type!\n");
61 goto out; 64 goto out;
62 } 65 }
@@ -155,12 +158,41 @@ void __init omap24xx_check_revision(void)
155 pr_info("\n"); 158 pr_info("\n");
156} 159}
157 160
158void __init omap34xx_check_revision(void) 161#define OMAP3_CHECK_FEATURE(status,feat) \
162 if (((status & OMAP3_ ##feat## _MASK) \
163 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
164 omap3_features |= OMAP3_HAS_ ##feat; \
165 }
166
167void __init omap3_check_features(void)
168{
169 u32 status;
170
171 omap3_features = 0;
172
173 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
174
175 OMAP3_CHECK_FEATURE(status, L2CACHE);
176 OMAP3_CHECK_FEATURE(status, IVA);
177 OMAP3_CHECK_FEATURE(status, SGX);
178 OMAP3_CHECK_FEATURE(status, NEON);
179 OMAP3_CHECK_FEATURE(status, ISP);
180 if (cpu_is_omap3630())
181 omap3_features |= OMAP3_HAS_192MHZ_CLK;
182
183 /*
184 * TODO: Get additional info (where applicable)
185 * e.g. Size of L2 cache.
186 */
187}
188
189void __init omap3_check_revision(void)
159{ 190{
160 u32 cpuid, idcode; 191 u32 cpuid, idcode;
161 u16 hawkeye; 192 u16 hawkeye;
162 u8 rev; 193 u8 rev;
163 char *rev_name = "ES1.0"; 194
195 omap_chip.oc = CHIP_IS_OMAP3430;
164 196
165 /* 197 /*
166 * We cannot access revision registers on ES1.0. 198 * We cannot access revision registers on ES1.0.
@@ -170,7 +202,8 @@ void __init omap34xx_check_revision(void)
170 cpuid = read_cpuid(CPUID_ID); 202 cpuid = read_cpuid(CPUID_ID);
171 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 203 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
172 omap_revision = OMAP3430_REV_ES1_0; 204 omap_revision = OMAP3430_REV_ES1_0;
173 goto out; 205 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
206 return;
174 } 207 }
175 208
176 /* 209 /*
@@ -183,33 +216,156 @@ void __init omap34xx_check_revision(void)
183 hawkeye = (idcode >> 12) & 0xffff; 216 hawkeye = (idcode >> 12) & 0xffff;
184 rev = (idcode >> 28) & 0xff; 217 rev = (idcode >> 28) & 0xff;
185 218
186 if (hawkeye == 0xb7ae) { 219 switch (hawkeye) {
220 case 0xb7ae:
221 /* Handle 34xx/35xx devices */
187 switch (rev) { 222 switch (rev) {
188 case 0: 223 case 0: /* Take care of early samples */
224 case 1:
189 omap_revision = OMAP3430_REV_ES2_0; 225 omap_revision = OMAP3430_REV_ES2_0;
190 rev_name = "ES2.0"; 226 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
191 break; 227 break;
192 case 2: 228 case 2:
193 omap_revision = OMAP3430_REV_ES2_1; 229 omap_revision = OMAP3430_REV_ES2_1;
194 rev_name = "ES2.1"; 230 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
195 break; 231 break;
196 case 3: 232 case 3:
197 omap_revision = OMAP3430_REV_ES3_0; 233 omap_revision = OMAP3430_REV_ES3_0;
198 rev_name = "ES3.0"; 234 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
199 break; 235 break;
200 case 4: 236 case 4:
201 omap_revision = OMAP3430_REV_ES3_1; 237 omap_revision = OMAP3430_REV_ES3_1;
202 rev_name = "ES3.1"; 238 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
203 break; 239 break;
240 case 7:
241 /* FALLTHROUGH */
204 default: 242 default:
205 /* Use the latest known revision as default */ 243 /* Use the latest known revision as default */
206 omap_revision = OMAP3430_REV_ES3_1; 244 omap_revision = OMAP3430_REV_ES3_1_2;
207 rev_name = "Unknown revision\n"; 245
246 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
247 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
208 } 248 }
249 break;
250 case 0xb868:
251 /* Handle OMAP35xx/AM35xx devices
252 *
253 * Set the device to be OMAP3505 here. Actual device
254 * is identified later based on the features.
255 *
256 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
257 */
258 omap_revision = OMAP3505_REV(rev);
259 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
260 break;
261 case 0xb891:
262 /* FALLTHROUGH */
263 default:
264 /* Unknown default to latest silicon rev as default*/
265 omap_revision = OMAP3630_REV_ES1_0;
266 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
209 } 267 }
268}
210 269
211out: 270void __init omap4_check_revision(void)
212 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); 271{
272 u32 idcode;
273 u16 hawkeye;
274 u8 rev;
275 char *rev_name = "ES1.0";
276
277 /*
278 * The IC rev detection is done with hawkeye and rev.
279 * Note that rev does not map directly to defined processor
280 * revision numbers as ES1.0 uses value 0.
281 */
282 idcode = read_tap_reg(OMAP_TAP_IDCODE);
283 hawkeye = (idcode >> 12) & 0xffff;
284 rev = (idcode >> 28) & 0xff;
285
286 if ((hawkeye == 0xb852) && (rev == 0x0)) {
287 omap_revision = OMAP4430_REV_ES1_0;
288 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
289 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
290 return;
291 }
292
293 pr_err("Unknown OMAP4 CPU id\n");
294}
295
296#define OMAP3_SHOW_FEATURE(feat) \
297 if (omap3_has_ ##feat()) \
298 printk(#feat" ");
299
300void __init omap3_cpuinfo(void)
301{
302 u8 rev = GET_OMAP_REVISION();
303 char cpu_name[16], cpu_rev[16];
304
305 /* OMAP3430 and OMAP3530 are assumed to be same.
306 *
307 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
308 * on available features. Upon detection, update the CPU id
309 * and CPU class bits.
310 */
311 if (cpu_is_omap3630()) {
312 strcpy(cpu_name, "OMAP3630");
313 } else if (cpu_is_omap3505()) {
314 /*
315 * AM35xx devices
316 */
317 if (omap3_has_sgx()) {
318 omap_revision = OMAP3517_REV(rev);
319 strcpy(cpu_name, "AM3517");
320 } else {
321 /* Already set in omap3_check_revision() */
322 strcpy(cpu_name, "AM3505");
323 }
324 } else if (omap3_has_iva() && omap3_has_sgx()) {
325 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
326 strcpy(cpu_name, "OMAP3430/3530");
327 } else if (omap3_has_iva()) {
328 omap_revision = OMAP3525_REV(rev);
329 strcpy(cpu_name, "OMAP3525");
330 } else if (omap3_has_sgx()) {
331 omap_revision = OMAP3515_REV(rev);
332 strcpy(cpu_name, "OMAP3515");
333 } else {
334 omap_revision = OMAP3503_REV(rev);
335 strcpy(cpu_name, "OMAP3503");
336 }
337
338 switch (rev) {
339 case OMAP_REVBITS_00:
340 strcpy(cpu_rev, "1.0");
341 break;
342 case OMAP_REVBITS_10:
343 strcpy(cpu_rev, "2.0");
344 break;
345 case OMAP_REVBITS_20:
346 strcpy(cpu_rev, "2.1");
347 break;
348 case OMAP_REVBITS_30:
349 strcpy(cpu_rev, "3.0");
350 break;
351 case OMAP_REVBITS_40:
352 /* FALLTHROUGH */
353 default:
354 /* Use the latest known revision as default */
355 strcpy(cpu_rev, "3.1");
356 }
357
358 /* Print verbose information */
359 pr_info("%s ES%s (", cpu_name, cpu_rev);
360
361 OMAP3_SHOW_FEATURE(l2cache);
362 OMAP3_SHOW_FEATURE(iva);
363 OMAP3_SHOW_FEATURE(sgx);
364 OMAP3_SHOW_FEATURE(neon);
365 OMAP3_SHOW_FEATURE(isp);
366 OMAP3_SHOW_FEATURE(192mhz_clk);
367
368 printk(")\n");
213} 369}
214 370
215/* 371/*
@@ -221,15 +377,19 @@ void __init omap2_check_revision(void)
221 * At this point we have an idea about the processor revision set 377 * At this point we have an idea about the processor revision set
222 * earlier with omap2_set_globals_tap(). 378 * earlier with omap2_set_globals_tap().
223 */ 379 */
224 if (cpu_is_omap24xx()) 380 if (cpu_is_omap24xx()) {
225 omap24xx_check_revision(); 381 omap24xx_check_revision();
226 else if (cpu_is_omap34xx()) 382 } else if (cpu_is_omap34xx()) {
227 omap34xx_check_revision(); 383 omap3_check_revision();
228 else if (cpu_is_omap44xx()) { 384 omap3_check_features();
229 printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); 385 omap3_cpuinfo();
386 return;
387 } else if (cpu_is_omap44xx()) {
388 omap4_check_revision();
230 return; 389 return;
231 } else 390 } else {
232 pr_err("OMAP revision unknown, please fix!\n"); 391 pr_err("OMAP revision unknown, please fix!\n");
392 }
233 393
234 /* 394 /*
235 * OK, now we know the exact revision. Initialize omap_chip bits 395 * OK, now we know the exact revision. Initialize omap_chip bits
@@ -238,23 +398,14 @@ void __init omap2_check_revision(void)
238 if (cpu_is_omap243x()) { 398 if (cpu_is_omap243x()) {
239 /* Currently only supports 2430ES2.1 and 2430-all */ 399 /* Currently only supports 2430ES2.1 and 2430-all */
240 omap_chip.oc |= CHIP_IS_OMAP2430; 400 omap_chip.oc |= CHIP_IS_OMAP2430;
401 return;
241 } else if (cpu_is_omap242x()) { 402 } else if (cpu_is_omap242x()) {
242 /* Currently only supports 2420ES2.1.1 and 2420-all */ 403 /* Currently only supports 2420ES2.1.1 and 2420-all */
243 omap_chip.oc |= CHIP_IS_OMAP2420; 404 omap_chip.oc |= CHIP_IS_OMAP2420;
244 } else if (cpu_is_omap343x()) { 405 return;
245 omap_chip.oc = CHIP_IS_OMAP3430;
246 if (omap_rev() == OMAP3430_REV_ES1_0)
247 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
248 else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
249 omap_rev() <= OMAP3430_REV_ES2_1)
250 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
251 else if (omap_rev() == OMAP3430_REV_ES3_0)
252 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
253 else if (omap_rev() == OMAP3430_REV_ES3_1)
254 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
255 } else {
256 pr_err("Uninitialized omap_chip, please fix!\n");
257 } 406 }
407
408 pr_err("Uninitialized omap_chip, please fix!\n");
258} 409}
259 410
260/* 411/*