diff options
Diffstat (limited to 'arch/arm/mach-omap2/devices.c')
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 168 |
1 files changed, 0 insertions, 168 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 2f4a598ba67e..31632ac1ca7c 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -544,112 +544,6 @@ static inline void omap_init_aes(void) { } | |||
544 | 544 | ||
545 | /*-------------------------------------------------------------------------*/ | 545 | /*-------------------------------------------------------------------------*/ |
546 | 546 | ||
547 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
548 | |||
549 | #define MMCHS_SYSCONFIG 0x0010 | ||
550 | #define MMCHS_SYSCONFIG_SWRESET (1 << 1) | ||
551 | #define MMCHS_SYSSTATUS 0x0014 | ||
552 | #define MMCHS_SYSSTATUS_RESETDONE (1 << 0) | ||
553 | |||
554 | static struct platform_device dummy_pdev = { | ||
555 | .dev = { | ||
556 | .bus = &platform_bus_type, | ||
557 | }, | ||
558 | }; | ||
559 | |||
560 | /** | ||
561 | * omap_hsmmc_reset() - Full reset of each HS-MMC controller | ||
562 | * | ||
563 | * Ensure that each MMC controller is fully reset. Controllers | ||
564 | * left in an unknown state (by bootloader) may prevent retention | ||
565 | * or OFF-mode. This is especially important in cases where the | ||
566 | * MMC driver is not enabled, _or_ built as a module. | ||
567 | * | ||
568 | * In order for reset to work, interface, functional and debounce | ||
569 | * clocks must be enabled. The debounce clock comes from func_32k_clk | ||
570 | * and is not under SW control, so we only enable i- and f-clocks. | ||
571 | **/ | ||
572 | static void __init omap_hsmmc_reset(void) | ||
573 | { | ||
574 | u32 i, nr_controllers; | ||
575 | struct clk *iclk, *fclk; | ||
576 | |||
577 | if (cpu_is_omap242x()) | ||
578 | return; | ||
579 | |||
580 | nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC : | ||
581 | (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC); | ||
582 | |||
583 | for (i = 0; i < nr_controllers; i++) { | ||
584 | u32 v, base = 0; | ||
585 | struct device *dev = &dummy_pdev.dev; | ||
586 | |||
587 | switch (i) { | ||
588 | case 0: | ||
589 | base = OMAP2_MMC1_BASE; | ||
590 | break; | ||
591 | case 1: | ||
592 | base = OMAP2_MMC2_BASE; | ||
593 | break; | ||
594 | case 2: | ||
595 | base = OMAP3_MMC3_BASE; | ||
596 | break; | ||
597 | case 3: | ||
598 | if (!cpu_is_omap44xx()) | ||
599 | return; | ||
600 | base = OMAP4_MMC4_BASE; | ||
601 | break; | ||
602 | case 4: | ||
603 | if (!cpu_is_omap44xx()) | ||
604 | return; | ||
605 | base = OMAP4_MMC5_BASE; | ||
606 | break; | ||
607 | } | ||
608 | |||
609 | if (cpu_is_omap44xx()) | ||
610 | base += OMAP4_MMC_REG_OFFSET; | ||
611 | |||
612 | dummy_pdev.id = i; | ||
613 | dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); | ||
614 | iclk = clk_get(dev, "ick"); | ||
615 | if (IS_ERR(iclk)) | ||
616 | goto err1; | ||
617 | if (clk_enable(iclk)) | ||
618 | goto err2; | ||
619 | |||
620 | fclk = clk_get(dev, "fck"); | ||
621 | if (IS_ERR(fclk)) | ||
622 | goto err3; | ||
623 | if (clk_enable(fclk)) | ||
624 | goto err4; | ||
625 | |||
626 | omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG); | ||
627 | v = omap_readl(base + MMCHS_SYSSTATUS); | ||
628 | while (!(omap_readl(base + MMCHS_SYSSTATUS) & | ||
629 | MMCHS_SYSSTATUS_RESETDONE)) | ||
630 | cpu_relax(); | ||
631 | |||
632 | clk_disable(fclk); | ||
633 | clk_put(fclk); | ||
634 | clk_disable(iclk); | ||
635 | clk_put(iclk); | ||
636 | } | ||
637 | return; | ||
638 | |||
639 | err4: | ||
640 | clk_put(fclk); | ||
641 | err3: | ||
642 | clk_disable(iclk); | ||
643 | err2: | ||
644 | clk_put(iclk); | ||
645 | err1: | ||
646 | printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, " | ||
647 | "cannot reset.\n", __func__, i); | ||
648 | } | ||
649 | #else | ||
650 | static inline void omap_hsmmc_reset(void) {} | ||
651 | #endif | ||
652 | |||
653 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) | 547 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) |
654 | 548 | ||
655 | static inline void omap242x_mmc_mux(struct omap_mmc_platform_data | 549 | static inline void omap242x_mmc_mux(struct omap_mmc_platform_data |
@@ -706,67 +600,6 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) | |||
706 | 600 | ||
707 | #endif | 601 | #endif |
708 | 602 | ||
709 | #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | ||
710 | |||
711 | void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | ||
712 | int nr_controllers) | ||
713 | { | ||
714 | int i; | ||
715 | char *name; | ||
716 | |||
717 | for (i = 0; i < nr_controllers; i++) { | ||
718 | unsigned long base, size; | ||
719 | unsigned int irq = 0; | ||
720 | |||
721 | if (!mmc_data[i]) | ||
722 | continue; | ||
723 | |||
724 | switch (i) { | ||
725 | case 0: | ||
726 | base = OMAP2_MMC1_BASE; | ||
727 | irq = INT_24XX_MMC_IRQ; | ||
728 | break; | ||
729 | case 1: | ||
730 | base = OMAP2_MMC2_BASE; | ||
731 | irq = INT_24XX_MMC2_IRQ; | ||
732 | break; | ||
733 | case 2: | ||
734 | if (!cpu_is_omap44xx() && !cpu_is_omap34xx()) | ||
735 | return; | ||
736 | base = OMAP3_MMC3_BASE; | ||
737 | irq = INT_34XX_MMC3_IRQ; | ||
738 | break; | ||
739 | case 3: | ||
740 | if (!cpu_is_omap44xx()) | ||
741 | return; | ||
742 | base = OMAP4_MMC4_BASE; | ||
743 | irq = OMAP44XX_IRQ_MMC4; | ||
744 | break; | ||
745 | case 4: | ||
746 | if (!cpu_is_omap44xx()) | ||
747 | return; | ||
748 | base = OMAP4_MMC5_BASE; | ||
749 | irq = OMAP44XX_IRQ_MMC5; | ||
750 | break; | ||
751 | default: | ||
752 | continue; | ||
753 | } | ||
754 | |||
755 | if (cpu_is_omap44xx()) { | ||
756 | if (i < 3) | ||
757 | irq += OMAP44XX_IRQ_GIC_START; | ||
758 | size = OMAP4_HSMMC_SIZE; | ||
759 | name = "mmci-omap-hs"; | ||
760 | } else { | ||
761 | size = OMAP3_HSMMC_SIZE; | ||
762 | name = "mmci-omap-hs"; | ||
763 | } | ||
764 | omap_mmc_add(name, i, base, size, irq, mmc_data[i]); | ||
765 | }; | ||
766 | } | ||
767 | |||
768 | #endif | ||
769 | |||
770 | /*-------------------------------------------------------------------------*/ | 603 | /*-------------------------------------------------------------------------*/ |
771 | 604 | ||
772 | #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) | 605 | #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) |
@@ -836,7 +669,6 @@ static int __init omap2_init_devices(void) | |||
836 | * please keep these calls, and their implementations above, | 669 | * please keep these calls, and their implementations above, |
837 | * in alphabetical order so they're easier to sort through. | 670 | * in alphabetical order so they're easier to sort through. |
838 | */ | 671 | */ |
839 | omap_hsmmc_reset(); | ||
840 | omap_init_audio(); | 672 | omap_init_audio(); |
841 | omap_init_camera(); | 673 | omap_init_camera(); |
842 | omap_init_mbox(); | 674 | omap_init_mbox(); |