diff options
Diffstat (limited to 'arch/arm/mach-omap2/devices.c')
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 133 |
1 files changed, 101 insertions, 32 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index faf7a1e0c525..2271b9bd1f50 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -20,12 +20,14 @@ | |||
20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
21 | #include <asm/mach/map.h> | 21 | #include <asm/mach/map.h> |
22 | 22 | ||
23 | #include <mach/control.h> | 23 | #include <plat/control.h> |
24 | #include <mach/tc.h> | 24 | #include <plat/tc.h> |
25 | #include <mach/board.h> | 25 | #include <plat/board.h> |
26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
27 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
28 | #include <mach/mmc.h> | 28 | #include <plat/mmc.h> |
29 | |||
30 | #include "mux.h" | ||
29 | 31 | ||
30 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) | 32 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) |
31 | 33 | ||
@@ -136,8 +138,9 @@ static inline void omap_init_camera(void) | |||
136 | 138 | ||
137 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) | 139 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) |
138 | 140 | ||
139 | #define MBOX_REG_SIZE 0x120 | 141 | #define MBOX_REG_SIZE 0x120 |
140 | 142 | ||
143 | #ifdef CONFIG_ARCH_OMAP2 | ||
141 | static struct resource omap2_mbox_resources[] = { | 144 | static struct resource omap2_mbox_resources[] = { |
142 | { | 145 | { |
143 | .start = OMAP24XX_MAILBOX_BASE, | 146 | .start = OMAP24XX_MAILBOX_BASE, |
@@ -153,7 +156,13 @@ static struct resource omap2_mbox_resources[] = { | |||
153 | .flags = IORESOURCE_IRQ, | 156 | .flags = IORESOURCE_IRQ, |
154 | }, | 157 | }, |
155 | }; | 158 | }; |
159 | static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources); | ||
160 | #else | ||
161 | #define omap2_mbox_resources NULL | ||
162 | #define omap2_mbox_resources_sz 0 | ||
163 | #endif | ||
156 | 164 | ||
165 | #ifdef CONFIG_ARCH_OMAP3 | ||
157 | static struct resource omap3_mbox_resources[] = { | 166 | static struct resource omap3_mbox_resources[] = { |
158 | { | 167 | { |
159 | .start = OMAP34XX_MAILBOX_BASE, | 168 | .start = OMAP34XX_MAILBOX_BASE, |
@@ -165,6 +174,32 @@ static struct resource omap3_mbox_resources[] = { | |||
165 | .flags = IORESOURCE_IRQ, | 174 | .flags = IORESOURCE_IRQ, |
166 | }, | 175 | }, |
167 | }; | 176 | }; |
177 | static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources); | ||
178 | #else | ||
179 | #define omap3_mbox_resources NULL | ||
180 | #define omap3_mbox_resources_sz 0 | ||
181 | #endif | ||
182 | |||
183 | #ifdef CONFIG_ARCH_OMAP4 | ||
184 | |||
185 | #define OMAP4_MBOX_REG_SIZE 0x130 | ||
186 | static struct resource omap4_mbox_resources[] = { | ||
187 | { | ||
188 | .start = OMAP44XX_MAILBOX_BASE, | ||
189 | .end = OMAP44XX_MAILBOX_BASE + | ||
190 | OMAP4_MBOX_REG_SIZE - 1, | ||
191 | .flags = IORESOURCE_MEM, | ||
192 | }, | ||
193 | { | ||
194 | .start = OMAP44XX_IRQ_MAIL_U0, | ||
195 | .flags = IORESOURCE_IRQ, | ||
196 | }, | ||
197 | }; | ||
198 | static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources); | ||
199 | #else | ||
200 | #define omap4_mbox_resources NULL | ||
201 | #define omap4_mbox_resources_sz 0 | ||
202 | #endif | ||
168 | 203 | ||
169 | static struct platform_device mbox_device = { | 204 | static struct platform_device mbox_device = { |
170 | .name = "omap2-mailbox", | 205 | .name = "omap2-mailbox", |
@@ -173,12 +208,15 @@ static struct platform_device mbox_device = { | |||
173 | 208 | ||
174 | static inline void omap_init_mbox(void) | 209 | static inline void omap_init_mbox(void) |
175 | { | 210 | { |
176 | if (cpu_is_omap2420()) { | 211 | if (cpu_is_omap24xx()) { |
177 | mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources); | ||
178 | mbox_device.resource = omap2_mbox_resources; | 212 | mbox_device.resource = omap2_mbox_resources; |
179 | } else if (cpu_is_omap3430()) { | 213 | mbox_device.num_resources = omap2_mbox_resources_sz; |
180 | mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources); | 214 | } else if (cpu_is_omap34xx()) { |
181 | mbox_device.resource = omap3_mbox_resources; | 215 | mbox_device.resource = omap3_mbox_resources; |
216 | mbox_device.num_resources = omap3_mbox_resources_sz; | ||
217 | } else if (cpu_is_omap44xx()) { | ||
218 | mbox_device.resource = omap4_mbox_resources; | ||
219 | mbox_device.num_resources = omap4_mbox_resources_sz; | ||
182 | } else { | 220 | } else { |
183 | pr_err("%s: platform not supported\n", __func__); | 221 | pr_err("%s: platform not supported\n", __func__); |
184 | return; | 222 | return; |
@@ -250,7 +288,7 @@ static inline void omap_init_sti(void) {} | |||
250 | 288 | ||
251 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) | 289 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) |
252 | 290 | ||
253 | #include <mach/mcspi.h> | 291 | #include <plat/mcspi.h> |
254 | 292 | ||
255 | #define OMAP2_MCSPI1_BASE 0x48098000 | 293 | #define OMAP2_MCSPI1_BASE 0x48098000 |
256 | #define OMAP2_MCSPI2_BASE 0x4809a000 | 294 | #define OMAP2_MCSPI2_BASE 0x4809a000 |
@@ -472,7 +510,12 @@ static struct platform_device dummy_pdev = { | |||
472 | **/ | 510 | **/ |
473 | static void __init omap_hsmmc_reset(void) | 511 | static void __init omap_hsmmc_reset(void) |
474 | { | 512 | { |
475 | u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC : | 513 | u32 i, nr_controllers; |
514 | |||
515 | if (cpu_is_omap242x()) | ||
516 | return; | ||
517 | |||
518 | nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC : | ||
476 | (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC); | 519 | (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC); |
477 | 520 | ||
478 | for (i = 0; i < nr_controllers; i++) { | 521 | for (i = 0; i < nr_controllers; i++) { |
@@ -575,29 +618,42 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
575 | } | 618 | } |
576 | } | 619 | } |
577 | 620 | ||
578 | if (cpu_is_omap3430()) { | 621 | if (cpu_is_omap34xx()) { |
579 | if (controller_nr == 0) { | 622 | if (controller_nr == 0) { |
580 | omap_cfg_reg(N28_3430_MMC1_CLK); | 623 | omap_mux_init_signal("sdmmc1_clk", |
581 | omap_cfg_reg(M27_3430_MMC1_CMD); | 624 | OMAP_PIN_INPUT_PULLUP); |
582 | omap_cfg_reg(N27_3430_MMC1_DAT0); | 625 | omap_mux_init_signal("sdmmc1_cmd", |
626 | OMAP_PIN_INPUT_PULLUP); | ||
627 | omap_mux_init_signal("sdmmc1_dat0", | ||
628 | OMAP_PIN_INPUT_PULLUP); | ||
583 | if (mmc_controller->slots[0].wires == 4 || | 629 | if (mmc_controller->slots[0].wires == 4 || |
584 | mmc_controller->slots[0].wires == 8) { | 630 | mmc_controller->slots[0].wires == 8) { |
585 | omap_cfg_reg(N26_3430_MMC1_DAT1); | 631 | omap_mux_init_signal("sdmmc1_dat1", |
586 | omap_cfg_reg(N25_3430_MMC1_DAT2); | 632 | OMAP_PIN_INPUT_PULLUP); |
587 | omap_cfg_reg(P28_3430_MMC1_DAT3); | 633 | omap_mux_init_signal("sdmmc1_dat2", |
634 | OMAP_PIN_INPUT_PULLUP); | ||
635 | omap_mux_init_signal("sdmmc1_dat3", | ||
636 | OMAP_PIN_INPUT_PULLUP); | ||
588 | } | 637 | } |
589 | if (mmc_controller->slots[0].wires == 8) { | 638 | if (mmc_controller->slots[0].wires == 8) { |
590 | omap_cfg_reg(P27_3430_MMC1_DAT4); | 639 | omap_mux_init_signal("sdmmc1_dat4", |
591 | omap_cfg_reg(P26_3430_MMC1_DAT5); | 640 | OMAP_PIN_INPUT_PULLUP); |
592 | omap_cfg_reg(R27_3430_MMC1_DAT6); | 641 | omap_mux_init_signal("sdmmc1_dat5", |
593 | omap_cfg_reg(R25_3430_MMC1_DAT7); | 642 | OMAP_PIN_INPUT_PULLUP); |
643 | omap_mux_init_signal("sdmmc1_dat6", | ||
644 | OMAP_PIN_INPUT_PULLUP); | ||
645 | omap_mux_init_signal("sdmmc1_dat7", | ||
646 | OMAP_PIN_INPUT_PULLUP); | ||
594 | } | 647 | } |
595 | } | 648 | } |
596 | if (controller_nr == 1) { | 649 | if (controller_nr == 1) { |
597 | /* MMC2 */ | 650 | /* MMC2 */ |
598 | omap_cfg_reg(AE2_3430_MMC2_CLK); | 651 | omap_mux_init_signal("sdmmc2_clk", |
599 | omap_cfg_reg(AG5_3430_MMC2_CMD); | 652 | OMAP_PIN_INPUT_PULLUP); |
600 | omap_cfg_reg(AH5_3430_MMC2_DAT0); | 653 | omap_mux_init_signal("sdmmc2_cmd", |
654 | OMAP_PIN_INPUT_PULLUP); | ||
655 | omap_mux_init_signal("sdmmc2_dat0", | ||
656 | OMAP_PIN_INPUT_PULLUP); | ||
601 | 657 | ||
602 | /* | 658 | /* |
603 | * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed | 659 | * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed |
@@ -605,9 +661,22 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
605 | */ | 661 | */ |
606 | if (mmc_controller->slots[0].wires == 4 || | 662 | if (mmc_controller->slots[0].wires == 4 || |
607 | mmc_controller->slots[0].wires == 8) { | 663 | mmc_controller->slots[0].wires == 8) { |
608 | omap_cfg_reg(AH4_3430_MMC2_DAT1); | 664 | omap_mux_init_signal("sdmmc2_dat1", |
609 | omap_cfg_reg(AG4_3430_MMC2_DAT2); | 665 | OMAP_PIN_INPUT_PULLUP); |
610 | omap_cfg_reg(AF4_3430_MMC2_DAT3); | 666 | omap_mux_init_signal("sdmmc2_dat2", |
667 | OMAP_PIN_INPUT_PULLUP); | ||
668 | omap_mux_init_signal("sdmmc2_dat3", | ||
669 | OMAP_PIN_INPUT_PULLUP); | ||
670 | } | ||
671 | if (mmc_controller->slots[0].wires == 8) { | ||
672 | omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4", | ||
673 | OMAP_PIN_INPUT_PULLUP); | ||
674 | omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5", | ||
675 | OMAP_PIN_INPUT_PULLUP); | ||
676 | omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6", | ||
677 | OMAP_PIN_INPUT_PULLUP); | ||
678 | omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7", | ||
679 | OMAP_PIN_INPUT_PULLUP); | ||
611 | } | 680 | } |
612 | } | 681 | } |
613 | 682 | ||
@@ -651,13 +720,13 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
651 | if (!cpu_is_omap44xx()) | 720 | if (!cpu_is_omap44xx()) |
652 | return; | 721 | return; |
653 | base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET; | 722 | base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET; |
654 | irq = INT_44XX_MMC4_IRQ; | 723 | irq = OMAP44XX_IRQ_MMC4; |
655 | break; | 724 | break; |
656 | case 4: | 725 | case 4: |
657 | if (!cpu_is_omap44xx()) | 726 | if (!cpu_is_omap44xx()) |
658 | return; | 727 | return; |
659 | base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; | 728 | base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; |
660 | irq = INT_44XX_MMC5_IRQ; | 729 | irq = OMAP44XX_IRQ_MMC5; |
661 | break; | 730 | break; |
662 | default: | 731 | default: |
663 | continue; | 732 | continue; |
@@ -669,7 +738,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
669 | } else if (cpu_is_omap44xx()) { | 738 | } else if (cpu_is_omap44xx()) { |
670 | if (i < 3) { | 739 | if (i < 3) { |
671 | base += OMAP4_MMC_REG_OFFSET; | 740 | base += OMAP4_MMC_REG_OFFSET; |
672 | irq += IRQ_GIC_START; | 741 | irq += OMAP44XX_IRQ_GIC_START; |
673 | } | 742 | } |
674 | size = OMAP4_HSMMC_SIZE; | 743 | size = OMAP4_HSMMC_SIZE; |
675 | name = "mmci-omap-hs"; | 744 | name = "mmci-omap-hs"; |