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-rw-r--r--arch/arm/mach-omap2/clock34xx.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 523978a58d4e..3344809e5fe5 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -322,22 +322,8 @@ static struct omap_clk omap34xx_clks[] = {
322 322
323#define MAX_DPLL_WAIT_TRIES 1000000 323#define MAX_DPLL_WAIT_TRIES 1000000
324 324
325#define MIN_SDRC_DLL_LOCK_FREQ 83000000
326
327#define CYCLES_PER_MHZ 1000000 325#define CYCLES_PER_MHZ 1000000
328 326
329/* Scale factor for fixed-point arith in omap3_core_dpll_m2_set_rate() */
330#define SDRC_MPURATE_SCALE 8
331
332/* 2^SDRC_MPURATE_BASE_SHIFT: MPU MHz that SDRC_MPURATE_LOOPS is defined for */
333#define SDRC_MPURATE_BASE_SHIFT 9
334
335/*
336 * SDRC_MPURATE_LOOPS: Number of MPU loops to execute at
337 * 2^MPURATE_BASE_SHIFT MHz for SDRC to stabilize
338 */
339#define SDRC_MPURATE_LOOPS 96
340
341/* 327/*
342 * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks 328 * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
343 * that are sourced by DPLL5, and both of these require this clock 329 * that are sourced by DPLL5, and both of these require this clock