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Diffstat (limited to 'arch/arm/mach-omap2/clock2430_data.c')
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c54
1 files changed, 27 insertions, 27 deletions
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0438b6e4f51a..2df50d97deb2 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -155,12 +155,12 @@ static struct clk apll54_ck = {
155/* func_54m_ck */ 155/* func_54m_ck */
156 156
157static const struct clksel_rate func_54m_apll54_rates[] = { 157static const struct clksel_rate func_54m_apll54_rates[] = {
158 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 158 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
159 { .div = 0 }, 159 { .div = 0 },
160}; 160};
161 161
162static const struct clksel_rate func_54m_alt_rates[] = { 162static const struct clksel_rate func_54m_alt_rates[] = {
163 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 163 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
164 { .div = 0 }, 164 { .div = 0 },
165}; 165};
166 166
@@ -177,7 +177,7 @@ static struct clk func_54m_ck = {
177 .clkdm_name = "wkup_clkdm", 177 .clkdm_name = "wkup_clkdm",
178 .init = &omap2_init_clksel_parent, 178 .init = &omap2_init_clksel_parent,
179 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 179 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
180 .clksel_mask = OMAP24XX_54M_SOURCE, 180 .clksel_mask = OMAP24XX_54M_SOURCE_MASK,
181 .clksel = func_54m_clksel, 181 .clksel = func_54m_clksel,
182 .recalc = &omap2_clksel_recalc, 182 .recalc = &omap2_clksel_recalc,
183}; 183};
@@ -192,12 +192,12 @@ static struct clk core_ck = {
192 192
193/* func_96m_ck */ 193/* func_96m_ck */
194static const struct clksel_rate func_96m_apll96_rates[] = { 194static const struct clksel_rate func_96m_apll96_rates[] = {
195 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 195 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
196 { .div = 0 }, 196 { .div = 0 },
197}; 197};
198 198
199static const struct clksel_rate func_96m_alt_rates[] = { 199static const struct clksel_rate func_96m_alt_rates[] = {
200 { .div = 1, .val = 1, .flags = RATE_IN_243X | DEFAULT_RATE }, 200 { .div = 1, .val = 1, .flags = RATE_IN_243X },
201 { .div = 0 }, 201 { .div = 0 },
202}; 202};
203 203
@@ -214,7 +214,7 @@ static struct clk func_96m_ck = {
214 .clkdm_name = "wkup_clkdm", 214 .clkdm_name = "wkup_clkdm",
215 .init = &omap2_init_clksel_parent, 215 .init = &omap2_init_clksel_parent,
216 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 216 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
217 .clksel_mask = OMAP2430_96M_SOURCE, 217 .clksel_mask = OMAP2430_96M_SOURCE_MASK,
218 .clksel = func_96m_clksel, 218 .clksel = func_96m_clksel,
219 .recalc = &omap2_clksel_recalc, 219 .recalc = &omap2_clksel_recalc,
220}; 220};
@@ -222,12 +222,12 @@ static struct clk func_96m_ck = {
222/* func_48m_ck */ 222/* func_48m_ck */
223 223
224static const struct clksel_rate func_48m_apll96_rates[] = { 224static const struct clksel_rate func_48m_apll96_rates[] = {
225 { .div = 2, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 225 { .div = 2, .val = 0, .flags = RATE_IN_24XX },
226 { .div = 0 }, 226 { .div = 0 },
227}; 227};
228 228
229static const struct clksel_rate func_48m_alt_rates[] = { 229static const struct clksel_rate func_48m_alt_rates[] = {
230 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 230 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
231 { .div = 0 }, 231 { .div = 0 },
232}; 232};
233 233
@@ -244,7 +244,7 @@ static struct clk func_48m_ck = {
244 .clkdm_name = "wkup_clkdm", 244 .clkdm_name = "wkup_clkdm",
245 .init = &omap2_init_clksel_parent, 245 .init = &omap2_init_clksel_parent,
246 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 246 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
247 .clksel_mask = OMAP24XX_48M_SOURCE, 247 .clksel_mask = OMAP24XX_48M_SOURCE_MASK,
248 .clksel = func_48m_clksel, 248 .clksel = func_48m_clksel,
249 .recalc = &omap2_clksel_recalc, 249 .recalc = &omap2_clksel_recalc,
250 .round_rate = &omap2_clksel_round_rate, 250 .round_rate = &omap2_clksel_round_rate,
@@ -277,22 +277,22 @@ static struct clk wdt1_osc_ck = {
277 * flags fields, which mark them as 2420-only. 277 * flags fields, which mark them as 2420-only.
278 */ 278 */
279static const struct clksel_rate common_clkout_src_core_rates[] = { 279static const struct clksel_rate common_clkout_src_core_rates[] = {
280 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 280 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
281 { .div = 0 } 281 { .div = 0 }
282}; 282};
283 283
284static const struct clksel_rate common_clkout_src_sys_rates[] = { 284static const struct clksel_rate common_clkout_src_sys_rates[] = {
285 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 285 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
286 { .div = 0 } 286 { .div = 0 }
287}; 287};
288 288
289static const struct clksel_rate common_clkout_src_96m_rates[] = { 289static const struct clksel_rate common_clkout_src_96m_rates[] = {
290 { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 290 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
291 { .div = 0 } 291 { .div = 0 }
292}; 292};
293 293
294static const struct clksel_rate common_clkout_src_54m_rates[] = { 294static const struct clksel_rate common_clkout_src_54m_rates[] = {
295 { .div = 1, .val = 3, .flags = RATE_IN_24XX | DEFAULT_RATE }, 295 { .div = 1, .val = 3, .flags = RATE_IN_24XX },
296 { .div = 0 } 296 { .div = 0 }
297}; 297};
298 298
@@ -321,7 +321,7 @@ static struct clk sys_clkout_src = {
321}; 321};
322 322
323static const struct clksel_rate common_clkout_rates[] = { 323static const struct clksel_rate common_clkout_rates[] = {
324 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 324 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
325 { .div = 2, .val = 1, .flags = RATE_IN_24XX }, 325 { .div = 2, .val = 1, .flags = RATE_IN_24XX },
326 { .div = 4, .val = 2, .flags = RATE_IN_24XX }, 326 { .div = 4, .val = 2, .flags = RATE_IN_24XX },
327 { .div = 8, .val = 3, .flags = RATE_IN_24XX }, 327 { .div = 8, .val = 3, .flags = RATE_IN_24XX },
@@ -369,7 +369,7 @@ static struct clk emul_ck = {
369 * 369 *
370 */ 370 */
371static const struct clksel_rate mpu_core_rates[] = { 371static const struct clksel_rate mpu_core_rates[] = {
372 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 372 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
373 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 373 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
374 { .div = 0 }, 374 { .div = 0 },
375}; 375};
@@ -402,7 +402,7 @@ static struct clk mpu_ck = { /* Control cpu */
402 * routed into a synchronizer and out of clocks abc. 402 * routed into a synchronizer and out of clocks abc.
403 */ 403 */
404static const struct clksel_rate dsp_fck_core_rates[] = { 404static const struct clksel_rate dsp_fck_core_rates[] = {
405 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 405 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
406 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 406 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
407 { .div = 3, .val = 3, .flags = RATE_IN_24XX }, 407 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
408 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 408 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
@@ -429,7 +429,7 @@ static struct clk dsp_fck = {
429 429
430/* DSP interface clock */ 430/* DSP interface clock */
431static const struct clksel_rate dsp_irate_ick_rates[] = { 431static const struct clksel_rate dsp_irate_ick_rates[] = {
432 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 432 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
433 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 433 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
434 { .div = 3, .val = 3, .flags = RATE_IN_243X }, 434 { .div = 3, .val = 3, .flags = RATE_IN_243X },
435 { .div = 0 }, 435 { .div = 0 },
@@ -481,7 +481,7 @@ static struct clk iva2_1_ick = {
481 */ 481 */
482static const struct clksel_rate core_l3_core_rates[] = { 482static const struct clksel_rate core_l3_core_rates[] = {
483 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 483 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
484 { .div = 4, .val = 4, .flags = RATE_IN_24XX | DEFAULT_RATE }, 484 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
485 { .div = 6, .val = 6, .flags = RATE_IN_24XX }, 485 { .div = 6, .val = 6, .flags = RATE_IN_24XX },
486 { .div = 0 } 486 { .div = 0 }
487}; 487};
@@ -505,7 +505,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
505/* usb_l4_ick */ 505/* usb_l4_ick */
506static const struct clksel_rate usb_l4_ick_core_l3_rates[] = { 506static const struct clksel_rate usb_l4_ick_core_l3_rates[] = {
507 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 507 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
508 { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 508 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
509 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 509 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
510 { .div = 0 } 510 { .div = 0 }
511}; 511};
@@ -537,7 +537,7 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */
537 * this domain. 537 * this domain.
538 */ 538 */
539static const struct clksel_rate l4_core_l3_rates[] = { 539static const struct clksel_rate l4_core_l3_rates[] = {
540 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 540 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
541 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 541 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
542 { .div = 0 } 542 { .div = 0 }
543}; 543};
@@ -568,7 +568,7 @@ static struct clk l4_ck = { /* used both as an ick and fck */
568 */ 568 */
569static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = { 569static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = {
570 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 570 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
571 { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 571 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
572 { .div = 3, .val = 3, .flags = RATE_IN_24XX }, 572 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
573 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 573 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
574 { .div = 5, .val = 5, .flags = RATE_IN_243X }, 574 { .div = 5, .val = 5, .flags = RATE_IN_243X },
@@ -673,7 +673,7 @@ static struct clk gfx_ick = {
673 */ 673 */
674static const struct clksel_rate mdm_ick_core_rates[] = { 674static const struct clksel_rate mdm_ick_core_rates[] = {
675 { .div = 1, .val = 1, .flags = RATE_IN_243X }, 675 { .div = 1, .val = 1, .flags = RATE_IN_243X },
676 { .div = 4, .val = 4, .flags = RATE_IN_243X | DEFAULT_RATE }, 676 { .div = 4, .val = 4, .flags = RATE_IN_243X },
677 { .div = 6, .val = 6, .flags = RATE_IN_243X }, 677 { .div = 6, .val = 6, .flags = RATE_IN_243X },
678 { .div = 9, .val = 9, .flags = RATE_IN_243X }, 678 { .div = 9, .val = 9, .flags = RATE_IN_243X },
679 { .div = 0 } 679 { .div = 0 }
@@ -718,7 +718,7 @@ static struct clk mdm_osc_ck = {
718/* XXX Add RATE_NOT_VALIDATED */ 718/* XXX Add RATE_NOT_VALIDATED */
719 719
720static const struct clksel_rate dss1_fck_sys_rates[] = { 720static const struct clksel_rate dss1_fck_sys_rates[] = {
721 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 721 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
722 { .div = 0 } 722 { .div = 0 }
723}; 723};
724 724
@@ -732,7 +732,7 @@ static const struct clksel_rate dss1_fck_core_rates[] = {
732 { .div = 8, .val = 8, .flags = RATE_IN_24XX }, 732 { .div = 8, .val = 8, .flags = RATE_IN_24XX },
733 { .div = 9, .val = 9, .flags = RATE_IN_24XX }, 733 { .div = 9, .val = 9, .flags = RATE_IN_24XX },
734 { .div = 12, .val = 12, .flags = RATE_IN_24XX }, 734 { .div = 12, .val = 12, .flags = RATE_IN_24XX },
735 { .div = 16, .val = 16, .flags = RATE_IN_24XX | DEFAULT_RATE }, 735 { .div = 16, .val = 16, .flags = RATE_IN_24XX },
736 { .div = 0 } 736 { .div = 0 }
737}; 737};
738 738
@@ -767,12 +767,12 @@ static struct clk dss1_fck = {
767}; 767};
768 768
769static const struct clksel_rate dss2_fck_sys_rates[] = { 769static const struct clksel_rate dss2_fck_sys_rates[] = {
770 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 770 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
771 { .div = 0 } 771 { .div = 0 }
772}; 772};
773 773
774static const struct clksel_rate dss2_fck_48m_rates[] = { 774static const struct clksel_rate dss2_fck_48m_rates[] = {
775 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 775 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
776 { .div = 0 } 776 { .div = 0 }
777}; 777};
778 778
@@ -813,7 +813,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */
813 * functional clock parents. 813 * functional clock parents.
814 */ 814 */
815static const struct clksel_rate gpt_alt_rates[] = { 815static const struct clksel_rate gpt_alt_rates[] = {
816 { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 816 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
817 { .div = 0 } 817 { .div = 0 }
818}; 818};
819 819