aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/clock.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2/clock.h')
-rw-r--r--arch/arm/mach-omap2/clock.h37
1 files changed, 19 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 6cab20b1d3c1..6c78d471fab7 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -33,20 +33,6 @@ static u32 omap2_clksel_get_divisor(struct clk *clk);
33#define RATE_IN_242X (1 << 0) 33#define RATE_IN_242X (1 << 0)
34#define RATE_IN_243X (1 << 1) 34#define RATE_IN_243X (1 << 1)
35 35
36/* Memory timings */
37#define M_DDR 1
38#define M_LOCK_CTRL (1 << 2)
39#define M_UNLOCK 0
40#define M_LOCK 1
41
42struct memory_timings {
43 u32 m_type; /* ddr = 1, sdr = 0 */
44 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */
45 u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */
46 u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */
47 u32 base_cs; /* base chip select to use for calculations */
48};
49
50/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. 36/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
51 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP 37 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
52 * CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL CM_CLKSEL2_PLL, CM_CLKSEL_MDM 38 * CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL CM_CLKSEL2_PLL, CM_CLKSEL_MDM
@@ -731,6 +717,16 @@ static struct clk sys_clkout2 = {
731 .recalc = &omap2_clksel_recalc, 717 .recalc = &omap2_clksel_recalc,
732}; 718};
733 719
720static struct clk emul_ck = {
721 .name = "emul_ck",
722 .parent = &func_54m_ck,
723 .flags = CLOCK_IN_OMAP242X,
724 .enable_reg = (void __iomem *)&PRCM_CLKEMUL_CTRL,
725 .enable_bit = 0,
726 .recalc = &omap2_propagate_rate,
727
728};
729
734/* 730/*
735 * MPU clock domain 731 * MPU clock domain
736 * Clocks: 732 * Clocks:
@@ -1702,7 +1698,8 @@ static struct clk hdq_fck = {
1702}; 1698};
1703 1699
1704static struct clk i2c2_ick = { 1700static struct clk i2c2_ick = {
1705 .name = "i2c2_ick", 1701 .name = "i2c_ick",
1702 .id = 2,
1706 .parent = &l4_ck, 1703 .parent = &l4_ck,
1707 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1704 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1708 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, 1705 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1711,7 +1708,8 @@ static struct clk i2c2_ick = {
1711}; 1708};
1712 1709
1713static struct clk i2c2_fck = { 1710static struct clk i2c2_fck = {
1714 .name = "i2c2_fck", 1711 .name = "i2c_fck",
1712 .id = 2,
1715 .parent = &func_12m_ck, 1713 .parent = &func_12m_ck,
1716 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1714 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1717 .enable_reg = (void __iomem *)&CM_FCLKEN1_CORE, 1715 .enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1729,7 +1727,8 @@ static struct clk i2chs2_fck = {
1729}; 1727};
1730 1728
1731static struct clk i2c1_ick = { 1729static struct clk i2c1_ick = {
1732 .name = "i2c1_ick", 1730 .name = "i2c_ick",
1731 .id = 1,
1733 .parent = &l4_ck, 1732 .parent = &l4_ck,
1734 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1733 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1735 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, 1734 .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1738,7 +1737,8 @@ static struct clk i2c1_ick = {
1738}; 1737};
1739 1738
1740static struct clk i2c1_fck = { 1739static struct clk i2c1_fck = {
1741 .name = "i2c1_fck", 1740 .name = "i2c_fck",
1741 .id = 1,
1742 .parent = &func_12m_ck, 1742 .parent = &func_12m_ck,
1743 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1743 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1744 .enable_reg = (void __iomem *)&CM_FCLKEN1_CORE, 1744 .enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1971,6 +1971,7 @@ static struct clk *onchip_clks[] = {
1971 &wdt1_osc_ck, 1971 &wdt1_osc_ck,
1972 &sys_clkout, 1972 &sys_clkout,
1973 &sys_clkout2, 1973 &sys_clkout2,
1974 &emul_ck,
1974 /* mpu domain clocks */ 1975 /* mpu domain clocks */
1975 &mpu_ck, 1976 &mpu_ck,
1976 /* dsp domain clocks */ 1977 /* dsp domain clocks */