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-rw-r--r--arch/arm/mach-omap2/clock.c28
1 files changed, 13 insertions, 15 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ea3f565ba1a4..e97f98ffe8b2 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -22,14 +22,16 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/bitops.h> 24#include <linux/bitops.h>
25#include <trace/events/power.h>
26 25
27#include <asm/cpu.h> 26#include <asm/cpu.h>
27
28#include <plat/clock.h> 28#include <plat/clock.h>
29#include "clockdomain.h"
30#include <plat/cpu.h>
31#include <plat/prcm.h> 29#include <plat/prcm.h>
32 30
31#include <trace/events/power.h>
32
33#include "soc.h"
34#include "clockdomain.h"
33#include "clock.h" 35#include "clock.h"
34#include "cm2xxx_3xxx.h" 36#include "cm2xxx_3xxx.h"
35#include "cm-regbits-24xx.h" 37#include "cm-regbits-24xx.h"
@@ -102,8 +104,8 @@ void omap2_init_clk_clkdm(struct clk *clk)
102 clk->name, clk->clkdm_name); 104 clk->name, clk->clkdm_name);
103 clk->clkdm = clkdm; 105 clk->clkdm = clkdm;
104 } else { 106 } else {
105 pr_debug("clock: could not associate clk %s to " 107 pr_debug("clock: could not associate clk %s to clkdm %s\n",
106 "clkdm %s\n", clk->name, clk->clkdm_name); 108 clk->name, clk->clkdm_name);
107 } 109 }
108} 110}
109 111
@@ -226,8 +228,7 @@ void omap2_dflt_clk_disable(struct clk *clk)
226 * 'Independent' here refers to a clock which is not 228 * 'Independent' here refers to a clock which is not
227 * controlled by its parent. 229 * controlled by its parent.
228 */ 230 */
229 printk(KERN_ERR "clock: clk_disable called on independent " 231 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name);
230 "clock %s which has no enable_reg\n", clk->name);
231 return; 232 return;
232 } 233 }
233 234
@@ -270,8 +271,7 @@ const struct clkops clkops_omap2_dflt = {
270void omap2_clk_disable(struct clk *clk) 271void omap2_clk_disable(struct clk *clk)
271{ 272{
272 if (clk->usecount == 0) { 273 if (clk->usecount == 0) {
273 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount " 274 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name);
274 "already 0?", clk->name);
275 return; 275 return;
276 } 276 }
277 277
@@ -332,8 +332,8 @@ int omap2_clk_enable(struct clk *clk)
332 if (clkdm_control && clk->clkdm) { 332 if (clkdm_control && clk->clkdm) {
333 ret = clkdm_clk_enable(clk->clkdm, clk); 333 ret = clkdm_clk_enable(clk->clkdm, clk);
334 if (ret) { 334 if (ret) {
335 WARN(1, "clock: %s: could not enable clockdomain %s: " 335 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n",
336 "%d\n", clk->name, clk->clkdm->name, ret); 336 clk->name, clk->clkdm->name, ret);
337 goto oce_err2; 337 goto oce_err2;
338 } 338 }
339 } 339 }
@@ -501,10 +501,8 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
501 501
502 hfclkin_rate = clk_get_rate(hfclkin_ck); 502 hfclkin_rate = clk_get_rate(hfclkin_ck);
503 503
504 pr_info("Switched to new clocking rate (Crystal/Core/MPU): " 504 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
505 "%ld.%01ld/%ld/%ld MHz\n", 505 (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
506 (hfclkin_rate / 1000000),
507 ((hfclkin_rate / 100000) % 10),
508 (clk_get_rate(core_ck) / 1000000), 506 (clk_get_rate(core_ck) / 1000000),
509 (clk_get_rate(mpu_ck) / 1000000)); 507 (clk_get_rate(mpu_ck) / 1000000));
510} 508}