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-rw-r--r--arch/arm/mach-omap1/clock.h168
1 files changed, 84 insertions, 84 deletions
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index f3bdfb50e01a..4f18d1b94449 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -13,8 +13,8 @@
13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H 13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H 14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15 15
16static int omap1_clk_enable(struct clk * clk); 16static int omap1_clk_enable_generic(struct clk * clk);
17static void omap1_clk_disable(struct clk * clk); 17static void omap1_clk_disable_generic(struct clk * clk);
18static void omap1_ckctl_recalc(struct clk * clk); 18static void omap1_ckctl_recalc(struct clk * clk);
19static void omap1_watchdog_recalc(struct clk * clk); 19static void omap1_watchdog_recalc(struct clk * clk);
20static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); 20static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
@@ -30,8 +30,8 @@ static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
30static void omap1_init_ext_clk(struct clk * clk); 30static void omap1_init_ext_clk(struct clk * clk);
31static int omap1_select_table_rate(struct clk * clk, unsigned long rate); 31static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
32static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); 32static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
33static int omap1_clk_use(struct clk *clk); 33static int omap1_clk_enable(struct clk *clk);
34static void omap1_clk_unuse(struct clk *clk); 34static void omap1_clk_disable(struct clk *clk);
35 35
36struct mpu_rate { 36struct mpu_rate {
37 unsigned long rate; 37 unsigned long rate;
@@ -152,8 +152,8 @@ static struct clk ck_ref = {
152 .rate = 12000000, 152 .rate = 12000000,
153 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 153 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
154 ALWAYS_ENABLED, 154 ALWAYS_ENABLED,
155 .enable = &omap1_clk_enable, 155 .enable = &omap1_clk_enable_generic,
156 .disable = &omap1_clk_disable, 156 .disable = &omap1_clk_disable_generic,
157}; 157};
158 158
159static struct clk ck_dpll1 = { 159static struct clk ck_dpll1 = {
@@ -161,8 +161,8 @@ static struct clk ck_dpll1 = {
161 .parent = &ck_ref, 161 .parent = &ck_ref,
162 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 162 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
163 RATE_PROPAGATES | ALWAYS_ENABLED, 163 RATE_PROPAGATES | ALWAYS_ENABLED,
164 .enable = &omap1_clk_enable, 164 .enable = &omap1_clk_enable_generic,
165 .disable = &omap1_clk_disable, 165 .disable = &omap1_clk_disable_generic,
166}; 166};
167 167
168static struct arm_idlect1_clk ck_dpll1out = { 168static struct arm_idlect1_clk ck_dpll1out = {
@@ -173,8 +173,8 @@ static struct arm_idlect1_clk ck_dpll1out = {
173 .enable_reg = (void __iomem *)ARM_IDLECT2, 173 .enable_reg = (void __iomem *)ARM_IDLECT2,
174 .enable_bit = EN_CKOUT_ARM, 174 .enable_bit = EN_CKOUT_ARM,
175 .recalc = &followparent_recalc, 175 .recalc = &followparent_recalc,
176 .enable = &omap1_clk_enable, 176 .enable = &omap1_clk_enable_generic,
177 .disable = &omap1_clk_disable, 177 .disable = &omap1_clk_disable_generic,
178 }, 178 },
179 .idlect_shift = 12, 179 .idlect_shift = 12,
180}; 180};
@@ -186,8 +186,8 @@ static struct clk arm_ck = {
186 RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED, 186 RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
187 .rate_offset = CKCTL_ARMDIV_OFFSET, 187 .rate_offset = CKCTL_ARMDIV_OFFSET,
188 .recalc = &omap1_ckctl_recalc, 188 .recalc = &omap1_ckctl_recalc,
189 .enable = &omap1_clk_enable, 189 .enable = &omap1_clk_enable_generic,
190 .disable = &omap1_clk_disable, 190 .disable = &omap1_clk_disable_generic,
191}; 191};
192 192
193static struct arm_idlect1_clk armper_ck = { 193static struct arm_idlect1_clk armper_ck = {
@@ -200,8 +200,8 @@ static struct arm_idlect1_clk armper_ck = {
200 .enable_bit = EN_PERCK, 200 .enable_bit = EN_PERCK,
201 .rate_offset = CKCTL_PERDIV_OFFSET, 201 .rate_offset = CKCTL_PERDIV_OFFSET,
202 .recalc = &omap1_ckctl_recalc, 202 .recalc = &omap1_ckctl_recalc,
203 .enable = &omap1_clk_enable, 203 .enable = &omap1_clk_enable_generic,
204 .disable = &omap1_clk_disable, 204 .disable = &omap1_clk_disable_generic,
205 }, 205 },
206 .idlect_shift = 2, 206 .idlect_shift = 2,
207}; 207};
@@ -213,8 +213,8 @@ static struct clk arm_gpio_ck = {
213 .enable_reg = (void __iomem *)ARM_IDLECT2, 213 .enable_reg = (void __iomem *)ARM_IDLECT2,
214 .enable_bit = EN_GPIOCK, 214 .enable_bit = EN_GPIOCK,
215 .recalc = &followparent_recalc, 215 .recalc = &followparent_recalc,
216 .enable = &omap1_clk_enable, 216 .enable = &omap1_clk_enable_generic,
217 .disable = &omap1_clk_disable, 217 .disable = &omap1_clk_disable_generic,
218}; 218};
219 219
220static struct arm_idlect1_clk armxor_ck = { 220static struct arm_idlect1_clk armxor_ck = {
@@ -226,8 +226,8 @@ static struct arm_idlect1_clk armxor_ck = {
226 .enable_reg = (void __iomem *)ARM_IDLECT2, 226 .enable_reg = (void __iomem *)ARM_IDLECT2,
227 .enable_bit = EN_XORPCK, 227 .enable_bit = EN_XORPCK,
228 .recalc = &followparent_recalc, 228 .recalc = &followparent_recalc,
229 .enable = &omap1_clk_enable, 229 .enable = &omap1_clk_enable_generic,
230 .disable = &omap1_clk_disable, 230 .disable = &omap1_clk_disable_generic,
231 }, 231 },
232 .idlect_shift = 1, 232 .idlect_shift = 1,
233}; 233};
@@ -241,8 +241,8 @@ static struct arm_idlect1_clk armtim_ck = {
241 .enable_reg = (void __iomem *)ARM_IDLECT2, 241 .enable_reg = (void __iomem *)ARM_IDLECT2,
242 .enable_bit = EN_TIMCK, 242 .enable_bit = EN_TIMCK,
243 .recalc = &followparent_recalc, 243 .recalc = &followparent_recalc,
244 .enable = &omap1_clk_enable, 244 .enable = &omap1_clk_enable_generic,
245 .disable = &omap1_clk_disable, 245 .disable = &omap1_clk_disable_generic,
246 }, 246 },
247 .idlect_shift = 9, 247 .idlect_shift = 9,
248}; 248};
@@ -256,8 +256,8 @@ static struct arm_idlect1_clk armwdt_ck = {
256 .enable_reg = (void __iomem *)ARM_IDLECT2, 256 .enable_reg = (void __iomem *)ARM_IDLECT2,
257 .enable_bit = EN_WDTCK, 257 .enable_bit = EN_WDTCK,
258 .recalc = &omap1_watchdog_recalc, 258 .recalc = &omap1_watchdog_recalc,
259 .enable = &omap1_clk_enable, 259 .enable = &omap1_clk_enable_generic,
260 .disable = &omap1_clk_disable, 260 .disable = &omap1_clk_disable_generic,
261 }, 261 },
262 .idlect_shift = 0, 262 .idlect_shift = 0,
263}; 263};
@@ -272,8 +272,8 @@ static struct clk arminth_ck16xx = {
272 * 272 *
273 * 1510 version is in TC clocks. 273 * 1510 version is in TC clocks.
274 */ 274 */
275 .enable = &omap1_clk_enable, 275 .enable = &omap1_clk_enable_generic,
276 .disable = &omap1_clk_disable, 276 .disable = &omap1_clk_disable_generic,
277}; 277};
278 278
279static struct clk dsp_ck = { 279static struct clk dsp_ck = {
@@ -285,8 +285,8 @@ static struct clk dsp_ck = {
285 .enable_bit = EN_DSPCK, 285 .enable_bit = EN_DSPCK,
286 .rate_offset = CKCTL_DSPDIV_OFFSET, 286 .rate_offset = CKCTL_DSPDIV_OFFSET,
287 .recalc = &omap1_ckctl_recalc, 287 .recalc = &omap1_ckctl_recalc,
288 .enable = &omap1_clk_enable, 288 .enable = &omap1_clk_enable_generic,
289 .disable = &omap1_clk_disable, 289 .disable = &omap1_clk_disable_generic,
290}; 290};
291 291
292static struct clk dspmmu_ck = { 292static struct clk dspmmu_ck = {
@@ -296,8 +296,8 @@ static struct clk dspmmu_ck = {
296 RATE_CKCTL | ALWAYS_ENABLED, 296 RATE_CKCTL | ALWAYS_ENABLED,
297 .rate_offset = CKCTL_DSPMMUDIV_OFFSET, 297 .rate_offset = CKCTL_DSPMMUDIV_OFFSET,
298 .recalc = &omap1_ckctl_recalc, 298 .recalc = &omap1_ckctl_recalc,
299 .enable = &omap1_clk_enable, 299 .enable = &omap1_clk_enable_generic,
300 .disable = &omap1_clk_disable, 300 .disable = &omap1_clk_disable_generic,
301}; 301};
302 302
303static struct clk dspper_ck = { 303static struct clk dspper_ck = {
@@ -349,8 +349,8 @@ static struct arm_idlect1_clk tc_ck = {
349 CLOCK_IDLE_CONTROL, 349 CLOCK_IDLE_CONTROL,
350 .rate_offset = CKCTL_TCDIV_OFFSET, 350 .rate_offset = CKCTL_TCDIV_OFFSET,
351 .recalc = &omap1_ckctl_recalc, 351 .recalc = &omap1_ckctl_recalc,
352 .enable = &omap1_clk_enable, 352 .enable = &omap1_clk_enable_generic,
353 .disable = &omap1_clk_disable, 353 .disable = &omap1_clk_disable_generic,
354 }, 354 },
355 .idlect_shift = 6, 355 .idlect_shift = 6,
356}; 356};
@@ -364,8 +364,8 @@ static struct clk arminth_ck1510 = {
364 * 364 *
365 * 16xx version is in MPU clocks. 365 * 16xx version is in MPU clocks.
366 */ 366 */
367 .enable = &omap1_clk_enable, 367 .enable = &omap1_clk_enable_generic,
368 .disable = &omap1_clk_disable, 368 .disable = &omap1_clk_disable_generic,
369}; 369};
370 370
371static struct clk tipb_ck = { 371static struct clk tipb_ck = {
@@ -374,8 +374,8 @@ static struct clk tipb_ck = {
374 .parent = &tc_ck.clk, 374 .parent = &tc_ck.clk,
375 .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, 375 .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
376 .recalc = &followparent_recalc, 376 .recalc = &followparent_recalc,
377 .enable = &omap1_clk_enable, 377 .enable = &omap1_clk_enable_generic,
378 .disable = &omap1_clk_disable, 378 .disable = &omap1_clk_disable_generic,
379}; 379};
380 380
381static struct clk l3_ocpi_ck = { 381static struct clk l3_ocpi_ck = {
@@ -386,8 +386,8 @@ static struct clk l3_ocpi_ck = {
386 .enable_reg = (void __iomem *)ARM_IDLECT3, 386 .enable_reg = (void __iomem *)ARM_IDLECT3,
387 .enable_bit = EN_OCPI_CK, 387 .enable_bit = EN_OCPI_CK,
388 .recalc = &followparent_recalc, 388 .recalc = &followparent_recalc,
389 .enable = &omap1_clk_enable, 389 .enable = &omap1_clk_enable_generic,
390 .disable = &omap1_clk_disable, 390 .disable = &omap1_clk_disable_generic,
391}; 391};
392 392
393static struct clk tc1_ck = { 393static struct clk tc1_ck = {
@@ -397,8 +397,8 @@ static struct clk tc1_ck = {
397 .enable_reg = (void __iomem *)ARM_IDLECT3, 397 .enable_reg = (void __iomem *)ARM_IDLECT3,
398 .enable_bit = EN_TC1_CK, 398 .enable_bit = EN_TC1_CK,
399 .recalc = &followparent_recalc, 399 .recalc = &followparent_recalc,
400 .enable = &omap1_clk_enable, 400 .enable = &omap1_clk_enable_generic,
401 .disable = &omap1_clk_disable, 401 .disable = &omap1_clk_disable_generic,
402}; 402};
403 403
404static struct clk tc2_ck = { 404static struct clk tc2_ck = {
@@ -408,8 +408,8 @@ static struct clk tc2_ck = {
408 .enable_reg = (void __iomem *)ARM_IDLECT3, 408 .enable_reg = (void __iomem *)ARM_IDLECT3,
409 .enable_bit = EN_TC2_CK, 409 .enable_bit = EN_TC2_CK,
410 .recalc = &followparent_recalc, 410 .recalc = &followparent_recalc,
411 .enable = &omap1_clk_enable, 411 .enable = &omap1_clk_enable_generic,
412 .disable = &omap1_clk_disable, 412 .disable = &omap1_clk_disable_generic,
413}; 413};
414 414
415static struct clk dma_ck = { 415static struct clk dma_ck = {
@@ -419,8 +419,8 @@ static struct clk dma_ck = {
419 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 419 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
420 ALWAYS_ENABLED, 420 ALWAYS_ENABLED,
421 .recalc = &followparent_recalc, 421 .recalc = &followparent_recalc,
422 .enable = &omap1_clk_enable, 422 .enable = &omap1_clk_enable_generic,
423 .disable = &omap1_clk_disable, 423 .disable = &omap1_clk_disable_generic,
424}; 424};
425 425
426static struct clk dma_lcdfree_ck = { 426static struct clk dma_lcdfree_ck = {
@@ -428,8 +428,8 @@ static struct clk dma_lcdfree_ck = {
428 .parent = &tc_ck.clk, 428 .parent = &tc_ck.clk,
429 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, 429 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
430 .recalc = &followparent_recalc, 430 .recalc = &followparent_recalc,
431 .enable = &omap1_clk_enable, 431 .enable = &omap1_clk_enable_generic,
432 .disable = &omap1_clk_disable, 432 .disable = &omap1_clk_disable_generic,
433}; 433};
434 434
435static struct arm_idlect1_clk api_ck = { 435static struct arm_idlect1_clk api_ck = {
@@ -441,8 +441,8 @@ static struct arm_idlect1_clk api_ck = {
441 .enable_reg = (void __iomem *)ARM_IDLECT2, 441 .enable_reg = (void __iomem *)ARM_IDLECT2,
442 .enable_bit = EN_APICK, 442 .enable_bit = EN_APICK,
443 .recalc = &followparent_recalc, 443 .recalc = &followparent_recalc,
444 .enable = &omap1_clk_enable, 444 .enable = &omap1_clk_enable_generic,
445 .disable = &omap1_clk_disable, 445 .disable = &omap1_clk_disable_generic,
446 }, 446 },
447 .idlect_shift = 8, 447 .idlect_shift = 8,
448}; 448};
@@ -455,8 +455,8 @@ static struct arm_idlect1_clk lb_ck = {
455 .enable_reg = (void __iomem *)ARM_IDLECT2, 455 .enable_reg = (void __iomem *)ARM_IDLECT2,
456 .enable_bit = EN_LBCK, 456 .enable_bit = EN_LBCK,
457 .recalc = &followparent_recalc, 457 .recalc = &followparent_recalc,
458 .enable = &omap1_clk_enable, 458 .enable = &omap1_clk_enable_generic,
459 .disable = &omap1_clk_disable, 459 .disable = &omap1_clk_disable_generic,
460 }, 460 },
461 .idlect_shift = 4, 461 .idlect_shift = 4,
462}; 462};
@@ -466,8 +466,8 @@ static struct clk rhea1_ck = {
466 .parent = &tc_ck.clk, 466 .parent = &tc_ck.clk,
467 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, 467 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
468 .recalc = &followparent_recalc, 468 .recalc = &followparent_recalc,
469 .enable = &omap1_clk_enable, 469 .enable = &omap1_clk_enable_generic,
470 .disable = &omap1_clk_disable, 470 .disable = &omap1_clk_disable_generic,
471}; 471};
472 472
473static struct clk rhea2_ck = { 473static struct clk rhea2_ck = {
@@ -475,8 +475,8 @@ static struct clk rhea2_ck = {
475 .parent = &tc_ck.clk, 475 .parent = &tc_ck.clk,
476 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, 476 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
477 .recalc = &followparent_recalc, 477 .recalc = &followparent_recalc,
478 .enable = &omap1_clk_enable, 478 .enable = &omap1_clk_enable_generic,
479 .disable = &omap1_clk_disable, 479 .disable = &omap1_clk_disable_generic,
480}; 480};
481 481
482static struct clk lcd_ck_16xx = { 482static struct clk lcd_ck_16xx = {
@@ -487,8 +487,8 @@ static struct clk lcd_ck_16xx = {
487 .enable_bit = EN_LCDCK, 487 .enable_bit = EN_LCDCK,
488 .rate_offset = CKCTL_LCDDIV_OFFSET, 488 .rate_offset = CKCTL_LCDDIV_OFFSET,
489 .recalc = &omap1_ckctl_recalc, 489 .recalc = &omap1_ckctl_recalc,
490 .enable = &omap1_clk_enable, 490 .enable = &omap1_clk_enable_generic,
491 .disable = &omap1_clk_disable, 491 .disable = &omap1_clk_disable_generic,
492}; 492};
493 493
494static struct arm_idlect1_clk lcd_ck_1510 = { 494static struct arm_idlect1_clk lcd_ck_1510 = {
@@ -501,8 +501,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
501 .enable_bit = EN_LCDCK, 501 .enable_bit = EN_LCDCK,
502 .rate_offset = CKCTL_LCDDIV_OFFSET, 502 .rate_offset = CKCTL_LCDDIV_OFFSET,
503 .recalc = &omap1_ckctl_recalc, 503 .recalc = &omap1_ckctl_recalc,
504 .enable = &omap1_clk_enable, 504 .enable = &omap1_clk_enable_generic,
505 .disable = &omap1_clk_disable, 505 .disable = &omap1_clk_disable_generic,
506 }, 506 },
507 .idlect_shift = 3, 507 .idlect_shift = 3,
508}; 508};
@@ -518,8 +518,8 @@ static struct clk uart1_1510 = {
518 .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ 518 .enable_bit = 29, /* Chooses between 12MHz and 48MHz */
519 .set_rate = &omap1_set_uart_rate, 519 .set_rate = &omap1_set_uart_rate,
520 .recalc = &omap1_uart_recalc, 520 .recalc = &omap1_uart_recalc,
521 .enable = &omap1_clk_enable, 521 .enable = &omap1_clk_enable_generic,
522 .disable = &omap1_clk_disable, 522 .disable = &omap1_clk_disable_generic,
523}; 523};
524 524
525static struct uart_clk uart1_16xx = { 525static struct uart_clk uart1_16xx = {
@@ -550,8 +550,8 @@ static struct clk uart2_ck = {
550 .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ 550 .enable_bit = 30, /* Chooses between 12MHz and 48MHz */
551 .set_rate = &omap1_set_uart_rate, 551 .set_rate = &omap1_set_uart_rate,
552 .recalc = &omap1_uart_recalc, 552 .recalc = &omap1_uart_recalc,
553 .enable = &omap1_clk_enable, 553 .enable = &omap1_clk_enable_generic,
554 .disable = &omap1_clk_disable, 554 .disable = &omap1_clk_disable_generic,
555}; 555};
556 556
557static struct clk uart3_1510 = { 557static struct clk uart3_1510 = {
@@ -565,8 +565,8 @@ static struct clk uart3_1510 = {
565 .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ 565 .enable_bit = 31, /* Chooses between 12MHz and 48MHz */
566 .set_rate = &omap1_set_uart_rate, 566 .set_rate = &omap1_set_uart_rate,
567 .recalc = &omap1_uart_recalc, 567 .recalc = &omap1_uart_recalc,
568 .enable = &omap1_clk_enable, 568 .enable = &omap1_clk_enable_generic,
569 .disable = &omap1_clk_disable, 569 .disable = &omap1_clk_disable_generic,
570}; 570};
571 571
572static struct uart_clk uart3_16xx = { 572static struct uart_clk uart3_16xx = {
@@ -593,8 +593,8 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
593 RATE_FIXED | ENABLE_REG_32BIT, 593 RATE_FIXED | ENABLE_REG_32BIT,
594 .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, 594 .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
595 .enable_bit = USB_MCLK_EN_BIT, 595 .enable_bit = USB_MCLK_EN_BIT,
596 .enable = &omap1_clk_enable, 596 .enable = &omap1_clk_enable_generic,
597 .disable = &omap1_clk_disable, 597 .disable = &omap1_clk_disable_generic,
598}; 598};
599 599
600static struct clk usb_hhc_ck1510 = { 600static struct clk usb_hhc_ck1510 = {
@@ -605,8 +605,8 @@ static struct clk usb_hhc_ck1510 = {
605 RATE_FIXED | ENABLE_REG_32BIT, 605 RATE_FIXED | ENABLE_REG_32BIT,
606 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, 606 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
607 .enable_bit = USB_HOST_HHC_UHOST_EN, 607 .enable_bit = USB_HOST_HHC_UHOST_EN,
608 .enable = &omap1_clk_enable, 608 .enable = &omap1_clk_enable_generic,
609 .disable = &omap1_clk_disable, 609 .disable = &omap1_clk_disable_generic,
610}; 610};
611 611
612static struct clk usb_hhc_ck16xx = { 612static struct clk usb_hhc_ck16xx = {
@@ -618,8 +618,8 @@ static struct clk usb_hhc_ck16xx = {
618 RATE_FIXED | ENABLE_REG_32BIT, 618 RATE_FIXED | ENABLE_REG_32BIT,
619 .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */, 619 .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
620 .enable_bit = 8 /* UHOST_EN */, 620 .enable_bit = 8 /* UHOST_EN */,
621 .enable = &omap1_clk_enable, 621 .enable = &omap1_clk_enable_generic,
622 .disable = &omap1_clk_disable, 622 .disable = &omap1_clk_disable_generic,
623}; 623};
624 624
625static struct clk usb_dc_ck = { 625static struct clk usb_dc_ck = {
@@ -629,8 +629,8 @@ static struct clk usb_dc_ck = {
629 .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, 629 .flags = CLOCK_IN_OMAP16XX | RATE_FIXED,
630 .enable_reg = (void __iomem *)SOFT_REQ_REG, 630 .enable_reg = (void __iomem *)SOFT_REQ_REG,
631 .enable_bit = 4, 631 .enable_bit = 4,
632 .enable = &omap1_clk_enable, 632 .enable = &omap1_clk_enable_generic,
633 .disable = &omap1_clk_disable, 633 .disable = &omap1_clk_disable_generic,
634}; 634};
635 635
636static struct clk mclk_1510 = { 636static struct clk mclk_1510 = {
@@ -638,8 +638,8 @@ static struct clk mclk_1510 = {
638 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 638 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
639 .rate = 12000000, 639 .rate = 12000000,
640 .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, 640 .flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
641 .enable = &omap1_clk_enable, 641 .enable = &omap1_clk_enable_generic,
642 .disable = &omap1_clk_disable, 642 .disable = &omap1_clk_disable_generic,
643}; 643};
644 644
645static struct clk mclk_16xx = { 645static struct clk mclk_16xx = {
@@ -651,8 +651,8 @@ static struct clk mclk_16xx = {
651 .set_rate = &omap1_set_ext_clk_rate, 651 .set_rate = &omap1_set_ext_clk_rate,
652 .round_rate = &omap1_round_ext_clk_rate, 652 .round_rate = &omap1_round_ext_clk_rate,
653 .init = &omap1_init_ext_clk, 653 .init = &omap1_init_ext_clk,
654 .enable = &omap1_clk_enable, 654 .enable = &omap1_clk_enable_generic,
655 .disable = &omap1_clk_disable, 655 .disable = &omap1_clk_disable_generic,
656}; 656};
657 657
658static struct clk bclk_1510 = { 658static struct clk bclk_1510 = {
@@ -660,8 +660,8 @@ static struct clk bclk_1510 = {
660 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 660 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
661 .rate = 12000000, 661 .rate = 12000000,
662 .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, 662 .flags = CLOCK_IN_OMAP1510 | RATE_FIXED,
663 .enable = &omap1_clk_enable, 663 .enable = &omap1_clk_enable_generic,
664 .disable = &omap1_clk_disable, 664 .disable = &omap1_clk_disable_generic,
665}; 665};
666 666
667static struct clk bclk_16xx = { 667static struct clk bclk_16xx = {
@@ -673,8 +673,8 @@ static struct clk bclk_16xx = {
673 .set_rate = &omap1_set_ext_clk_rate, 673 .set_rate = &omap1_set_ext_clk_rate,
674 .round_rate = &omap1_round_ext_clk_rate, 674 .round_rate = &omap1_round_ext_clk_rate,
675 .init = &omap1_init_ext_clk, 675 .init = &omap1_init_ext_clk,
676 .enable = &omap1_clk_enable, 676 .enable = &omap1_clk_enable_generic,
677 .disable = &omap1_clk_disable, 677 .disable = &omap1_clk_disable_generic,
678}; 678};
679 679
680static struct clk mmc1_ck = { 680static struct clk mmc1_ck = {
@@ -686,8 +686,8 @@ static struct clk mmc1_ck = {
686 RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, 686 RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
687 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, 687 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
688 .enable_bit = 23, 688 .enable_bit = 23,
689 .enable = &omap1_clk_enable, 689 .enable = &omap1_clk_enable_generic,
690 .disable = &omap1_clk_disable, 690 .disable = &omap1_clk_disable_generic,
691}; 691};
692 692
693static struct clk mmc2_ck = { 693static struct clk mmc2_ck = {
@@ -699,8 +699,8 @@ static struct clk mmc2_ck = {
699 RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, 699 RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
700 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, 700 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
701 .enable_bit = 20, 701 .enable_bit = 20,
702 .enable = &omap1_clk_enable, 702 .enable = &omap1_clk_enable_generic,
703 .disable = &omap1_clk_disable, 703 .disable = &omap1_clk_disable_generic,
704}; 704};
705 705
706static struct clk virtual_ck_mpu = { 706static struct clk virtual_ck_mpu = {
@@ -711,8 +711,8 @@ static struct clk virtual_ck_mpu = {
711 .recalc = &followparent_recalc, 711 .recalc = &followparent_recalc,
712 .set_rate = &omap1_select_table_rate, 712 .set_rate = &omap1_select_table_rate,
713 .round_rate = &omap1_round_to_table_rate, 713 .round_rate = &omap1_round_to_table_rate,
714 .enable = &omap1_clk_enable, 714 .enable = &omap1_clk_enable_generic,
715 .disable = &omap1_clk_disable, 715 .disable = &omap1_clk_disable_generic,
716}; 716};
717 717
718static struct clk * onchip_clks[] = { 718static struct clk * onchip_clks[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 17:25:22 -0400