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-rw-r--r--arch/arm/mach-mxs/timer.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index f4dd96ff081a..a4d469b21d96 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -28,11 +28,10 @@
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_address.h> 29#include <linux/of_address.h>
30#include <linux/of_irq.h> 30#include <linux/of_irq.h>
31#include <linux/stmp_device.h>
31 32
32#include <asm/mach/time.h> 33#include <asm/mach/time.h>
33#include <asm/sched_clock.h> 34#include <asm/sched_clock.h>
34#include <mach/mxs.h>
35#include <mach/common.h>
36 35
37/* 36/*
38 * There are 2 versions of the timrot on Freescale MXS-based SoCs. 37 * There are 2 versions of the timrot on Freescale MXS-based SoCs.
@@ -85,20 +84,20 @@ static u32 timrot_major_version;
85 84
86static inline void timrot_irq_disable(void) 85static inline void timrot_irq_disable(void)
87{ 86{
88 __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ_EN, 87 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base +
89 mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); 88 HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR);
90} 89}
91 90
92static inline void timrot_irq_enable(void) 91static inline void timrot_irq_enable(void)
93{ 92{
94 __mxs_setl(BM_TIMROT_TIMCTRLn_IRQ_EN, 93 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base +
95 mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); 94 HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_SET);
96} 95}
97 96
98static void timrot_irq_acknowledge(void) 97static void timrot_irq_acknowledge(void)
99{ 98{
100 __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ, 99 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ, mxs_timrot_base +
101 mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); 100 HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR);
102} 101}
103 102
104static cycle_t timrotv1_get_cycles(struct clocksource *cs) 103static cycle_t timrotv1_get_cycles(struct clocksource *cs)
@@ -262,7 +261,7 @@ static void __init mxs_timer_init(struct device_node *np)
262 /* 261 /*
263 * Initialize timers to a known state 262 * Initialize timers to a known state
264 */ 263 */
265 mxs_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL); 264 stmp_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL);
266 265
267 /* get timrot version */ 266 /* get timrot version */
268 timrot_major_version = __raw_readl(mxs_timrot_base + 267 timrot_major_version = __raw_readl(mxs_timrot_base +