diff options
Diffstat (limited to 'arch/arm/mach-mxc91231')
-rw-r--r-- | arch/arm/mach-mxc91231/clock.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-mxc91231/magx-zn5.c | 2 |
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-mxc91231/clock.c b/arch/arm/mach-mxc91231/clock.c index ecfa37fef8ad..5c85075d8a56 100644 --- a/arch/arm/mach-mxc91231/clock.c +++ b/arch/arm/mach-mxc91231/clock.c | |||
@@ -624,7 +624,6 @@ static struct clk_lookup lookups[] = { | |||
624 | int __init mxc91231_clocks_init(unsigned long fref) | 624 | int __init mxc91231_clocks_init(unsigned long fref) |
625 | { | 625 | { |
626 | void __iomem *gpt_base; | 626 | void __iomem *gpt_base; |
627 | int i; | ||
628 | 627 | ||
629 | ckih_rate = fref; | 628 | ckih_rate = fref; |
630 | 629 | ||
@@ -632,8 +631,7 @@ int __init mxc91231_clocks_init(unsigned long fref) | |||
632 | sdhc_clk[0].parent = clk_sdhc_parent(&sdhc_clk[0]); | 631 | sdhc_clk[0].parent = clk_sdhc_parent(&sdhc_clk[0]); |
633 | sdhc_clk[1].parent = clk_sdhc_parent(&sdhc_clk[1]); | 632 | sdhc_clk[1].parent = clk_sdhc_parent(&sdhc_clk[1]); |
634 | 633 | ||
635 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 634 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
636 | clkdev_add(&lookups[i]); | ||
637 | 635 | ||
638 | gpt_base = MXC91231_IO_ADDRESS(MXC91231_GPT1_BASE_ADDR); | 636 | gpt_base = MXC91231_IO_ADDRESS(MXC91231_GPT1_BASE_ADDR); |
639 | mxc_timer_init(&gpt_clk, gpt_base, MXC91231_INT_GPT); | 637 | mxc_timer_init(&gpt_clk, gpt_base, MXC91231_INT_GPT); |
diff --git a/arch/arm/mach-mxc91231/magx-zn5.c b/arch/arm/mach-mxc91231/magx-zn5.c index 7dbe4ca12efd..69816ba82930 100644 --- a/arch/arm/mach-mxc91231/magx-zn5.c +++ b/arch/arm/mach-mxc91231/magx-zn5.c | |||
@@ -55,7 +55,7 @@ struct sys_timer zn5_timer = { | |||
55 | MACHINE_START(MAGX_ZN5, "Motorola Zn5") | 55 | MACHINE_START(MAGX_ZN5, "Motorola Zn5") |
56 | .phys_io = MXC91231_AIPS1_BASE_ADDR, | 56 | .phys_io = MXC91231_AIPS1_BASE_ADDR, |
57 | .io_pg_offst = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 57 | .io_pg_offst = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
58 | .boot_params = PHYS_OFFSET + 0x100, | 58 | .boot_params = MXC91231_PHYS_OFFSET + 0x100, |
59 | .map_io = mxc91231_map_io, | 59 | .map_io = mxc91231_map_io, |
60 | .init_irq = mxc91231_init_irq, | 60 | .init_irq = mxc91231_init_irq, |
61 | .timer = &zn5_timer, | 61 | .timer = &zn5_timer, |